Lines Matching refs:regs
72 bi_assign_slot_read(bi_registers *regs, bi_index src)
80 if (regs->slot[i] == src.value && regs->enabled[i])
84 if (regs->slot[2] == src.value && regs->slot23.slot2 == BIFROST_OP_READ)
90 if (!regs->enabled[i]) {
91 regs->slot[i] = src.value;
92 regs->enabled[i] = true;
97 if (!regs->slot23.slot3) {
98 regs->slot[2] = src.value;
99 regs->slot23.slot2 = BIFROST_OP_READ;
103 bi_print_slots(regs, stderr);
121 bi_assign_slot_read(&now->regs, (now->fma)->src[src]);
132 bi_assign_slot_read(&now->regs, (now->add)->src[src]);
144 now->regs.slot[3] = idx.value;
145 now->regs.slot23.slot3 = BIFROST_OP_WRITE;
153 if (now->regs.slot23.slot3) {
155 assert(!now->regs.slot23.slot2);
156 now->regs.slot[2] = idx.value;
157 now->regs.slot23.slot2 = BIFROST_OP_WRITE;
159 now->regs.slot[3] = idx.value;
160 now->regs.slot23.slot3 = BIFROST_OP_WRITE;
161 now->regs.slot23.slot3_fma = true;
166 return now->regs;
187 bi_pack_registers(bi_registers regs)
189 enum bifrost_reg_mode mode = bi_pack_register_mode(regs);
199 if (regs.first_instruction) {
212 if (!(regs.slot23.slot2 && regs.slot23.slot3))
220 if (regs.enabled[1]) {
222 assert(regs.slot[1] > regs.slot[0]);
223 assert(regs.enabled[0]);
226 if (regs.slot[0] > 31) {
227 regs.slot[0] = 63 - regs.slot[0];
228 regs.slot[1] = 63 - regs.slot[1];
231 assert(regs.slot[0] <= 31);
232 assert(regs.slot[1] <= 63);
235 s.reg1 = regs.slot[1];
236 s.reg0 = regs.slot[0];
242 if (regs.enabled[0]) {
244 s.reg1 |= (regs.slot[0] >> 5);
247 s.reg0 = (regs.slot[0] & 0b11111);
256 assert(regs.slot[3] == regs.slot[2] || !(regs.slot23.slot2 && regs.slot23.slot3));
258 if (regs.slot23.slot2)
259 regs.slot[3] = regs.slot[2];
261 regs.slot[2] = regs.slot[3];
262 } else if (!regs.first_instruction) {
264 assert(regs.slot[2] != regs.slot[3]);
267 s.reg2 = regs.slot[2];
268 s.reg3 = regs.slot[3];
269 s.fau_idx = regs.fau_idx;
279 bi_flip_slots(bi_registers *regs)
281 if (regs->enabled[0] && regs->enabled[1] && regs->slot[1] < regs->slot[0]) {
282 unsigned temp = regs->slot[0];
283 regs->slot[0] = regs->slot[1];
284 regs->slot[1] = temp;
290 bi_get_src_slot(bi_registers *regs, unsigned reg)
292 if (regs->slot[0] == reg && regs->enabled[0])
294 else if (regs->slot[1] == reg && regs->enabled[1])
296 else if (regs->slot[2] == reg && regs->slot23.slot2 == BIFROST_OP_READ)
303 bi_get_src_new(bi_instr *ins, bi_registers *regs, unsigned s)
311 return bi_get_src_slot(regs, src.value);
324 tuple->regs.fau_idx = tuple->fau_idx;
325 tuple->regs.first_instruction = first_tuple;
327 bi_flip_slots(&tuple->regs);
332 uint64_t reg = bi_pack_registers(tuple->regs);
334 bi_get_src_new(tuple->fma, &tuple->regs, 0),
335 bi_get_src_new(tuple->fma, &tuple->regs, 1),
336 bi_get_src_new(tuple->fma, &tuple->regs, 2),
337 bi_get_src_new(tuple->fma, &tuple->regs, 3));
340 bi_get_src_new(tuple->add, &tuple->regs, sr_read + 0),
341 bi_get_src_new(tuple->add, &tuple->regs, sr_read + 1),
342 bi_get_src_new(tuple->add, &tuple->regs, sr_read + 2),
726 unsigned loc = tuple->regs.fau_idx - BIR_FAU_BLEND_0;