Lines Matching refs:regs
1445 unsigned char regs[2];
1447 regs[0] = page;
1448 regs[1] = page >> 8;
1450 return rt_set_register_immediate (0x91, 2, regs);
1574 rt_set_direction_forwards (unsigned char *regs)
1576 regs[0xc6] |= 0x08;
1581 rt_set_direction_rewind (unsigned char *regs)
1583 regs[0xc6] &= 0xf7;
1588 rt_set_stop_when_rewound (unsigned char *regs, int stop)
1591 regs[0xb2] |= 0x10;
1593 regs[0xb2] &= 0xef;
1675 rt_set_value_lsbfirst (unsigned char *regs,
1680 regs[firstreg++] = value & 0xff;
1688 rt_set_value_msbfirst (unsigned char *regs,
1693 regs[firstreg + totalregs] = value & 0xff;
1701 rt_set_ccd_shift_clock_multiplier (unsigned char *regs, unsigned value)
1703 return rt_set_value_lsbfirst (regs, 0xf0, 3, value);
1707 rt_set_ccd_clock_reset_interval (unsigned char *regs, unsigned value)
1709 return rt_set_value_lsbfirst (regs, 0xf9, 3, value);
1713 rt_set_ccd_clamp_clock_multiplier (unsigned char *regs, unsigned value)
1715 return rt_set_value_lsbfirst (regs, 0xfc, 3, value);
1719 rt_set_movement_pattern (unsigned char *regs, unsigned value)
1721 return rt_set_value_lsbfirst (regs, 0xc0, 3, value);
1725 rt_set_motor_movement_clock_multiplier (unsigned char *regs, unsigned value)
1727 regs[0x40] = (regs[0x40] & ~0xc0) | (value << 6);
1732 rt_set_motor_type (unsigned char *regs, unsigned value)
1734 regs[0xc9] = (regs[0xc9] & 0xf8) | (value & 0x7);
1739 rt_set_noscan_distance (unsigned char *regs, unsigned value)
1742 return rt_set_value_lsbfirst (regs, 0x60, 2, value);
1746 rt_set_total_distance (unsigned char *regs, unsigned value)
1749 return rt_set_value_lsbfirst (regs, 0x62, 2, value);
1753 rt_set_scanline_start (unsigned char *regs, unsigned value)
1755 return rt_set_value_lsbfirst (regs, 0x66, 2, value);
1759 rt_set_scanline_end (unsigned char *regs, unsigned value)
1761 return rt_set_value_lsbfirst (regs, 0x6c, 2, value);
1765 rt_set_basic_calibration (unsigned char *regs,
1774 regs[0x02] = redoffset1;
1775 regs[0x05] = redoffset2;
1776 regs[0x08] = redgain;
1777 regs[0x03] = greenoffset1;
1778 regs[0x06] = greenoffset2;
1779 regs[0x09] = greengain;
1780 regs[0x04] = blueoffset1;
1781 regs[0x07] = blueoffset2;
1782 regs[0x0a] = bluegain;
1787 rt_set_calibration_addresses (unsigned char *regs,
1799 regs[0x84] = redaddr;
1800 regs[0x8e] = (regs[0x8e] & 0x0f) | ((redaddr >> 4) & 0xf0);
1801 rt_set_value_lsbfirst (regs, 0x85, 2, greenaddr);
1802 rt_set_value_lsbfirst (regs, 0x87, 2, blueaddr);
1808 rt_set_value_lsbfirst (regs, 0x80, 2, endpage);
1809 rt_set_value_lsbfirst (regs, 0x82, 2, endpage + scanline_pages);
1810 rt_set_value_lsbfirst (regs, 0x89, 2, endpage + scanline_pages * 2);
1816 rt_set_value_lsbfirst (regs, 0x51, 2, (48 * (width + 1) + 31) / 32);
1819 rt_set_value_lsbfirst (regs, 0x8f, 2, 0x1c00);
1824 rt_set_lamp_duty_cycle (unsigned char *regs,
1828 regs[0x3b] |= 0x80;
1830 regs[0x3b] &= 0x7f;
1832 regs[0x3b] =
1833 (regs[0x3b] & 0x80) | ((frequency & 0x7) << 4) | (offduty & 0x0f);
1834 regs[0x3d] = (regs[0x3d] & 0x7f) | ((frequency & 0x8) << 4);
1839 rt_set_data_feed_on (unsigned char *regs)
1841 regs[0xb2] &= ~0x04;
1846 rt_set_data_feed_off (unsigned char *regs)
1848 regs[0xb2] |= 0x04;
1853 rt_enable_ccd (unsigned char *regs, int enable)
1856 regs[0x00] &= ~0x10;
1858 regs[0x00] |= 0x10;
1863 rt_set_cdss (unsigned char *regs, int val1, int val2)
1865 regs[0x28] = (regs[0x28] & 0xe0) | (val1 & 0x1f);
1866 regs[0x2a] = (regs[0x2a] & 0xe0) | (val2 & 0x1f);
1871 rt_set_cdsc (unsigned char *regs, int val1, int val2)
1873 regs[0x29] = (regs[0x29] & 0xe0) | (val1 & 0x1f);
1874 regs[0x2b] = (regs[0x2b] & 0xe0) | (val2 & 0x1f);
1879 rt_update_after_setting_cdss2 (unsigned char *regs)
1881 int fullcolour = (!(regs[0x2f] & 0xc0) && (regs[0x2f] & 0x04));
1882 int value = regs[0x2a] & 0x1f;
1884 regs[0x2a] = (regs[0x2a] & 0xe0) | (value & 0x1f);
1888 if ((regs[0x40] & 0xc0) == 0x40)
1893 regs[0x2c] = (regs[0x2c] & 0xe0) | (value % 24);
1894 regs[0x2d] = (regs[0x2d] & 0xe0) | ((value + 2) % 24);
1899 rt_set_cph0s (unsigned char *regs, int on)
1902 regs[0x2d] |= 0x20; /* 1200dpi horizontal coordinate space */
1904 regs[0x2d] &= ~0x20; /* 600dpi horizontal coordinate space */
1909 rt_set_cvtr_lm (unsigned char *regs, int val1, int val2, int val3)
1911 regs[0x28] = (regs[0x28] & ~0xe0) | (val1 << 5);
1912 regs[0x29] = (regs[0x29] & ~0xe0) | (val2 << 5);
1913 regs[0x2a] = (regs[0x2a] & ~0xe0) | (val3 << 5);
1918 rt_set_cvtr_mpt (unsigned char *regs, int val1, int val2, int val3)
1920 regs[0x3c] = (val1 & 0x0f) | (val2 << 4);
1921 regs[0x3d] = (regs[0x3d] & 0xf0) | (val3 & 0x0f);
1926 rt_set_cvtr_wparams (unsigned char *regs,
1929 regs[0x31] = (w & 0x0f) | ((bpw << 4) & 0x30) | (fpw << 6);
1934 rt_enable_movement (unsigned char *regs, int enable)
1937 regs[0xc3] |= 0x80;
1939 regs[0xc3] &= ~0x80;
1944 rt_set_scan_frequency (unsigned char *regs, int frequency)
1946 regs[0x64] = (regs[0x64] & 0xf0) | (frequency & 0x0f);
1951 rt_set_merge_channels (unsigned char *regs, int on)
1954 regs[0x2f] &= ~0x14;
1955 regs[0x2f] |= on ? 0x04 : 0x10;
1960 rt_set_channel (unsigned char *regs, int channel)
1962 regs[0x2f] = (regs[0x2f] & ~0xc0) | (channel << 6);
1967 rt_set_single_channel_scanning (unsigned char *regs, int on)
1970 regs[0x2f] |= 0x20;
1972 regs[0x2f] &= ~0x20;
1977 rt_set_colour_mode (unsigned char *regs, int on)
1980 regs[0x2f] |= 0x02;
1982 regs[0x2f] &= ~0x02;
1987 rt_set_horizontal_resolution (unsigned char *regs, int resolution)
1991 if (regs[0x2d] & 0x20)
1993 if (regs[0xd3] & 0x08)
1995 regs[0x7a] = base_resolution / resolution;
2000 rt_set_last_sram_page (unsigned char *regs, int pagenum)
2002 rt_set_value_lsbfirst (regs, 0x8b, 2, pagenum);
2007 rt_set_step_size (unsigned char *regs, int stepsize)
2009 rt_set_value_lsbfirst (regs, 0xe2, 2, stepsize);
2010 rt_set_value_lsbfirst (regs, 0xe0, 2, 0);
2017 char regs[255];
2019 memcpy (regs, regs_, 255);
2020 regs[0x32] &= ~0x40;
2022 if (rt_set_one_register (0x32, regs[0x32]) < 0 ||
2023 rt_set_register_immediate (0, 255, regs) < 0 ||
2024 rt_set_one_register (0x32, regs[0x32] | 0x40) < 0)
2030 rt_adjust_misc_registers (unsigned char *regs)
2033 regs[0xc6] = (regs[0xc6] & 0x0f) | 0x20; /* Purpose unknown - appears to do nothing */
2034 regs[0x2e] = 0x86; /* ???? - Always has this value */
2035 regs[0x30] = 2; /* CCPL = 1 */
2036 regs[0xc9] |= 0x38; /* Doesn't have any obvious effect, but the Windows driver does this */
2066 unsigned char regs[13];
2068 if (rt_read_register_immediate (0x10, 13, regs) < 0)
2070 regs[2] |= 0xf0;
2071 regs[4] = (regs[4] & 0x1f) | 0x60;
2072 return rt_set_register_immediate (0x10, 13, regs);
2446 unsigned char regs[255];
2450 rt_read_register_immediate (0, 255, regs);
2452 rt_set_noscan_distance (regs, 59998);
2453 rt_set_total_distance (regs, 59999);
2455 rt_set_stop_when_rewound (regs, 0);
2461 rt_set_direction_rewind (regs);
2463 rt_set_step_size (regs, 0x55);
2464 regs[0x39] = 3;
2465 regs[0xc3] = (regs[0xc3] & 0xf8) | 0x86;
2466 regs[0xc6] = (regs[0xc6] & 0xf8) | 4;
2468 rt_set_horizontal_resolution (regs, 25);
2469 rt_set_ccd_shift_clock_multiplier (regs, tg_info[tg_setting].tg_cph0p);
2470 rt_set_ccd_clock_reset_interval (regs, tg_info[tg_setting].tg_crsp);
2471 rt_set_ccd_clamp_clock_multiplier (regs, tg_info[tg_setting].tg_cclpp);
2472 rt_set_cdss (regs, tg_info[tg_setting].tg_cdss1,
2474 rt_set_cdsc (regs, tg_info[tg_setting].tg_cdsc1,
2476 rt_update_after_setting_cdss2 (regs);
2477 rt_set_cvtr_wparams (regs, 3, 0, 6);
2478 rt_set_cvtr_mpt (regs, 15, 15, 15);
2479 rt_set_cvtr_lm (regs, 7, 7, 7);
2480 rt_set_motor_type (regs, 2);
2483 dump_registers (regs);
2485 rt_set_all_registers (regs);
2486 rt_set_one_register (0x2c, regs[0x2c]);
2546 dump_registers (unsigned char const *regs)
2562 sprintf (buffer + strlen (buffer), " %02x", regs[i++]);
2567 sprintf (buffer + strlen (buffer), " %02x", regs[i++]);
2573 get_lsbfirst_int (regs + 0x60, 2));
2575 get_lsbfirst_int (regs + 0x62, 2));
2577 get_lsbfirst_int (regs + 0x62, 2) - get_lsbfirst_int (regs + 0x60, 2));
2579 (regs[0xc6] & 0x08) ? "forward" : "rewind");
2581 (regs[0xc3] & 0x80) ? "enabled" : "disabled");
2582 if (regs[0x7a])
2584 get_lsbfirst_int (regs + 0x66, 2) / regs[0x7a],
2585 get_lsbfirst_int (regs + 0x6c, 2) / regs[0x7a]);
2588 get_lsbfirst_int (regs + 0xf0, 3));
2590 get_lsbfirst_int (regs + 0xf9, 3));
2592 get_lsbfirst_int (regs + 0xfc, 3));
2594 (regs[0x2d] & 0x20) ? 1 : 0);
2595 DBG (5, " CDSS1: %02x\n", regs[0x28] & 0x1f);
2596 DBG (5, " CDSC1: %02x\n", regs[0x29] & 0x1f);
2597 DBG (5, " CDSS2: %02x\n", regs[0x2a] & 0x1f);
2598 DBG (5, " CDSC2: %02x\n", regs[0x2b] & 0x1f);
2601 if (!regs[0x7a])
2605 * ((regs[0x2d] & 0x20) ? 2 : 1)
2606 * ((regs[0xd3] & 0x08) ? 2 : 1) / regs[0x7a]);
2608 400 * (regs[0xc3] & 0x1f) * convert_c6 (regs[0xc6] & 0x7) /
2609 (regs[0x39] + 1));
2611 (regs[0xd3] & 0x08) ? 1 : 0);
2612 DBG (5, " Register 39: %u\n", regs[0x39]);
2613 DBG (5, " Register C3:0-5: %u\n", regs[0xc3] & 0x1f);
2614 DBG (5, " Register C6:0-2: %u\n", regs[0xc6] & 0x7);
2615 DBG (5, " Motor movement clock multiplier: %u\n", regs[0x40] >> 6);
2617 get_lsbfirst_int (regs + 0xe2, 2));
2618 DBG (5, " Frequency: %u\n", regs[0x64] & 0xf);
2620 DBG (5, " Register 2F: %02x\n", regs[0x2f]);
2621 DBG (5, " Register 2C: %02x\n", regs[0x2c]);
2622 if (regs[0x7a])
2626 (long) (get_lsbfirst_int (regs + 0x62, 2) -
2627 get_lsbfirst_int (regs + 0x60,
2628 2)) * (long) (get_lsbfirst_int (regs + 0x6c,
2630 get_lsbfirst_int (regs + 0x66,
2632 regs[0x7a];
2994 unsigned char regs[256];
3011 rt_read_register_immediate (0, 255, regs);
3012 regs[255] = 0;
3014 rt_enable_ccd (regs, 1);
3015 rt_enable_movement (regs, 1);
3016 rt_set_scan_frequency (regs, 1);
3018 rt_adjust_misc_registers (regs);
3020 rt_set_cvtr_wparams (regs, 3, 0, 6);
3021 rt_set_cvtr_mpt (regs, 15, 15, 15);
3022 rt_set_cvtr_lm (regs, 7, 7, 7);
3023 rt_set_motor_type (regs, 2);
3029 rt_set_lamp_duty_cycle (regs, 1, /* On */
3033 rt_set_movement_pattern (regs, 0x800000);
3035 rt_set_direction_forwards (regs);
3036 rt_set_stop_when_rewound (regs, 0);
3038 rt_set_calibration_addresses (regs, 0, 0, 0, 0, 0);
3040 rt_set_basic_calibration (regs,
3044 regs[0x0b] = 0x70; /* If set to 0x71, the alternative, all values are low */
3045 regs[0x40] &= 0xc0;
3051 rt_set_calibration_addresses (regs, red_calib_offset,
3055 regs[0x40] |= 0x2f;
3059 rt_set_calibration_addresses (regs, 0x600, 0x600, 0x600,
3063 rt_set_channel (regs, RT_CHANNEL_ALL);
3064 rt_set_single_channel_scanning (regs, 0);
3065 rt_set_merge_channels (regs, 1);
3066 rt_set_colour_mode (regs, 1);
3068 rt_set_last_sram_page (regs, (local_sram_size - 1) >> 5);
3071 rt_set_cph0s (regs, resparms[ires].cph0s);
3073 regs[0xd3] |= 0x08;
3075 regs[0xd3] &= 0xf7;
3078 regs[0xc3] &= 0x7f;
3080 regs[0xb2] &= 0xf7;
3082 rt_set_horizontal_resolution (regs, xresolution);
3084 rt_set_scanline_start (regs,
3088 rt_set_scanline_end (regs,
3129 rt_set_noscan_distance(regs, fastres * resparms[rmres].scan_frequency - 2);
3130 rt_set_total_distance(regs, fastres * resparms[rmres].scan_frequency - 1);
3132 rt_set_scan_frequency(regs, 1);
3135 rt_set_ccd_shift_clock_multiplier (regs, tg_info[tg_setting].tg_cph0p);
3136 rt_set_ccd_clock_reset_interval (regs, tg_info[tg_setting].tg_crsp);
3137 rt_set_ccd_clamp_clock_multiplier (regs, tg_info[tg_setting].tg_cclpp);
3142 rt_set_step_size (regs, resparms[rmres].step_size);
3144 rt_set_motor_movement_clock_multiplier (regs,
3148 rt_set_cdss (regs, tg_info[tg_setting].tg_cdss1,
3150 rt_set_cdsc (regs, tg_info[tg_setting].tg_cdsc1,
3152 rt_update_after_setting_cdss2 (regs);
3154 regs[0x39] = resparms[rmres].reg_39_value;
3155 regs[0xc3] = (regs[0xc3] & 0xf8) | resparms[rmres].reg_c3_value;
3156 regs[0xc6] = (regs[0xc6] & 0xf8) | resparms[rmres].reg_c6_value;
3158 rt_set_data_feed_off (regs);
3160 rt_set_all_registers (regs);
3162 rt_set_one_register (0x2c, regs[0x2c]);
3165 dump_registers (regs);
3174 rt_set_noscan_distance (regs, y * scan_frequency - 1);
3175 rt_set_total_distance (regs, scan_frequency * (y + h) - 1);
3177 rt_set_scan_frequency (regs, scan_frequency);
3181 rt_set_ccd_shift_clock_multiplier (regs, tg_info[tg_setting].tg_cph0p);
3182 rt_set_ccd_clock_reset_interval (regs, tg_info[tg_setting].tg_crsp);
3183 rt_set_ccd_clamp_clock_multiplier (regs, tg_info[tg_setting].tg_cclpp);
3188 rt_set_step_size (regs, resparms[jres].step_size);
3190 rt_set_motor_movement_clock_multiplier (regs,
3194 rt_set_cdss (regs, tg_info[tg_setting].tg_cdss1,
3196 rt_set_cdsc (regs, tg_info[tg_setting].tg_cdsc1,
3198 rt_update_after_setting_cdss2 (regs);
3200 regs[0x39] = resparms[jres].reg_39_value;
3201 regs[0xc3] = (regs[0xc3] & 0xf8) | resparms[jres].reg_c3_value;
3202 regs[0xc6] = (regs[0xc6] & 0xf8) | resparms[jres].reg_c6_value;
3204 rt_set_data_feed_on (regs);
3206 rt_set_all_registers (regs);
3208 rt_set_one_register (0x2c, regs[0x2c]);
3211 dump_registers (regs);
3220 (regs[0x2f] & 0x04) != 0,