| /kernel/linux/linux-5.10/sound/ppc/ |
| H A D | burgundy.c | 45 snd_pmac_burgundy_wcw(struct snd_pmac *chip, unsigned addr, unsigned val) in snd_pmac_burgundy_wcw() argument
47 out_le32(&chip->awacs->codec_ctrl, addr + 0x200c00 + (val & 0xff)); in snd_pmac_burgundy_wcw()
49 out_le32(&chip->awacs->codec_ctrl, addr + 0x200d00 +((val>>8) & 0xff)); in snd_pmac_burgundy_wcw()
51 out_le32(&chip->awacs->codec_ctrl, addr + 0x200e00 +((val>>16) & 0xff)); in snd_pmac_burgundy_wcw()
53 out_le32(&chip->awacs->codec_ctrl, addr + 0x200f00 +((val>>24) & 0xff)); in snd_pmac_burgundy_wcw()
60 unsigned val = 0; in snd_pmac_burgundy_rcw() local
68 val += (in_le32(&chip->awacs->codec_stat) >> 4) & 0xff; in snd_pmac_burgundy_rcw()
73 val += ((in_le32(&chip->awacs->codec_stat)>>4) & 0xff) <<8; in snd_pmac_burgundy_rcw()
78 val += ((in_le32(&chip->awacs->codec_stat)>>4) & 0xff) <<16; in snd_pmac_burgundy_rcw()
83 val in snd_pmac_burgundy_rcw()
91 snd_pmac_burgundy_wcb(struct snd_pmac *chip, unsigned int addr, unsigned int val) snd_pmac_burgundy_wcb() argument
101 unsigned val = 0; snd_pmac_burgundy_rcb() local
319 int oval, val; snd_pmac_burgundy_put_gain() local
364 int val = snd_pmac_burgundy_rcw(chip, addr); snd_pmac_burgundy_get_switch_w() local
379 int val, oval; snd_pmac_burgundy_put_switch_w() local
420 int val = snd_pmac_burgundy_rcb(chip, addr); snd_pmac_burgundy_get_switch_b() local
435 int val, oval; snd_pmac_burgundy_put_switch_b() local
[all...] |
| /kernel/linux/linux-5.10/sound/pci/ca0106/ |
| H A D | ca0106_mixer.c | 65 unsigned int val; in ca0106_spdif_enable() local
71 val = snd_ca0106_ptr_read(emu, CAPTURE_CONTROL, 0) & ~0x1000; in ca0106_spdif_enable()
72 snd_ca0106_ptr_write(emu, CAPTURE_CONTROL, 0, val); in ca0106_spdif_enable()
73 val = inl(emu->port + GPIO) & ~0x101; in ca0106_spdif_enable()
74 outl(val, emu->port + GPIO); in ca0106_spdif_enable()
80 val = snd_ca0106_ptr_read(emu, CAPTURE_CONTROL, 0) | 0x1000; in ca0106_spdif_enable()
81 snd_ca0106_ptr_write(emu, CAPTURE_CONTROL, 0, val); in ca0106_spdif_enable()
82 val = inl(emu->port + GPIO) | 0x101; in ca0106_spdif_enable()
83 outl(val, emu->port + GPIO); in ca0106_spdif_enable()
89 unsigned int val in ca0106_set_capture_source() local
96 ca0106_set_i2c_capture_source(struct snd_ca0106 *emu, unsigned int val, int force) ca0106_set_i2c_capture_source() argument
159 unsigned int val; snd_ca0106_shared_spdif_put() local
194 unsigned int val; snd_ca0106_capture_source_put() local
276 unsigned int val; snd_ca0106_capture_mic_line_in_put() local
370 unsigned int val; snd_ca0106_spdif_put_default() local
390 unsigned int val; snd_ca0106_spdif_put_stream() local
[all...] |
| /kernel/linux/linux-5.10/drivers/ps3/ |
| H A D | ps3-lpm.c | 242 void ps3_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val) in ps3_write_phys_ctr() argument
258 counter0415 = (u64)val << 32; in ps3_write_phys_ctr()
264 counter0415 = (u64)val; in ps3_write_phys_ctr()
272 counter2637 = (u64)val << 32; in ps3_write_phys_ctr()
278 counter2637 = (u64)val; in ps3_write_phys_ctr()
291 "phys_ctr %u, val %u, %s\n", __func__, __LINE__, in ps3_write_phys_ctr()
292 phys_ctr, val, ps3_result(result)); in ps3_write_phys_ctr() local
305 u32 val; in ps3_read_ctr() local
308 val = ps3_read_phys_ctr(cpu, phys_ctr); in ps3_read_ctr()
311 val in ps3_read_ctr()
324 ps3_write_ctr(u32 cpu, u32 ctr, u32 val) ps3_write_ctr() argument
362 ps3_write_pm07_control(u32 cpu, u32 ctr, u32 val) ps3_write_pm07_control() argument
390 u64 val = 0; ps3_read_pm() local
439 ps3_write_pm(u32 cpu, enum pm_reg_name reg, u32 val) ps3_write_pm() argument
[all...] |
| /kernel/linux/linux-6.6/drivers/media/i2c/ |
| H A D | msp3400-driver.c | 196 static int msp_write(struct i2c_client *client, int dev, int addr, int val) in msp_write() argument
204 buffer[3] = val >> 8; in msp_write()
205 buffer[4] = val & 0xff; in msp_write()
208 dev, addr, val); in msp_write()
224 int msp_write_dem(struct i2c_client *client, int addr, int val) in msp_write_dem() argument
226 return msp_write(client, I2C_MSP_DEM, addr, val); in msp_write_dem()
229 int msp_write_dsp(struct i2c_client *client, int addr, int val) in msp_write_dsp() argument
231 return msp_write(client, I2C_MSP_DSP, addr, val); in msp_write_dsp()
338 int val = ctrl->val; in msp_s_ctrl() local
479 u16 val, reg; msp_s_routing() local
[all...] |
| /kernel/linux/linux-6.6/drivers/ps3/ |
| H A D | ps3-lpm.c | 242 void ps3_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val) in ps3_write_phys_ctr() argument
258 counter0415 = (u64)val << 32; in ps3_write_phys_ctr()
264 counter0415 = (u64)val; in ps3_write_phys_ctr()
272 counter2637 = (u64)val << 32; in ps3_write_phys_ctr()
278 counter2637 = (u64)val; in ps3_write_phys_ctr()
291 "phys_ctr %u, val %u, %s\n", __func__, __LINE__, in ps3_write_phys_ctr()
292 phys_ctr, val, ps3_result(result)); in ps3_write_phys_ctr() local
305 u32 val; in ps3_read_ctr() local
308 val = ps3_read_phys_ctr(cpu, phys_ctr); in ps3_read_ctr()
311 val in ps3_read_ctr()
324 ps3_write_ctr(u32 cpu, u32 ctr, u32 val) ps3_write_ctr() argument
362 ps3_write_pm07_control(u32 cpu, u32 ctr, u32 val) ps3_write_pm07_control() argument
390 u64 val = 0; ps3_read_pm() local
439 ps3_write_pm(u32 cpu, enum pm_reg_name reg, u32 val) ps3_write_pm() argument
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/hisilicon/kirin/ |
| H A D | kirin_drm_ade.c | 94 static void ade_update_reload_bit(void __iomem *base, u32 bit_num, u32 val) in ade_update_reload_bit() argument
102 MASK(1), !!val); in ade_update_reload_bit()
351 u32 val; in ade_rdma_dump_regs() local
360 val = ade_read_reload_bit(base, RDMA_OFST + ch); in ade_rdma_dump_regs()
361 DRM_DEBUG_DRIVER("[rdma%d]: reload(%d)\n", ch + 1, val); in ade_rdma_dump_regs()
362 val = readl(base + reg_ctrl); in ade_rdma_dump_regs()
363 DRM_DEBUG_DRIVER("[rdma%d]: reg_ctrl(0x%08x)\n", ch + 1, val); in ade_rdma_dump_regs()
364 val = readl(base + reg_addr); in ade_rdma_dump_regs()
365 DRM_DEBUG_DRIVER("[rdma%d]: reg_addr(0x%08x)\n", ch + 1, val); in ade_rdma_dump_regs()
366 val in ade_rdma_dump_regs()
378 u32 val; ade_clip_dump_regs() local
393 u32 val; ade_compositor_routing_dump_regs() local
405 u32 val; ade_dump_overlay_compositor_regs() local
670 u32 val; ade_compositor_routing_set() local
[all...] |
| /kernel/linux/linux-6.6/drivers/iio/dac/ |
| H A D | ltc2688.c | 101 void *val, size_t val_size) in ltc2688_spi_read()
125 memcpy(val, &st->rx_data[1], val_size); in ltc2688_spi_read()
157 static int ltc2688_scale_get(const struct ltc2688_state *st, int c, int *val) in ltc2688_scale_get() argument
170 *val = DIV_ROUND_CLOSEST(fs * st->vref, 4096); in ltc2688_scale_get()
175 static int ltc2688_offset_get(const struct ltc2688_state *st, int c, int *val) in ltc2688_offset_get() argument
184 *val = -32768; in ltc2688_offset_get()
186 *val = 0; in ltc2688_offset_get()
275 struct iio_chan_spec const *chan, int *val, in ltc2688_read_raw()
284 val); in ltc2688_read_raw()
290 ret = ltc2688_offset_get(st, chan->channel, val); in ltc2688_read_raw()
100 ltc2688_spi_read(void *context, const void *reg, size_t reg_size, void *val, size_t val_size) ltc2688_spi_read() argument
274 ltc2688_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long info) ltc2688_read_raw() argument
322 ltc2688_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long info) ltc2688_write_raw() argument
384 u32 val; ltc2688_reg_bool_get() local
461 long val; ltc2688_dither_freq_set() local
497 u32 val; ltc2688_dac_input_read() local
521 u16 val; ltc2688_dac_input_write() local
750 u32 reg, clk_input, val, tmp[2]; ltc2688_channel_config() local
[all...] |
| /kernel/linux/linux-6.6/drivers/leds/flash/ |
| H A D | leds-mt6360.c | 138 u32 val = level ? MT6360_ISNK_ENMASK(led->led_no) : 0; in mt6360_isnk_brightness_set() local
149 val); in mt6360_isnk_brightness_set()
163 u32 val = level ? MT6360_FLCSEN_MASK(led->led_no) : 0; in mt6360_torch_brightness_set() local
186 val |= MT6360_TORCHEN_MASK; in mt6360_torch_brightness_set()
197 val); in mt6360_torch_brightness_set()
227 u32 val = (brightness - s->min) / s->step; in _mt6360_flash_brightness_set() local
231 MT6360_ISTROBE_MASK, val); in _mt6360_flash_brightness_set()
242 u32 val = state ? MT6360_FLCSEN_MASK(led->led_no) : 0; in mt6360_strobe_set() local
265 val |= MT6360_STROBEN_MASK; in mt6360_strobe_set()
268 val); in mt6360_strobe_set()
319 u32 val = (timeout - s->min) / s->step; mt6360_timeout_set() local
465 u32 val = enable ? mask : 0; mt6360_flash_external_strobe_set() local
602 clamp_align(u32 val, u32 min, u32 max, u32 step) clamp_align() argument
620 u32 val; mt6360_init_isnk_properties() local
698 u32 val; mt6360_init_flash_properties() local
[all...] |
| /kernel/linux/linux-6.6/sound/pci/ca0106/ |
| H A D | ca0106_mixer.c | 65 unsigned int val; in ca0106_spdif_enable() local
71 val = snd_ca0106_ptr_read(emu, CAPTURE_CONTROL, 0) & ~0x1000; in ca0106_spdif_enable()
72 snd_ca0106_ptr_write(emu, CAPTURE_CONTROL, 0, val); in ca0106_spdif_enable()
73 val = inl(emu->port + CA0106_GPIO) & ~0x101; in ca0106_spdif_enable()
74 outl(val, emu->port + CA0106_GPIO); in ca0106_spdif_enable()
80 val = snd_ca0106_ptr_read(emu, CAPTURE_CONTROL, 0) | 0x1000; in ca0106_spdif_enable()
81 snd_ca0106_ptr_write(emu, CAPTURE_CONTROL, 0, val); in ca0106_spdif_enable()
82 val = inl(emu->port + CA0106_GPIO) | 0x101; in ca0106_spdif_enable()
83 outl(val, emu->port + CA0106_GPIO); in ca0106_spdif_enable()
89 unsigned int val in ca0106_set_capture_source() local
96 ca0106_set_i2c_capture_source(struct snd_ca0106 *emu, unsigned int val, int force) ca0106_set_i2c_capture_source() argument
159 unsigned int val; snd_ca0106_shared_spdif_put() local
194 unsigned int val; snd_ca0106_capture_source_put() local
276 unsigned int val; snd_ca0106_capture_mic_line_in_put() local
370 unsigned int val; snd_ca0106_spdif_put_default() local
390 unsigned int val; snd_ca0106_spdif_put_stream() local
[all...] |
| /kernel/linux/linux-6.6/sound/ppc/ |
| H A D | burgundy.c | 46 snd_pmac_burgundy_wcw(struct snd_pmac *chip, unsigned addr, unsigned val) in snd_pmac_burgundy_wcw() argument
48 out_le32(&chip->awacs->codec_ctrl, addr + 0x200c00 + (val & 0xff)); in snd_pmac_burgundy_wcw()
50 out_le32(&chip->awacs->codec_ctrl, addr + 0x200d00 +((val>>8) & 0xff)); in snd_pmac_burgundy_wcw()
52 out_le32(&chip->awacs->codec_ctrl, addr + 0x200e00 +((val>>16) & 0xff)); in snd_pmac_burgundy_wcw()
54 out_le32(&chip->awacs->codec_ctrl, addr + 0x200f00 +((val>>24) & 0xff)); in snd_pmac_burgundy_wcw()
61 unsigned val = 0; in snd_pmac_burgundy_rcw() local
69 val += (in_le32(&chip->awacs->codec_stat) >> 4) & 0xff; in snd_pmac_burgundy_rcw()
74 val += ((in_le32(&chip->awacs->codec_stat)>>4) & 0xff) <<8; in snd_pmac_burgundy_rcw()
79 val += ((in_le32(&chip->awacs->codec_stat)>>4) & 0xff) <<16; in snd_pmac_burgundy_rcw()
84 val in snd_pmac_burgundy_rcw()
92 snd_pmac_burgundy_wcb(struct snd_pmac *chip, unsigned int addr, unsigned int val) snd_pmac_burgundy_wcb() argument
102 unsigned val = 0; snd_pmac_burgundy_rcb() local
320 int oval, val; snd_pmac_burgundy_put_gain() local
365 int val = snd_pmac_burgundy_rcw(chip, addr); snd_pmac_burgundy_get_switch_w() local
380 int val, oval; snd_pmac_burgundy_put_switch_w() local
421 int val = snd_pmac_burgundy_rcb(chip, addr); snd_pmac_burgundy_get_switch_b() local
436 int val, oval; snd_pmac_burgundy_put_switch_b() local
[all...] |
| /device/soc/rockchip/common/vendor/drivers/media/platform/rockchip/isp/ |
| H A D | isp_params_v1x.c | 16 #define BLS_START_H_MAX_IS_VALID(val) ((val) < CIFISP_BLS_START_H_MAX)
17 #define BLS_STOP_H_MAX_IS_VALID(val) ((val) < CIFISP_BLS_STOP_H_MAX)
19 #define BLS_START_V_MAX_IS_VALID(val) ((val) < CIFISP_BLS_START_V_MAX)
20 #define BLS_STOP_V_MAX_IS_VALID(val) ((val) < CIFISP_BLS_STOP_V_MAX)
22 #define BLS_SAMPLE_MAX_IS_VALID(val) ((val) < CIFISP_BLS_SAMPLES_MA
980 u32 val; isp_demosaiclp_config_v12() local
1049 u32 val; isp_rkiesharp_config_v12() local
[all...] |
| /device/soc/rockchip/rk3588/kernel/drivers/media/platform/rockchip/isp/ |
| H A D | isp_params_v1x.c | 16 #define BLS_START_H_MAX_IS_VALID(val) ((val) < CIFISP_BLS_START_H_MAX)
17 #define BLS_STOP_H_MAX_IS_VALID(val) ((val) < CIFISP_BLS_STOP_H_MAX)
19 #define BLS_START_V_MAX_IS_VALID(val) ((val) < CIFISP_BLS_START_V_MAX)
20 #define BLS_STOP_V_MAX_IS_VALID(val) ((val) < CIFISP_BLS_STOP_V_MAX)
22 #define BLS_SAMPLE_MAX_IS_VALID(val) ((val) < CIFISP_BLS_SAMPLES_MA
1222 u32 val; isp_demosaiclp_config_v12() local
1341 u32 val; isp_rkiesharp_config_v12() local
[all...] |
| /kernel/linux/linux-5.10/arch/powerpc/include/asm/ |
| H A D | eeh.h | 225 int (*read_config)(struct eeh_dev *edev, int where, int size, u32 *val);
226 int (*write_config)(struct eeh_dev *edev, int where, int size, u32 val);
318 #define EEH_POSSIBLE_ERROR(val, type) ((val) == (type)~0 && eeh_enabled())
351 #define EEH_POSSIBLE_ERROR(val, type) (0)
370 u8 val = in_8(addr); in eeh_readb() local
371 if (EEH_POSSIBLE_ERROR(val, u8)) in eeh_readb()
373 return val; in eeh_readb()
378 u16 val = in_le16(addr); in eeh_readw() local
379 if (EEH_POSSIBLE_ERROR(val, u1 in eeh_readw()
386 u32 val = in_le32(addr); eeh_readl() local
394 u64 val = in_le64(addr); eeh_readq() local
402 u16 val = in_be16(addr); eeh_readw_be() local
410 u32 val = in_be32(addr); eeh_readl_be() local
418 u64 val = in_be64(addr); eeh_readq_be() local
[all...] |
| /kernel/linux/linux-5.10/drivers/gpio/ |
| H A D | gpio-uniphier.c | 60 unsigned int reg, u32 mask, u32 val) in uniphier_gpio_reg_update()
68 tmp |= mask & val; in uniphier_gpio_reg_update()
74 unsigned int reg, u32 mask, u32 val) in uniphier_gpio_bank_write()
82 mask, val); in uniphier_gpio_bank_write()
87 int val) in uniphier_gpio_offset_write()
94 uniphier_gpio_bank_write(chip, bank, reg, mask, val ? mask : 0); in uniphier_gpio_offset_write()
128 unsigned int offset, int val) in uniphier_gpio_direction_output()
130 uniphier_gpio_offset_write(chip, offset, UNIPHIER_GPIO_PORT_DATA, val); in uniphier_gpio_direction_output()
142 unsigned int offset, int val) in uniphier_gpio_set()
144 uniphier_gpio_offset_write(chip, offset, UNIPHIER_GPIO_PORT_DATA, val); in uniphier_gpio_set()
59 uniphier_gpio_reg_update(struct uniphier_gpio_priv *priv, unsigned int reg, u32 mask, u32 val) uniphier_gpio_reg_update() argument
73 uniphier_gpio_bank_write(struct gpio_chip *chip, unsigned int bank, unsigned int reg, u32 mask, u32 val) uniphier_gpio_bank_write() argument
85 uniphier_gpio_offset_write(struct gpio_chip *chip, unsigned int offset, unsigned int reg, int val) uniphier_gpio_offset_write() argument
127 uniphier_gpio_direction_output(struct gpio_chip *chip, unsigned int offset, int val) uniphier_gpio_direction_output() argument
141 uniphier_gpio_set(struct gpio_chip *chip, unsigned int offset, int val) uniphier_gpio_set() argument
204 u32 val = 0; uniphier_gpio_irq_set_type() local
429 u32 *val = priv->saved_vals; uniphier_gpio_suspend() local
451 const u32 *val = priv->saved_vals; uniphier_gpio_resume() local
[all...] |
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_acp.c | 197 u32 val = 0; in acp_hw_init() local
360 val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); in acp_hw_init()
362 val |= ACP_SOFT_RESET__SoftResetAud_MASK; in acp_hw_init()
363 cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val); in acp_hw_init()
367 val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); in acp_hw_init()
369 (val & ACP_SOFT_RESET__SoftResetAudDone_MASK)) in acp_hw_init()
379 val = cgs_read_register(adev->acp.cgs_device, mmACP_CONTROL); in acp_hw_init()
380 val = val | ACP_CONTROL__ClkEn_MASK; in acp_hw_init()
381 cgs_write_register(adev->acp.cgs_device, mmACP_CONTROL, val); in acp_hw_init()
418 u32 val = 0; acp_hw_fini() local
[all...] |
| /kernel/linux/linux-6.6/arch/powerpc/include/asm/ |
| H A D | eeh.h | 225 int (*read_config)(struct eeh_dev *edev, int where, int size, u32 *val);
226 int (*write_config)(struct eeh_dev *edev, int where, int size, u32 val);
318 #define EEH_POSSIBLE_ERROR(val, type) ((val) == (type)~0 && eeh_enabled())
349 #define EEH_POSSIBLE_ERROR(val, type) (0)
364 u8 val = in_8(addr); in eeh_readb() local
365 if (EEH_POSSIBLE_ERROR(val, u8)) in eeh_readb()
367 return val; in eeh_readb()
372 u16 val = in_le16(addr); in eeh_readw() local
373 if (EEH_POSSIBLE_ERROR(val, u1 in eeh_readw()
380 u32 val = in_le32(addr); eeh_readl() local
388 u64 val = in_le64(addr); eeh_readq() local
396 u16 val = in_be16(addr); eeh_readw_be() local
404 u32 val = in_be32(addr); eeh_readl_be() local
412 u64 val = in_be64(addr); eeh_readq_be() local
[all...] |
| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/ |
| H A D | vlv_suspend.c | 194 u32 val; in vlv_restore_gunit_s0ix_state() local
262 val = intel_uncore_read(uncore, VLV_GTLC_WAKE_CTRL); in vlv_restore_gunit_s0ix_state()
263 val &= VLV_GTLC_ALLOWWAKEREQ; in vlv_restore_gunit_s0ix_state()
264 val |= s->gtlc_wake_ctrl & ~VLV_GTLC_ALLOWWAKEREQ; in vlv_restore_gunit_s0ix_state()
265 intel_uncore_write(uncore, VLV_GTLC_WAKE_CTRL, val); in vlv_restore_gunit_s0ix_state()
267 val = intel_uncore_read(uncore, VLV_GTLC_SURVIVABILITY_REG); in vlv_restore_gunit_s0ix_state()
268 val &= VLV_GFX_CLK_FORCE_ON_BIT; in vlv_restore_gunit_s0ix_state()
269 val |= s->gtlc_survive & ~VLV_GFX_CLK_FORCE_ON_BIT; in vlv_restore_gunit_s0ix_state()
270 intel_uncore_write(uncore, VLV_GTLC_SURVIVABILITY_REG, val); in vlv_restore_gunit_s0ix_state()
282 u32 mask, u32 val) in vlv_wait_for_pw_status()
281 vlv_wait_for_pw_status(struct drm_i915_private *i915, u32 mask, u32 val) vlv_wait_for_pw_status() argument
308 u32 val; vlv_force_gfx_clock() local
337 u32 val; vlv_allow_gt_wake() local
361 u32 val; vlv_wait_for_gt_wells() local
[all...] |
| /kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/dpu1/ |
| H A D | dpu_hw_util.c | 64 u32 val, in dpu_reg_write()
70 name, c->blk_off + reg_off, val); in dpu_reg_write()
71 writel_relaxed(val, c->base_off + c->blk_off + reg_off); in dpu_reg_write()
314 u32 val; in dpu_hw_csc_setup() local
317 val = ((data->csc_mv[0] >> matrix_shift) & 0x1FFF) | in dpu_hw_csc_setup()
319 DPU_REG_WRITE(c, csc_reg_off, val); in dpu_hw_csc_setup()
320 val = ((data->csc_mv[2] >> matrix_shift) & 0x1FFF) | in dpu_hw_csc_setup()
322 DPU_REG_WRITE(c, csc_reg_off + 0x4, val); in dpu_hw_csc_setup()
323 val = ((data->csc_mv[4] >> matrix_shift) & 0x1FFF) | in dpu_hw_csc_setup()
325 DPU_REG_WRITE(c, csc_reg_off + 0x8, val); in dpu_hw_csc_setup()
62 dpu_reg_write(struct dpu_hw_blk_reg_map *c, u32 reg_off, u32 val, const char *name) dpu_reg_write() argument
[all...] |
| /kernel/linux/linux-5.10/drivers/gpu/drm/msm/dsi/pll/ |
| H A D | dsi_pll_28nm_8960.c | 90 u32 val; in pll_28nm_poll_for_ready() local
93 val = pll_read(pll_28nm->mmio + REG_DSI_28nm_8960_PHY_PLL_RDY); in pll_28nm_poll_for_ready()
94 pll_locked = !!(val & DSI_28nm_8960_PHY_PLL_RDY_PLL_RDY); in pll_28nm_poll_for_ready()
115 u32 val, temp, fb_divider; in dsi_pll_28nm_clk_set_rate() local
120 val = VCO_REF_CLK_RATE / 10; in dsi_pll_28nm_clk_set_rate()
121 fb_divider = (temp * VCO_PREF_DIV_RATIO) / val; in dsi_pll_28nm_clk_set_rate()
126 val = pll_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_2); in dsi_pll_28nm_clk_set_rate()
128 val |= (fb_divider >> 8) & 0x07; in dsi_pll_28nm_clk_set_rate()
131 val); in dsi_pll_28nm_clk_set_rate()
133 val in dsi_pll_28nm_clk_set_rate()
265 u32 val; clk_bytediv_set_rate() local
295 u32 val; dsi_pll_28nm_enable_seq() local
[all...] |
| /kernel/linux/linux-5.10/drivers/power/supply/ |
| H A D | ltc2941-battery-gauge.c | 200 enum ltc294x_reg reg, int *val) in ltc294x_get_charge()
209 *val = convert_bin_to_uAh(info, value); in ltc294x_get_charge()
213 static int ltc294x_set_charge_now(const struct ltc294x_info *info, int val) in ltc294x_set_charge_now() argument
220 value = convert_uAh_to_bin(info, val); in ltc294x_set_charge_now()
255 enum ltc294x_reg reg, int val) in ltc294x_set_charge_thr()
260 value = convert_uAh_to_bin(info, val); in ltc294x_set_charge_thr()
274 const struct ltc294x_info *info, int *val) in ltc294x_get_charge_counter()
281 *val = convert_bin_to_uAh(info, value); in ltc294x_get_charge_counter()
285 static int ltc294x_get_voltage(const struct ltc294x_info *info, int *val) in ltc294x_get_voltage() argument
311 *val in ltc294x_get_voltage()
199 ltc294x_get_charge(const struct ltc294x_info *info, enum ltc294x_reg reg, int *val) ltc294x_get_charge() argument
254 ltc294x_set_charge_thr(const struct ltc294x_info *info, enum ltc294x_reg reg, int val) ltc294x_set_charge_thr() argument
273 ltc294x_get_charge_counter( const struct ltc294x_info *info, int *val) ltc294x_get_charge_counter() argument
315 ltc294x_get_current(const struct ltc294x_info *info, int *val) ltc294x_get_current() argument
336 ltc294x_get_temperature(const struct ltc294x_info *info, int *val) ltc294x_get_temperature() argument
357 ltc294x_get_property(struct power_supply *psy, enum power_supply_property prop, union power_supply_propval *val) ltc294x_get_property() argument
386 ltc294x_set_property(struct power_supply *psy, enum power_supply_property psp, const union power_supply_propval *val) ltc294x_set_property() argument
[all...] |
| /kernel/linux/linux-5.10/drivers/media/rc/ |
| H A D | mtk-cir.c | 152 u32 val; in mtk_chk_period() local
158 val = DIV_ROUND_CLOSEST(clk_get_rate(ir->bus), in mtk_chk_period()
163 dev_dbg(ir->dev, "@chkperiod = %08x\n", val); in mtk_chk_period()
165 return val; in mtk_chk_period()
168 static void mtk_w32_mask(struct mtk_ir *ir, u32 val, u32 mask, unsigned int reg) in mtk_w32_mask() argument
173 tmp = (tmp & ~mask) | val; in mtk_w32_mask()
177 static void mtk_w32(struct mtk_ir *ir, u32 val, unsigned int reg) in mtk_w32() argument
179 __raw_writel(val, ir->base + reg); in mtk_w32()
189 u32 val; in mtk_irq_disable() local
191 val in mtk_irq_disable()
197 u32 val; mtk_irq_enable() local
207 u32 i, j, val; mtk_ir_irq() local
297 u32 val; mtk_ir_probe() local
[all...] |
| /kernel/linux/linux-5.10/drivers/regulator/ |
| H A D | lp3972.c | 188 u16 val = 0; in lp3972_reg_read() local
192 lp3972_i2c_read(lp3972->i2c, reg, 1, &val); in lp3972_reg_read()
195 (unsigned)val & 0xff); in lp3972_reg_read()
199 return val & 0xff; in lp3972_reg_read()
202 static int lp3972_set_bits(struct lp3972 *lp3972, u8 reg, u16 mask, u16 val) in lp3972_set_bits() argument
211 tmp = (tmp & ~mask) | val; in lp3972_set_bits()
214 (unsigned)val & 0xff); in lp3972_set_bits()
226 u16 val; in lp3972_ldo_is_enabled() local
228 val = lp3972_reg_read(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo)); in lp3972_ldo_is_enabled()
229 return !!(val in lp3972_ldo_is_enabled()
257 u16 val, reg; lp3972_ldo_get_voltage_sel() local
319 u16 val; lp3972_dcdc_is_enabled() local
330 u16 val; lp3972_dcdc_enable() local
342 u16 val; lp3972_dcdc_disable() local
504 u16 val; lp3972_i2c_probe() local
[all...] |
| /kernel/linux/linux-5.10/drivers/spi/ |
| H A D | spi-omap-uwire.c | 108 static inline void uwire_write_reg(int idx, u16 val) in uwire_write_reg() argument
110 __raw_writew(val, uwire_base + (idx << uwire_idx_shift)); in uwire_write_reg()
120 u16 w, val = 0; in omap_uwire_configure_mode() local
124 val ^= 0x03; in omap_uwire_configure_mode()
125 val = flags & 0x3f; in omap_uwire_configure_mode()
137 w |= val << shift; in omap_uwire_configure_mode()
141 static int wait_uwire_csr_flag(u16 mask, u16 val, int might_not_catch) in wait_uwire_csr_flag() argument
149 if ((w & mask) == val) in wait_uwire_csr_flag()
153 "mask=%#06x val=%#06x\n", in wait_uwire_csr_flag()
154 __func__, w, mask, val); in wait_uwire_csr_flag()
210 u16 val, w; uwire_txrx() local
553 int val = omap_readl(OMAP7XX_IO_CONF_9) & ~0x00EEE000; omap_uwire_init() local
[all...] |
| /kernel/linux/linux-5.10/drivers/staging/comedi/drivers/ |
| H A D | comedi_8254.c | 127 unsigned int val; in __i8254_read() local
133 val = readb(i8254->mmio + reg_offset); in __i8254_read()
135 val = inb(i8254->iobase + reg_offset); in __i8254_read()
139 val = readw(i8254->mmio + reg_offset); in __i8254_read()
141 val = inw(i8254->iobase + reg_offset); in __i8254_read()
145 val = readl(i8254->mmio + reg_offset); in __i8254_read()
147 val = inl(i8254->iobase + reg_offset); in __i8254_read()
150 return val & 0xff; in __i8254_read()
154 unsigned int val, unsigned int reg) in __i8254_write()
162 writeb(val, i825 in __i8254_write()
153 __i8254_write(struct comedi_8254 *i8254, unsigned int val, unsigned int reg) __i8254_write() argument
207 unsigned int val; comedi_8254_read() local
230 comedi_8254_write(struct comedi_8254 *i8254, unsigned int counter, unsigned int val) comedi_8254_write() argument
280 comedi_8254_load(struct comedi_8254 *i8254, unsigned int counter, unsigned int val, unsigned int mode) comedi_8254_load() argument
[all...] |
| /kernel/linux/linux-6.6/drivers/watchdog/ |
| H A D | imx7ulp_wdt.c | 70 u32 val = readl(base + WDOG_CS); in imx7ulp_wdt_wait_ulk() local
72 if (!(val & WDOG_CS_ULK) && in imx7ulp_wdt_wait_ulk()
73 readl_poll_timeout_atomic(base + WDOG_CS, val, in imx7ulp_wdt_wait_ulk()
74 val & WDOG_CS_ULK, 0, in imx7ulp_wdt_wait_ulk()
84 u32 val = readl(wdt->base + WDOG_CS); in imx7ulp_wdt_wait_rcs() local
85 u64 timeout = (val & WDOG_CS_PRES) ? in imx7ulp_wdt_wait_rcs()
87 unsigned long wait_min = (val & WDOG_CS_PRES) ? in imx7ulp_wdt_wait_rcs()
90 if (!(val & WDOG_CS_RCS) && in imx7ulp_wdt_wait_rcs()
91 readl_poll_timeout(wdt->base + WDOG_CS, val, val in imx7ulp_wdt_wait_rcs()
104 u32 val = readl(wdt->base + WDOG_CS); _imx7ulp_wdt_enable() local
131 u32 val; imx7ulp_wdt_enable() local
189 u32 val; imx7ulp_wdt_set_timeout() local
243 u32 val; _imx7ulp_wdt_init() local
279 u32 val = WDOG_CS_CMD32EN | WDOG_CS_CLK | WDOG_CS_UPDATE | imx7ulp_wdt_init() local
[all...] |