Lines Matching refs:val
194 u32 val;
262 val = intel_uncore_read(uncore, VLV_GTLC_WAKE_CTRL);
263 val &= VLV_GTLC_ALLOWWAKEREQ;
264 val |= s->gtlc_wake_ctrl & ~VLV_GTLC_ALLOWWAKEREQ;
265 intel_uncore_write(uncore, VLV_GTLC_WAKE_CTRL, val);
267 val = intel_uncore_read(uncore, VLV_GTLC_SURVIVABILITY_REG);
268 val &= VLV_GFX_CLK_FORCE_ON_BIT;
269 val |= s->gtlc_survive & ~VLV_GFX_CLK_FORCE_ON_BIT;
270 intel_uncore_write(uncore, VLV_GTLC_SURVIVABILITY_REG, val);
282 u32 mask, u32 val)
297 == val, 3);
308 u32 val;
311 val = intel_uncore_read(uncore, VLV_GTLC_SURVIVABILITY_REG);
312 val &= ~VLV_GFX_CLK_FORCE_ON_BIT;
314 val |= VLV_GFX_CLK_FORCE_ON_BIT;
315 intel_uncore_write(uncore, VLV_GTLC_SURVIVABILITY_REG, val);
337 u32 val;
340 val = intel_uncore_read(uncore, VLV_GTLC_WAKE_CTRL);
341 val &= ~VLV_GTLC_ALLOWWAKEREQ;
343 val |= VLV_GTLC_ALLOWWAKEREQ;
344 intel_uncore_write(uncore, VLV_GTLC_WAKE_CTRL, val);
348 val = allow ? mask : 0;
350 err = vlv_wait_for_pw_status(i915, mask, val);
361 u32 val;
364 val = wait_for_on ? mask : 0;
373 if (vlv_wait_for_pw_status(dev_priv, mask, val))