Lines Matching refs:val
152 u32 val;
158 val = DIV_ROUND_CLOSEST(clk_get_rate(ir->bus),
163 dev_dbg(ir->dev, "@chkperiod = %08x\n", val);
165 return val;
168 static void mtk_w32_mask(struct mtk_ir *ir, u32 val, u32 mask, unsigned int reg)
173 tmp = (tmp & ~mask) | val;
177 static void mtk_w32(struct mtk_ir *ir, u32 val, unsigned int reg)
179 __raw_writel(val, ir->base + reg);
189 u32 val;
191 val = mtk_r32(ir, ir->data->regs[MTK_IRINT_EN_REG]);
192 mtk_w32(ir, val & ~mask, ir->data->regs[MTK_IRINT_EN_REG]);
197 u32 val;
199 val = mtk_r32(ir, ir->data->regs[MTK_IRINT_EN_REG]);
200 mtk_w32(ir, val | mask, ir->data->regs[MTK_IRINT_EN_REG]);
207 u32 i, j, val;
227 val = mtk_r32(ir, mtk_chkdata_reg(ir, i));
228 dev_dbg(ir->dev, "@reg%d=0x%08x\n", i, val);
231 wid = (val & (MTK_WIDTH_MASK << j * 8)) >> j * 8;
297 u32 val;
387 val = (mtk_chk_period(ir) << ir->data->fields[MTK_CHK_PERIOD].offset) &
389 mtk_w32_mask(ir, val, ir->data->fields[MTK_CHK_PERIOD].mask,
396 val = (ir->data->hw_period << ir->data->fields[MTK_HW_PERIOD].offset) &
398 mtk_w32_mask(ir, val, ir->data->fields[MTK_HW_PERIOD].mask,
405 val = mtk_r32(ir, MTK_CONFIG_HIGH_REG);
406 val |= MTK_OK_COUNT(ir->data->ok_count) | MTK_PWM_EN | MTK_IR_EN;
407 mtk_w32(ir, val, MTK_CONFIG_HIGH_REG);