/third_party/node/deps/openssl/config/archs/darwin-i386-cc/asm_avx2/crypto/ripemd/ |
H A D | rmd-586.S | 8 .byte 243,15,30,251
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/third_party/node/deps/v8/src/codegen/arm64/ |
H A D | macro-assembler-arm64.h | 1105 // be 16 byte aligned. 1122 // stack pointer must be 16 byte aligned. 1523 byte* pc);
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H A D | macro-assembler-arm64.cc | 455 // Of the 4 bytes, only one byte is non-zero. in Movi32bitHelper() 463 // Of the 4 bytes, only one byte is not 0xFF. in Movi32bitHelper() 1204 // to be pushed using sp, whilst maintaining 16-byte alignment for sp in PushHelper() 1242 // registers to be popped using sp, whilst maintaining 16-byte alignment in PopHelper() 1332 // Arm64 requires the stack pointer to be 16-byte aligned prior to address in AssertSpAligned() 1873 RelocInfo::Mode rmode, byte* pc) { in CalculateTargetOffset() 2325 // The stack pointer in arm64 needs to be 16-byte aligned. We might need to in InvokePrologue()
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/third_party/node/deps/v8/src/codegen/riscv64/ |
H A D | constants-riscv64.h | 1951 static Instruction* At(byte* pc) {
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/third_party/node/deps/openssl/config/archs/solaris-x86-gcc/asm/crypto/ripemd/ |
H A D | rmd-586.S | 9 .byte 243,15,30,251
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/third_party/node/deps/openssl/config/archs/solaris-x86-gcc/asm_avx2/crypto/ripemd/ |
H A D | rmd-586.S | 9 .byte 243,15,30,251
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/third_party/node/deps/openssl/config/archs/linux-elf/asm/crypto/ripemd/ |
H A D | rmd-586.S | 9 .byte 243,15,30,251
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/third_party/node/deps/openssl/config/archs/linux-aarch64/asm_avx2/crypto/sha/ |
H A D | sha1-armv8.S | 1209 .byte 83,72,65,49,32,98,108,111,99,107,32,116,114,97,110,115,102,111,114,109,32,102,111,114,32,65,82,77,118,56,44,32,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0
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H A D | sha512-armv8.S | 19 // Performance in cycles per processed byte and improvement coefficient 1085 .byte 83,72,65,53,49,50,32,98,108,111,99,107,32,116,114,97,110,115,102,111,114,109,32,102,111,114,32,65,82,77,118,56,44,32,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0
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/kernel/linux/linux-6.6/lib/ |
H A D | test_bpf.c | 2186 * combinations of bytes. Each byte in the 64-bit word is constructed as 2210 int byte; in __bpf_fill_ld_imm64_bytes() local 2213 byte = (base1 & mask1) | (rand & ~mask1); in __bpf_fill_ld_imm64_bytes() 2215 byte = (base2 & mask2) | (rand & ~mask2); in __bpf_fill_ld_imm64_bytes() 2216 imm = (imm << 8) | byte; in __bpf_fill_ld_imm64_bytes() 8366 "ST_MEM_B: Store/Load byte: max negative", 8379 "ST_MEM_B: Store/Load byte: max positive", 8392 "STX_MEM_B: Store/Load byte: max negative", 10405 "LD_IND byte frag", 10477 "LD_ABS byte fra [all...] |
/kernel/linux/linux-5.10/drivers/net/ethernet/freescale/ |
H A D | fec_main.c | 9 * Once I get this working, I will use 64 or 128 byte CPM buffers, which 191 module_param_array(macaddr, byte, NULL, 0); 216 * 2048 byte skbufs are allocated. However, alignment requirements
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/kernel/linux/linux-5.10/drivers/net/wireless/ath/wil6210/ |
H A D | wmi.c | 27 module_param(led_id, byte, 0444);
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/kernel/linux/linux-6.6/drivers/net/wireless/ath/wil6210/ |
H A D | wmi.c | 27 module_param(led_id, byte, 0444);
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/third_party/node/deps/openssl/config/archs/darwin64-arm64-cc/asm/crypto/sha/ |
H A D | sha512-armv8.S | 19 // Performance in cycles per processed byte and improvement coefficient 1085 .byte 83,72,65,53,49,50,32,98,108,111,99,107,32,116,114,97,110,115,102,111,114,109,32,102,111,114,32,65,82,77,118,56,44,32,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0
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/third_party/node/deps/openssl/config/archs/linux-aarch64/asm/crypto/sha/ |
H A D | sha512-armv8.S | 19 // Performance in cycles per processed byte and improvement coefficient 1085 .byte 83,72,65,53,49,50,32,98,108,111,99,107,32,116,114,97,110,115,102,111,114,109,32,102,111,114,32,65,82,77,118,56,44,32,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0
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/third_party/node/deps/openssl/config/archs/darwin64-arm64-cc/asm_avx2/crypto/sha/ |
H A D | sha512-armv8.S | 19 // Performance in cycles per processed byte and improvement coefficient 1085 .byte 83,72,65,53,49,50,32,98,108,111,99,107,32,116,114,97,110,115,102,111,114,109,32,102,111,114,32,65,82,77,118,56,44,32,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0
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/third_party/node/deps/v8/src/codegen/mips64/ |
H A D | assembler-mips64.h | 1460 // Writes a single byte or word of data in the code stream. Used for 1907 byte* pc_for_safepoint_;
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/third_party/node/deps/v8/src/codegen/mips/ |
H A D | assembler-mips.h | 1400 // Writes a single byte or word of data in the code stream. Used for 1879 byte* pc_for_safepoint_;
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/third_party/node/deps/v8/src/codegen/loong64/ |
H A D | assembler-loong64.cc | 2126 byte* new_start = new_buffer->start(); in GrowBuffer()
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/third_party/node/deps/v8/src/codegen/ppc/ |
H A D | constants-ppc.h | 2918 // bool InstructionSetsConditionCodes(byte* ptr) { 3151 static Instruction* At(byte* pc) { in At()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 4572 unsigned byte = fieldFromInstruction(Val, 8, 2); in DecodeT2SOImm() local 4574 switch (byte) { in DecodeT2SOImm()
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/third_party/vixl/test/aarch32/ |
H A D | test-assembler-aarch32.cc | 169 ExecuteMemory(masm.GetBuffer()->GetStartAddress<byte*>(), \ 1473 // AlignDown to 4 byte as the literals will be 4 byte aligned. in EmitLdrdLiteralTest() 1922 // Generate a nop to break the 4-byte alignment. in GenerateLdrLiteralTriggerPoolEmission() 1999 // Generate a nop to break the 4-byte alignment. in GenerateLdrLiteralRangeTest() 2248 // On T32 the PC will be 4-byte aligned to compute the range. The in TEST() 2258 // 4-byte aligned. Otherwise this test would insert the exact number of in TEST() 3119 byte buffer[1024]; in TEST_NOASM() 4094 // to only a two-byte boundary. in TEST_T32() 6184 // Make sure we start with a 4-byte aligne [all...] |
/third_party/python/Python/ |
H A D | compile.c | 12 * 5. Optimize the byte code (peephole optimizations). 7440 write_except_byte(struct assembler *a, int byte) { in write_except_byte() argument 7442 p[a->a_except_table_off++] = byte; in write_except_byte()
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/kernel/linux/linux-6.6/drivers/scsi/lpfc/ |
H A D | lpfc_init.c | 5719 * block_cnt is count of 512 byte blocks for the entire minute, in lpfc_cmf_stats_timer() 6101 phba->rx_block_cnt += div_u64(rcv, 512); /* save 512 byte block cnt */ in lpfc_cmf_timer() 9764 * to be 16-byte aligned. Also align the virtual memory as each in lpfc_create_bootstrap_mbox() 13529 lpfc_cgn_crc32(uint32_t crc, u8 byte) in lpfc_cgn_crc32() argument 13538 if (msb ^ (byte & 1)) { in lpfc_cgn_crc32() 13542 byte >>= 1; in lpfc_cgn_crc32() 13888 * to use this option, 128-byte WQEs must be used. in lpfc_get_sli4_parameters()
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/kernel/linux/linux-5.10/drivers/net/ethernet/broadcom/ |
H A D | tg3.c | 7734 /* Avoid the 8byte DMA problem */ in tg3_tx_frag_set() 9222 * Older PCIe devices only support the 128 byte 12069 /* adjustments to start on required 4 byte boundary */ in tg3_get_eeprom() 12085 /* read bytes up to the last 4 byte boundary */ in tg3_get_eeprom() 12108 /* read last bytes not ending on 4 byte boundary */ in tg3_get_eeprom() 12145 /* adjustments to start on required 4 byte boundary */ in tg3_set_eeprom() 12157 /* adjustments to end on required 4 byte boundary */ in tg3_set_eeprom() 12884 * the byte order as it exists in NVRAM. in tg3_vpd_readblock() 16864 /* Initialize data/descriptor byte/word swapping. */ in tg3_get_invariants() 17107 u8 byte; in tg3_calc_dma_bndry() local [all...] |