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/kernel/linux/linux-6.6/drivers/gpu/host1x/
H A Dsyncpt.c40 static void host1x_syncpt_base_free(struct host1x_syncpt_base *base) in host1x_syncpt_base_free() argument
42 if (base) in host1x_syncpt_base_free()
43 base->requested = false; in host1x_syncpt_base_free()
78 sp->base = host1x_syncpt_base_request(host); in host1x_syncpt_alloc()
79 if (!sp->base) in host1x_syncpt_alloc()
100 host1x_syncpt_base_free(sp->base); in host1x_syncpt_alloc()
101 sp->base = NULL; in host1x_syncpt_alloc()
194 * Get the current syncpoint base
350 host1x_syncpt_base_free(sp->base); in syncpt_release()
352 sp->base in syncpt_release()
500 host1x_syncpt_base_id(struct host1x_syncpt_base *base) host1x_syncpt_base_id() argument
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/kernel/linux/linux-6.6/drivers/irqchip/
H A Dirq-hip04.c16 * associated CPU. The base address of the CPU interface is usually
118 void __iomem *base = hip04_dist_base(d); in hip04_irq_set_type() local
133 ret = gic_configure_irq(irq, type, base + GIC_DIST_CONFIG, NULL); in hip04_irq_set_type()
230 void __iomem *base = intc->dist_base; in hip04_get_cpumask() local
234 mask = readl_relaxed(base + GIC_DIST_TARGET + i * 2); in hip04_get_cpumask()
251 void __iomem *base = intc->dist_base; in hip04_irq_dist_init() local
253 writel_relaxed(0, base + GIC_DIST_CTRL); in hip04_irq_dist_init()
261 writel_relaxed(cpumask, base + GIC_DIST_TARGET + ((i * 2) & ~3)); in hip04_irq_dist_init()
263 gic_dist_config(base, nr_irqs, NULL); in hip04_irq_dist_init()
265 writel_relaxed(1, base in hip04_irq_dist_init()
271 void __iomem *base = intc->cpu_base; hip04_irq_cpu_init() local
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/kernel/linux/linux-6.6/tools/perf/jvmti/
H A Djvmti_agent.c133 char *base, *p; in create_jit_cache_dir() local
141 base = getenv("JITDUMPDIR"); in create_jit_cache_dir()
142 if (!base) in create_jit_cache_dir()
143 base = getenv("HOME"); in create_jit_cache_dir()
144 if (!base) in create_jit_cache_dir()
145 base = "."; in create_jit_cache_dir()
149 ret = snprintf(jit_path, PATH_MAX, "%s/.debug/", base); in create_jit_cache_dir()
153 " HOME variables", base); in create_jit_cache_dir()
164 ret = snprintf(jit_path, PATH_MAX, "%s/.debug/jit", base); in create_jit_cache_dir()
168 " JITDUMPDIR, and HOME variables", base); in create_jit_cache_dir()
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/kernel/linux/linux-6.6/drivers/scsi/aic7xxx/
H A Daic7xxx_osm_pci.c323 ahc_linux_pci_reserve_io_region(struct ahc_softc *ahc, resource_size_t *base) in ahc_linux_pci_reserve_io_region() argument
328 *base = pci_resource_start(ahc->dev_softc, 0); in ahc_linux_pci_reserve_io_region()
329 if (*base == 0) in ahc_linux_pci_reserve_io_region()
331 if (!request_region(*base, 256, "aic7xxx")) in ahc_linux_pci_reserve_io_region()
366 resource_size_t base; in ahc_pci_map_registers() local
375 base = 0; in ahc_pci_map_registers()
377 error = ahc_linux_pci_reserve_mem_region(ahc, &base, &maddr); in ahc_pci_map_registers()
379 ahc->platform_data->mem_busaddr = base; in ahc_pci_map_registers()
409 (unsigned long long)base); in ahc_pci_map_registers()
417 error = ahc_linux_pci_reserve_io_region(ahc, &base); in ahc_pci_map_registers()
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/kernel/linux/linux-6.6/kernel/time/
H A Dtimer_list.c60 print_active_timers(struct seq_file *m, struct hrtimer_clock_base *base, in print_active_timers() argument
73 raw_spin_lock_irqsave(&base->cpu_base->lock, flags); in print_active_timers()
75 curr = timerqueue_getnext(&base->active); in print_active_timers()
78 * we have to unlock the base when printing: in print_active_timers()
89 raw_spin_unlock_irqrestore(&base->cpu_base->lock, flags); in print_active_timers()
95 raw_spin_unlock_irqrestore(&base->cpu_base->lock, flags); in print_active_timers()
99 print_base(struct seq_file *m, struct hrtimer_clock_base *base, u64 now) in print_base() argument
101 SEQ_printf(m, " .base: %pK\n", base); in print_base()
102 SEQ_printf(m, " .index: %d\n", base in print_base()
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/third_party/backends/backend/
H A Dplustek-pp_procfs.c72 static struct proc_dir_entry *base = NULL; variable
339 destroy_proc_entry( base, &ps->procDir.entry ); in destroy_proc_tree()
353 base = new_entry( _DRV_NAME, S_IFDIR, &proc_root ); in ProcFsInitialize()
355 base = new_entry( _DRV_NAME, S_IFDIR, NULL ); in ProcFsInitialize()
358 if( NULL != base ) { in ProcFsInitialize()
362 binfo = new_entry( "info", 0, base ); in ProcFsInitialize()
372 /** cleanup the base entry
378 if( NULL != base ) { in ProcFsShutdown()
381 destroy_proc_entry( base, &binfo ); in ProcFsShutdown()
384 destroy_proc_entry( &proc_root, &base ); in ProcFsShutdown()
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/third_party/libuv/test/
H A Decho-server.c54 free(wr->buf.base); in after_write()
92 free(buf->base); in after_read()
102 free(buf->base); in after_read()
113 if (buf->base[i] == 'Q') { in after_read()
114 if (i + 1 < nread && buf->base[i + 1] == 'S') { in after_read()
116 if (i + 2 < nread && buf->base[i + 2] == 'S') in after_read()
118 if (i + 2 < nread && buf->base[i + 2] == 'H') in after_read()
126 free(buf->base); in after_read()
137 wr->buf = uv_buf_init(buf->base, nread); in after_read()
156 buf->base in echo_alloc()
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/third_party/libdrm/nouveau/
H A Dabi16.c50 nv04->base.channel = req.channel; in abi16_chan_nv04()
51 nv04->base.pushbuf = req.pushbuf_domains; in abi16_chan_nv04()
53 nv04->base.object->handle = req.channel; in abi16_chan_nv04()
54 nv04->base.object->length = sizeof(*nv04); in abi16_chan_nv04()
71 nvc0->base.channel = req.channel; in abi16_chan_nvc0()
72 nvc0->base.pushbuf = req.pushbuf_domains; in abi16_chan_nvc0()
74 nvc0->base.object->handle = req.channel; in abi16_chan_nvc0()
75 nvc0->base.object->length = sizeof(*nvc0); in abi16_chan_nvc0()
97 nve0->base.channel = req.channel; in abi16_chan_nve0()
98 nve0->base in abi16_chan_nve0()
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/third_party/mesa3d/bin/
H A Dgen_release_notes.py256 base = version.split('.')
257 base[2] = str(int(base[2]) + 1)
258 return '.'.join(base)
274 base = version.split('.')
275 if base[1] == '0':
276 base[0] = str(int(base[0]) - 1)
277 base[1] = '3'
279 base[
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/third_party/mesa3d/src/gallium/winsys/svga/drm/
H A Dvmw_buffer.c59 struct pb_buffer base; member
84 struct pb_manager base; member
224 pipe_reference_init(&buf->base.reference, 1); in vmw_gmr_bufmgr_create_buffer()
225 buf->base.alignment_log2 = util_logbase2(pb_desc->alignment); in vmw_gmr_bufmgr_create_buffer()
226 buf->base.usage = pb_desc->usage & ~VMW_BUFFER_USAGE_SHARED; in vmw_gmr_bufmgr_create_buffer()
227 buf->base.vtbl = &vmw_gmr_buffer_vtbl; in vmw_gmr_bufmgr_create_buffer()
229 buf->base.size = size; in vmw_gmr_bufmgr_create_buffer()
238 return &buf->base; in vmw_gmr_bufmgr_create_buffer()
270 mgr->base.destroy = vmw_gmr_bufmgr_destroy; in vmw_gmr_bufmgr_create()
271 mgr->base in vmw_gmr_bufmgr_create()
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/third_party/node/deps/v8/src/d8/
H A Dd8-platforms.cc12 #include "src/base/logging.h"
13 #include "src/base/macros.h"
14 #include "src/base/platform/mutex.h"
15 #include "src/base/platform/platform.h"
16 #include "src/base/platform/time.h"
17 #include "src/base/utils/random-number-generator.h"
96 return MonotonicallyIncreasingTime() * base::Time::kMillisecondsPerSecond;
153 base::MutexGuard lock_guard(&mutex_);
249 base::MutexGuard lock_guard(&runner->platform_->mutex_); in operator ()()
262 base
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/third_party/node/deps/v8/src/codegen/
H A Dsource-position-table.cc7 #include "src/base/export-template.h"
8 #include "src/base/logging.h"
34 using MoreBit = base::BitField8<bool, 7, 1>;
35 using ValueBits = base::BitField8<unsigned, 0, 7>;
90 T DecodeInt(base::Vector<const byte> bytes, int* index) { in DecodeInt()
108 void DecodeEntry(base::Vector<const byte> bytes, int* index, in DecodeEntry()
121 base::Vector<const byte> VectorFromByteArray(ByteArray byte_array) { in VectorFromByteArray()
122 return base::Vector<const byte>(byte_array.GetDataStartAddress(), in VectorFromByteArray()
203 base::OwnedVector<byte>
205 if (bytes_.empty()) return base in ToSourcePositionTableVector()
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/third_party/node/deps/v8/src/execution/
H A Dframes-inl.h8 #include "src/base/memory.h"
52 return FromAddress(base::Memory<Address>(address() + offset)); in next()
56 return base::Memory<Address>(address() + StackHandlerConstants::kNextOffset); in next_address()
132 return Object(base::Memory<Address>(fp() + receiverOffset)); in receiver_slot_object()
137 base::Memory<Address>(fp() + BuiltinExitFrameConstants::kArgcOffset)); in argc_slot_object()
142 base::Memory<Address>(fp() + BuiltinExitFrameConstants::kTargetOffset)); in target_slot_object()
146 return Object(base::Memory<Address>( in new_target_slot_object()
154 return Object(base::Memory<Address>(GetExpressionAddress(index))); in GetExpression()
158 base::Memory<Address>(GetExpressionAddress(index)) = value.ptr(); in SetExpression()
162 return base in caller_fp()
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/third_party/node/deps/v8/src/profiler/
H A Dcpu-profiler.h11 #include "src/base/platform/condition-variable.h"
12 #include "src/base/platform/mutex.h"
13 #include "src/base/platform/time.h"
165 class V8_EXPORT_PRIVATE ProfilerEventsProcessor : public base::Thread,
184 virtual void SetSamplingInterval(base::TimeDelta) {} in SetSamplingInterval()
205 base::ConditionVariable running_cond_;
206 base::Mutex running_mutex_;
220 base::TimeDelta period, bool use_precise_sampling);
230 void SetSamplingInterval(base::TimeDelta period) override;
242 base in sampler()
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/third_party/mesa3d/src/gallium/frontends/nine/
H A Dpixelshader9.c45 hr = NineUnknown_ctor(&This->base, pParams); in NinePixelShader9_ctor()
53 device = This->base.device; in NinePixelShader9_ctor()
114 if (This->base.device) { in NinePixelShader9_dtor()
115 struct pipe_context *pipe = nine_context_get_pipe_multithread(This->base.device); in NinePixelShader9_dtor()
120 if (This->base.device->context.cso_shader.ps == var->cso) { in NinePixelShader9_dtor()
125 This->base.device->context.commit |= NINE_STATE_COMMIT_PS; in NinePixelShader9_dtor()
134 if (This->ff_cso == This->base.device->context.cso_shader.ps) { in NinePixelShader9_dtor()
136 This->base.device->context.commit |= NINE_STATE_COMMIT_PS; in NinePixelShader9_dtor()
147 NineUnknown_dtor(&This->base); in NinePixelShader9_dtor()
177 struct pipe_context *pipe = This->base in NinePixelShader9_GetVariant()
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/third_party/mesa3d/src/virtio/vulkan/
H A Dvn_wsi.c73 &physical_dev->instance->base.base, pName); in vn_wsi_proc_addr()
80 &physical_dev->instance->base.base.alloc; in vn_wsi_init()
88 if (physical_dev->base.base.supported_extensions in vn_wsi_init()
92 physical_dev->base.base.wsi_device = &physical_dev->wsi_device; in vn_wsi_init()
101 &physical_dev->instance->base.base in vn_wsi_fini()
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/third_party/mesa3d/src/gallium/auxiliary/pipe-loader/
H A Dpipe_loader_sw.c49 struct pipe_loader_device base; member
128 sdev->base.type = PIPE_LOADER_DEVICE_SOFTWARE; in pipe_loader_sw_probe_init_common()
129 sdev->base.driver_name = "swrast"; in pipe_loader_sw_probe_init_common()
130 sdev->base.ops = &pipe_loader_sw_ops; in pipe_loader_sw_probe_init_common()
163 sdev->base.type = PIPE_LOADER_DEVICE_PLATFORM; in pipe_loader_vk_probe_init_common()
164 sdev->base.driver_name = "kopper"; in pipe_loader_vk_probe_init_common()
165 sdev->base.ops = &pipe_loader_vk_ops; in pipe_loader_vk_probe_init_common()
226 *devs = &sdev->base; in pipe_loader_sw_probe_dri()
256 *devs = &sdev->base; in pipe_loader_vk_probe_dri()
292 *devs = &sdev->base; in pipe_loader_sw_probe_kms()
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/third_party/mesa3d/src/gallium/drivers/svga/
H A Dsvga_swtnl_backend.c398 svga_render->base.max_vertex_buffer_bytes = 64*1024/10; in svga_vbuf_render_create()
399 svga_render->base.max_indices = 65536; in svga_vbuf_render_create()
400 svga_render->base.get_vertex_info = svga_vbuf_render_get_vertex_info; in svga_vbuf_render_create()
401 svga_render->base.allocate_vertices = svga_vbuf_render_allocate_vertices; in svga_vbuf_render_create()
402 svga_render->base.map_vertices = svga_vbuf_render_map_vertices; in svga_vbuf_render_create()
403 svga_render->base.unmap_vertices = svga_vbuf_render_unmap_vertices; in svga_vbuf_render_create()
404 svga_render->base.set_primitive = svga_vbuf_render_set_primitive; in svga_vbuf_render_create()
405 svga_render->base.draw_elements = svga_vbuf_render_draw_elements; in svga_vbuf_render_create()
406 svga_render->base.draw_arrays = svga_vbuf_render_draw_arrays; in svga_vbuf_render_create()
407 svga_render->base in svga_vbuf_render_create()
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/third_party/node/deps/openssl/openssl/providers/implementations/ciphers/
H A Dcipher_chacha20_poly1305.c48 ossl_cipher_generic_initkey(&ctx->base, CHACHA20_POLY1305_KEYLEN * 8, in chacha20_poly1305_newctx()
70 if (dctx != NULL && dctx->base.tlsmac != NULL && dctx->base.alloced) { in chacha20_poly1305_dupctx()
71 dctx->base.tlsmac = OPENSSL_memdup(dctx->base.tlsmac, in chacha20_poly1305_dupctx()
72 dctx->base.tlsmacsize); in chacha20_poly1305_dupctx()
73 if (dctx->base.tlsmac == NULL) { in chacha20_poly1305_dupctx()
133 if (!ctx->base.enc) { in chacha20_poly1305_get_ctx_params()
168 (PROV_CIPHER_HW_CHACHA20_POLY1305 *)ctx->base.hw; in chacha20_poly1305_set_ctx_params()
207 if (ctx->base in chacha20_poly1305_set_ctx_params()
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/third_party/skia/third_party/externals/abseil-cpp/absl/random/
H A Dlog_uniform_int_distribution_test.cc27 #include "absl/base/internal/raw_logging.h"
71 const auto base = param.base(); in TYPED_TEST() local
72 absl::log_uniform_int_distribution<TypeParam> before(min, max, base); in TYPED_TEST()
75 EXPECT_EQ(before.base(), param.base()); in TYPED_TEST()
89 EXPECT_NE(before.base(), after.base()); in TYPED_TEST()
97 EXPECT_EQ(before.base(), after.base()); in TYPED_TEST()
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/third_party/mesa3d/src/intel/vulkan/
H A Danv_pipeline.c184 vk_object_base_init(&device->vk, &pipeline->base, in anv_pipeline_init()
218 vk_object_base_finish(&pipeline->base); in anv_pipeline_finish()
322 populate_base_prog_key(device, robust_buffer_acccess, &key->base); in populate_vs_prog_key()
337 populate_base_prog_key(device, robust_buffer_acccess, &key->base); in populate_tcs_prog_key()
349 populate_base_prog_key(device, robust_buffer_acccess, &key->base); in populate_tes_prog_key()
359 populate_base_prog_key(device, robust_buffer_acccess, &key->base); in populate_gs_prog_key()
421 populate_base_prog_key(device, robust_buffer_access, &key->base); in populate_task_prog_key()
431 populate_base_prog_key(device, robust_buffer_access, &key->base); in populate_mesh_prog_key()
443 const struct anv_device *device = pipeline->base.device; in populate_wm_prog_key()
447 populate_base_prog_key(device, robust_buffer_acccess, &key->base); in populate_wm_prog_key()
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/kernel/linux/linux-5.10/drivers/media/pci/intel/ipu3/
H A Dipu3-cio2.c127 * Initialize each entry to dummy_page bus base address. in cio2_fbpt_init_dummy()
355 void __iomem *const base = cio2->base; in cio2_hw_init() local
385 CIO2_PBM_WMCTRL1_MID2_2CK, base + CIO2_REG_PBM_WMCTRL1); in cio2_hw_init()
391 CIO2_PBM_WMCTRL2_OBFF_MEM_EN, base + CIO2_REG_PBM_WMCTRL2); in cio2_hw_init()
399 base + CIO2_REG_PBM_ARB_CTRL); in cio2_hw_init()
405 writel(CIO2_FB_HPLL_FREQ, base + CIO2_REG_FB_HPLL_FREQ); in cio2_hw_init()
406 writel(CIO2_ISCLK_RATIO, base + CIO2_REG_ISCLK_RATIO); in cio2_hw_init()
419 writel(CIO2_INT_EN_EXT_IE_MASK, base + CIO2_REG_INT_EN_EXT_IE); in cio2_hw_init()
424 writel(CIO2_INT_EN_EXT_OE_MASK, base in cio2_hw_init()
510 void __iomem *const base = cio2->base; cio2_hw_exit() local
635 void __iomem *const base = cio2->base; cio2_irq_handle_once() local
762 void __iomem *const base = cio2->base; cio2_irq() local
1843 void __iomem *const base = cio2->base; cio2_runtime_suspend() local
1861 void __iomem *const base = cio2->base; cio2_runtime_resume() local
[all...]
/kernel/linux/linux-6.6/drivers/media/pci/intel/ipu3/
H A Dipu3-cio2.c144 * Initialize each entry to dummy_page bus base address. in cio2_fbpt_init_dummy()
356 void __iomem *const base = cio2->base; in cio2_hw_init() local
386 CIO2_PBM_WMCTRL1_MID2_2CK, base + CIO2_REG_PBM_WMCTRL1); in cio2_hw_init()
392 CIO2_PBM_WMCTRL2_OBFF_MEM_EN, base + CIO2_REG_PBM_WMCTRL2); in cio2_hw_init()
400 base + CIO2_REG_PBM_ARB_CTRL); in cio2_hw_init()
406 writel(CIO2_FB_HPLL_FREQ, base + CIO2_REG_FB_HPLL_FREQ); in cio2_hw_init()
407 writel(CIO2_ISCLK_RATIO, base + CIO2_REG_ISCLK_RATIO); in cio2_hw_init()
420 writel(CIO2_INT_EN_EXT_IE_MASK, base + CIO2_REG_INT_EN_EXT_IE); in cio2_hw_init()
425 writel(CIO2_INT_EN_EXT_OE_MASK, base in cio2_hw_init()
512 void __iomem *const base = cio2->base; cio2_hw_exit() local
660 void __iomem *const base = cio2->base; cio2_irq_handle_once() local
759 void __iomem *const base = cio2->base; cio2_irq() local
1860 void __iomem *const base = cio2->base; cio2_runtime_suspend() local
1878 void __iomem *const base = cio2->base; cio2_runtime_resume() local
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/third_party/mesa3d/src/gallium/drivers/llvmpipe/
H A Dlp_state_cs.c442 params.info = &shader->info.base; in generate_compute()
451 if (shader->base.type == PIPE_SHADER_IR_TGSI) in generate_compute()
452 lp_build_tgsi_soa(gallivm, shader->base.tokens, &params, NULL); in generate_compute()
454 lp_build_nir_soa(gallivm, shader->base.ir.nir, &params, in generate_compute()
489 shader->base.type = templ->ir_type; in llvmpipe_create_compute_state()
496 shader->base.ir.nir = nir_deserialize(NULL, pipe->screen->get_compiler_options(pipe->screen, PIPE_SHADER_IR_NIR, PIPE_SHADER_COMPUTE), &reader); in llvmpipe_create_compute_state()
497 shader->base.type = PIPE_SHADER_IR_NIR; in llvmpipe_create_compute_state()
499 pipe->screen->finalize_nir(pipe->screen, shader->base.ir.nir); in llvmpipe_create_compute_state()
500 shader->req_local_mem += ((struct nir_shader *)shader->base.ir.nir)->info.shared_size; in llvmpipe_create_compute_state()
501 shader->zero_initialize_shared_memory = ((struct nir_shader *)shader->base in llvmpipe_create_compute_state()
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/bios/
H A Dcommand_table2.c44 bp->base.ctx->logger
52 (amdgpu_atom_execute_table(((struct amdgpu_device *)bp->base.ctx->driver_context)->mode_info.atom_context, \
57 amdgpu_atom_parse_cmd_header(((struct amdgpu_device *)bp->base.ctx->driver_context)->mode_info.atom_context, \
61 bios_cmd_table_para_revision(bp->base.ctx->driver_context, \
185 if (bp->base.ctx->dc->ctx->dmub_srv && in encoder_control_digx_v1_5()
186 bp->base.ctx->dc->debug.dmub_command_table) { in encoder_control_digx_v1_5()
187 encoder_control_dmcub(bp->base.ctx->dmub_srv, &params); in encoder_control_digx_v1_5()
201 if (bp->base.ctx->dc->ctx->dmub_srv && in encoder_control_fallback()
202 bp->base.ctx->dc->debug.dmub_command_table) { in encoder_control_fallback()
295 if (bp->base in transmitter_control_v1_6()
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