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/kernel/linux/linux-6.6/drivers/input/touchscreen/
H A Dsun4i-ts.c109 void __iomem *base; member
122 x = readl(ts->base + TP_DATA); in sun4i_ts_irq_handle_input()
123 y = readl(ts->base + TP_DATA); in sun4i_ts_irq_handle_input()
152 reg_val = readl(ts->base + TP_INT_FIFOS); in sun4i_ts_irq()
155 ts->temp_data = readl(ts->base + TEMP_DATA); in sun4i_ts_irq()
160 writel(reg_val, ts->base + TP_INT_FIFOS); in sun4i_ts_irq()
171 TP_UP_IRQ_EN(1), ts->base + TP_INT_FIFOC); in sun4i_ts_open()
181 writel(TEMP_IRQ_EN(1), ts->base + TP_INT_FIFOC); in sun4i_ts_close()
304 ts->base = devm_platform_ioremap_resource(pdev, 0); in sun4i_ts_probe()
305 if (IS_ERR(ts->base)) in sun4i_ts_probe()
[all...]
/kernel/linux/linux-6.6/sound/soc/xilinx/
H A Dxlnx_spdif.c50 void __iomem *base; member
60 val = readl(ctx->base + XSPDIF_IRQ_STS_REG); in xlnx_spdifrx_irq_handler()
63 ctx->base + XSPDIF_IRQ_STS_REG); in xlnx_spdifrx_irq_handler()
64 val = readl(ctx->base + in xlnx_spdifrx_irq_handler()
67 ctx->base + XSPDIF_IRQ_ENABLE_REG); in xlnx_spdifrx_irq_handler()
83 val = readl(ctx->base + XSPDIF_CONTROL_REG); in xlnx_spdif_startup()
85 writel(val, ctx->base + XSPDIF_CONTROL_REG); in xlnx_spdif_startup()
89 ctx->base + XSPDIF_IRQ_ENABLE_REG); in xlnx_spdif_startup()
91 ctx->base + XSPDIF_GLOBAL_IRQ_ENABLE_REG); in xlnx_spdif_startup()
102 writel(XSPDIF_SOFT_RESET_VALUE, ctx->base in xlnx_spdif_shutdown()
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/third_party/mesa3d/src/egl/drivers/dri2/
H A Dplatform_surfaceless.c46 dri2_surf->base.Width, in surfaceless_alloc_image()
47 dri2_surf->base.Height, in surfaceless_alloc_image()
57 dri2_egl_display(dri2_surf->base.Resource.Display); in surfaceless_free_images()
78 dri2_egl_display(dri2_surf->base.Resource.Display); in surfaceless_image_get_buffers()
130 if (!dri2_init_surface(&dri2_surf->base, disp, type, conf, attrib_list, in dri2_surfaceless_create_surface()
135 dri2_surf->base.GLColorspace); in dri2_surfaceless_create_surface()
149 return &dri2_surf->base; in dri2_surfaceless_create_surface()
204 .base = { __DRI_KOPPER_LOADER, 1 },
210 .base = { __DRI_IMAGE_LOADER, 2 },
217 &image_loader_extension.base,
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/third_party/node/deps/v8/src/libplatform/tracing/
H A Dtracing-controller.cc10 #include "src/base/atomicops.h"
11 #include "src/base/platform/mutex.h"
12 #include "src/base/platform/time.h"
13 #include "src/base/platform/wrappers.h"
22 #include "src/base/platform/platform.h"
23 #include "src/base/platform/semaphore.h"
70 v8::base::AtomicWord g_category_index = g_num_builtin_categories;
73 TracingController::TracingController() { mutex_.reset(new base::Mutex()); } in TracingController()
81 base::MutexGuard lock(mutex_.get()); in ~TracingController()
109 return base in CurrentTimestampMicroseconds()
[all...]
/kernel/linux/linux-5.10/drivers/mtd/nand/onenand/
H A Donenand_samsung.c126 void __iomem *base; member
147 return readl(onenand->base + offset); in s3c_read_reg()
152 writel(value, onenand->base + offset); in s3c_write_reg()
172 (unsigned int) onenand->base + i, in s3c_dump_reg()
220 int reg = addr - this->base; in s3c_onenand_readw()
270 unsigned int reg = addr - this->base; in s3c_onenand_writew()
519 void __iomem *base = onenand->dma_addr; in s5pc110_dma_poll() local
523 writel(src, base + S5PC110_DMA_SRC_ADDR); in s5pc110_dma_poll()
524 writel(dst, base + S5PC110_DMA_DST_ADDR); in s5pc110_dma_poll()
527 writel(S5PC110_DMA_SRC_CFG_READ, base in s5pc110_dma_poll()
563 void __iomem *base = onenand->dma_addr; s5pc110_onenand_irq() local
585 void __iomem *base = onenand->dma_addr; s5pc110_dma_irq() local
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/kernel/linux/linux-5.10/drivers/pinctrl/
H A Dpinctrl-amd.c46 pin_reg = readl(gpio_dev->base + offset * 4); in amd_gpio_get_direction()
62 pin_reg = readl(gpio_dev->base + offset * 4); in amd_gpio_direction_input()
64 writel(pin_reg, gpio_dev->base + offset * 4); in amd_gpio_direction_input()
78 pin_reg = readl(gpio_dev->base + offset * 4); in amd_gpio_direction_output()
84 writel(pin_reg, gpio_dev->base + offset * 4); in amd_gpio_direction_output()
97 pin_reg = readl(gpio_dev->base + offset * 4); in amd_gpio_get_value()
110 pin_reg = readl(gpio_dev->base + offset * 4); in amd_gpio_set_value()
115 writel(pin_reg, gpio_dev->base + offset * 4); in amd_gpio_set_value()
132 pin_reg = readl(gpio_dev->base + WAKE_INT_MASTER_REG); in amd_gpio_set_debounce()
137 pin_reg = readl(gpio_dev->base in amd_gpio_set_debounce()
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/kernel/linux/linux-5.10/drivers/phy/qualcomm/
H A Dphy-qcom-qusb2.c324 * @base: iomapped memory space for qubs2 phy
344 void __iomem *base; member
363 static inline void qusb2_write_mask(void __iomem *base, u32 offset, in qusb2_write_mask() argument
368 reg = readl(base + offset); in qusb2_write_mask()
371 writel(reg, base + offset); in qusb2_write_mask()
374 readl(base + offset); in qusb2_write_mask()
377 static inline void qusb2_setbits(void __iomem *base, u32 offset, u32 val) in qusb2_setbits() argument
381 reg = readl(base + offset); in qusb2_setbits()
383 writel(reg, base + offset); in qusb2_setbits()
386 readl(base in qusb2_setbits()
389 qusb2_clrbits(void __iomem *base, u32 offset, u32 val) qusb2_clrbits() argument
402 qcom_qusb2_phy_configure(void __iomem *base, const unsigned int *regs, const struct qusb2_phy_init_tbl tbl[], int num) qcom_qusb2_phy_configure() argument
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/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
H A Dintel_display_types.h88 struct drm_framebuffer base; member
129 struct drm_encoder base; member
186 * pre-filled the pipe config. Note that intel_encoder->base.crtc must
418 struct drm_connector base; member
456 struct drm_connector_state base; member
462 #define to_intel_digital_connector_state(x) container_of(x, struct intel_digital_connector_state, base)
477 struct drm_atomic_state base; member
593 u32 base; member
1105 struct drm_crtc base; member
1155 struct drm_plane base; member
1164 u32 base, cntl, size; global() member
1407 struct intel_encoder base; global() member
1450 struct intel_encoder base; global() member
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/kernel/linux/linux-5.10/drivers/rtc/
H A Drtc-stm32.c122 void __iomem *base; member
137 writel_relaxed(RTC_WPR_1ST_KEY, rtc->base + regs->wpr); in stm32_rtc_wpr_unlock()
138 writel_relaxed(RTC_WPR_2ND_KEY, rtc->base + regs->wpr); in stm32_rtc_wpr_unlock()
145 writel_relaxed(RTC_WPR_WRONG_KEY, rtc->base + regs->wpr); in stm32_rtc_wpr_lock()
151 unsigned int isr = readl_relaxed(rtc->base + regs->isr); in stm32_rtc_enter_init_mode()
155 writel_relaxed(isr, rtc->base + regs->isr); in stm32_rtc_enter_init_mode()
164 rtc->base + regs->isr, in stm32_rtc_enter_init_mode()
175 unsigned int isr = readl_relaxed(rtc->base + regs->isr); in stm32_rtc_exit_init_mode()
178 writel_relaxed(isr, rtc->base + regs->isr); in stm32_rtc_exit_init_mode()
184 unsigned int isr = readl_relaxed(rtc->base in stm32_rtc_wait_sync()
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/kernel/linux/linux-6.6/drivers/mtd/nand/onenand/
H A Donenand_samsung.c126 void __iomem *base; member
147 return readl(onenand->base + offset); in s3c_read_reg()
152 writel(value, onenand->base + offset); in s3c_write_reg()
172 (unsigned int) onenand->base + i, in s3c_dump_reg()
220 int reg = addr - this->base; in s3c_onenand_readw()
270 unsigned int reg = addr - this->base; in s3c_onenand_writew()
520 void __iomem *base = onenand->dma_addr; in s5pc110_dma_poll() local
524 writel(src, base + S5PC110_DMA_SRC_ADDR); in s5pc110_dma_poll()
525 writel(dst, base + S5PC110_DMA_DST_ADDR); in s5pc110_dma_poll()
528 writel(S5PC110_DMA_SRC_CFG_READ, base in s5pc110_dma_poll()
564 void __iomem *base = onenand->dma_addr; s5pc110_onenand_irq() local
586 void __iomem *base = onenand->dma_addr; s5pc110_dma_irq() local
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/kernel/linux/linux-6.6/drivers/phy/qualcomm/
H A Dphy-qcom-qusb2.c410 * @base: iomapped memory space for qubs2 phy
430 void __iomem *base; member
449 static inline void qusb2_write_mask(void __iomem *base, u32 offset, in qusb2_write_mask() argument
454 reg = readl(base + offset); in qusb2_write_mask()
457 writel(reg, base + offset); in qusb2_write_mask()
460 readl(base + offset); in qusb2_write_mask()
463 static inline void qusb2_setbits(void __iomem *base, u32 offset, u32 val) in qusb2_setbits() argument
467 reg = readl(base + offset); in qusb2_setbits()
469 writel(reg, base + offset); in qusb2_setbits()
472 readl(base in qusb2_setbits()
475 qusb2_clrbits(void __iomem *base, u32 offset, u32 val) qusb2_clrbits() argument
488 qcom_qusb2_phy_configure(void __iomem *base, const unsigned int *regs, const struct qusb2_phy_init_tbl tbl[], int num) qcom_qusb2_phy_configure() argument
[all...]
/kernel/linux/linux-6.6/drivers/irqchip/
H A Dirq-stm32-exti.c60 void __iomem *base; member
398 void __iomem *base = chip_data->host_data->base; in stm32_chip_suspend() local
401 chip_data->rtsr_cache = readl_relaxed(base + stm32_bank->rtsr_ofst); in stm32_chip_suspend()
402 chip_data->ftsr_cache = readl_relaxed(base + stm32_bank->ftsr_ofst); in stm32_chip_suspend()
404 writel_relaxed(wake_active, base + stm32_bank->imr_ofst); in stm32_chip_suspend()
411 void __iomem *base = chip_data->host_data->base; in stm32_chip_resume() local
414 writel_relaxed(chip_data->rtsr_cache, base + stm32_bank->rtsr_ofst); in stm32_chip_resume()
415 writel_relaxed(chip_data->ftsr_cache, base in stm32_chip_resume()
485 void __iomem *base = chip_data->host_data->base; stm32_exti_write_bit() local
494 void __iomem *base = chip_data->host_data->base; stm32_exti_set_bit() local
507 void __iomem *base = chip_data->host_data->base; stm32_exti_clr_bit() local
565 void __iomem *base = chip_data->host_data->base; stm32_exti_h_set_type() local
674 void __iomem *base = chip_data->host_data->base; stm32_exti_h_retrigger() local
793 void __iomem *base = h_data->base; stm32_exti_chip_init() local
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/kernel/linux/linux-6.6/lib/zstd/compress/
H A Dzstd_fast.c23 const BYTE* const base = ms->window.base; in ZSTD_fillHashTable() local
24 const BYTE* ip = base + ms->nextToUpdate; in ZSTD_fillHashTable()
32 U32 const curr = (U32)(ip - base); in ZSTD_fillHashTable()
103 const BYTE* const base = ms->window.base; in ZSTD_compressBlock_fast_noDict_generic() local
105 const U32 endIndex = (U32)((size_t)(istart - base) + srcSize); in ZSTD_compressBlock_fast_noDict_generic()
107 const BYTE* const prefixStart = base + prefixStartIndex; in ZSTD_compressBlock_fast_noDict_generic()
141 { U32 const curr = (U32)(ip0 - base); in ZSTD_compressBlock_fast_noDict_generic()
173 current0 = (U32)(ip0 - base); in ZSTD_compressBlock_fast_noDict_generic()
381 const BYTE* const base = ms->window.base; ZSTD_compressBlock_fast_dictMatchState_generic() local
557 const BYTE* const base = ms->window.base; ZSTD_compressBlock_fast_extDict_generic() local
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/kernel/linux/linux-5.10/drivers/gpio/
H A Dgpio-mxc.c61 void __iomem *base; member
180 void __iomem *reg = port->base; in gpio_set_irq_type()
216 val = readl(port->base + GPIO_EDGE_SEL); in gpio_set_irq_type()
219 port->base + GPIO_EDGE_SEL); in gpio_set_irq_type()
222 port->base + GPIO_EDGE_SEL); in gpio_set_irq_type()
232 writel(1 << gpio_idx, port->base + GPIO_ISR); in gpio_set_irq_type()
239 void __iomem *reg = port->base; in mxc_flip_edge()
286 irq_stat = readl(port->base + GPIO_ISR) & readl(port->base + GPIO_IMR); in mx3_gpio_irq_handler()
304 irq_msk = readl(port->base in mx2_gpio_irq_handler()
[all...]
/kernel/linux/linux-5.10/drivers/mmc/host/
H A Dsdhci_am654.c142 struct regmap *base; member
175 regmap_update_bits(sdhci_am654->base, PHY_CTRL5, in sdhci_am654_setup_dll()
196 regmap_update_bits(sdhci_am654->base, PHY_CTRL5, mask, val); in sdhci_am654_setup_dll()
207 regmap_update_bits(sdhci_am654->base, PHY_CTRL5, FREQSEL_MASK, in sdhci_am654_setup_dll()
217 regmap_update_bits(sdhci_am654->base, PHY_CTRL1, mask, val); in sdhci_am654_setup_dll()
220 regmap_update_bits(sdhci_am654->base, PHY_CTRL1, ENDLL_MASK, in sdhci_am654_setup_dll()
226 ret = regmap_read_poll_timeout(sdhci_am654->base, PHY_STAT1, val, in sdhci_am654_setup_dll()
238 regmap_update_bits(sdhci_am654->base, PHY_CTRL4, ITAPCHGWIN_MASK, in sdhci_am654_write_itapdly()
240 regmap_update_bits(sdhci_am654->base, PHY_CTRL4, ITAPDLYSEL_MASK, in sdhci_am654_write_itapdly()
242 regmap_update_bits(sdhci_am654->base, PHY_CTRL in sdhci_am654_write_itapdly()
774 void __iomem *base; sdhci_am654_probe() local
[all...]
/kernel/linux/linux-6.6/drivers/gpio/
H A Dgpio-mxc.c61 void __iomem *base; member
168 void __iomem *reg = port->base; in gpio_set_irq_type()
206 val = readl(port->base + GPIO_EDGE_SEL); in gpio_set_irq_type()
209 port->base + GPIO_EDGE_SEL); in gpio_set_irq_type()
212 port->base + GPIO_EDGE_SEL); in gpio_set_irq_type()
222 writel(1 << gpio_idx, port->base + GPIO_ISR); in gpio_set_irq_type()
232 void __iomem *reg = port->base; in mxc_flip_edge()
288 irq_stat = readl(port->base + GPIO_ISR) & readl(port->base + GPIO_IMR); in mx3_gpio_irq_handler()
306 irq_msk = readl(port->base in mx2_gpio_irq_handler()
[all...]
/kernel/linux/linux-6.6/drivers/media/platform/qcom/camss/
H A Dcamss-csiphy-3ph-1-0.c272 csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(6)); in csiphy_hw_version_read()
274 hw_version = readl_relaxed(csiphy->base + in csiphy_hw_version_read()
276 hw_version |= readl_relaxed(csiphy->base + in csiphy_hw_version_read()
278 hw_version |= readl_relaxed(csiphy->base + in csiphy_hw_version_read()
280 hw_version |= readl_relaxed(csiphy->base + in csiphy_hw_version_read()
292 writel_relaxed(0x1, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(0)); in csiphy_reset()
294 writel_relaxed(0x0, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(0)); in csiphy_reset()
304 u8 val = readl_relaxed(csiphy->base + in csiphy_isr()
307 writel_relaxed(val, csiphy->base + in csiphy_isr()
311 writel_relaxed(0x1, csiphy->base in csiphy_isr()
[all...]
/third_party/mesa3d/src/imagination/vulkan/winsys/pvrsrvkm/
H A Dpvr_srv.c76 result = pvr_winsys_helper_winsys_heap_init(&srv_ws->base, in pvr_srv_heap_init()
83 &srv_heap->base); in pvr_srv_heap_init()
87 assert(srv_heap->base.page_size == srv_ws->base.page_size); in pvr_srv_heap_init()
88 assert(srv_heap->base.log2_page_size == srv_ws->base.log2_page_size); in pvr_srv_heap_init()
89 assert(srv_heap->base.reserved_size % PVR_SRV_RESERVED_SIZE_GRANULARITY == in pvr_srv_heap_init()
94 srv_heap->base.base_addr, in pvr_srv_heap_init()
95 srv_heap->base.size, in pvr_srv_heap_init()
96 srv_heap->base in pvr_srv_heap_init()
[all...]
/kernel/linux/linux-6.6/drivers/spi/
H A Dspi-mt65xx.c133 * @base: Start address of the SPI controller registers
157 void __iomem *base; member
274 reg_val = readl(mdata->base + SPI_CMD_REG); in mtk_spi_reset()
276 writel(reg_val, mdata->base + SPI_CMD_REG); in mtk_spi_reset()
278 reg_val = readl(mdata->base + SPI_CMD_REG); in mtk_spi_reset()
280 writel(reg_val, mdata->base + SPI_CMD_REG); in mtk_spi_reset()
309 reg_val = readl(mdata->base + SPI_CFG0_REG); in mtk_spi_set_hw_cs_timing()
336 writel(reg_val, mdata->base + SPI_CFG0_REG); in mtk_spi_set_hw_cs_timing()
341 reg_val = readl(mdata->base + SPI_CFG1_REG); in mtk_spi_set_hw_cs_timing()
344 writel(reg_val, mdata->base in mtk_spi_set_hw_cs_timing()
[all...]
/third_party/mesa3d/src/vulkan/wsi/
H A Dwsi_common_wayland.c81 struct wsi_interface base; member
899 surface->base.platform = VK_ICD_WSI_PLATFORM_WAYLAND; in wsi_CreateWaylandSurfaceKHR()
903 *pSurface = VkIcdSurfaceBase_to_handle(&surface->base); in wsi_CreateWaylandSurfaceKHR()
909 struct wsi_image base; member
924 struct wsi_swapchain base; member
946 VK_DEFINE_NONDISP_HANDLE_CASTS(wsi_wl_swapchain, base.base, VkSwapchainKHR,
954 return &chain->images[image_index].base; in wsi_wl_swapchain_get_wsi_image()
980 for (uint32_t i = 0; i < chain->base.image_count; i++) { in wsi_wl_swapchain_acquire_next_image()
1056 memcpy(image->shm_ptr, image->base in wsi_wl_swapchain_queue_present()
[all...]
/third_party/skia/third_party/externals/libjpeg-turbo/gtest/
H A Ddjpeg-gtest-wrapper.cpp21 #include "base/files/file.h"
22 #include "base/files/file_util.h"
23 #include "base/path_service.h"
67 base::FilePath input_image_path; in TEST_P()
69 base::FilePath output_path(GetTargetDirectory()); in TEST_P()
100 base::FilePath input_image_path; in TEST()
102 base::FilePath output_path(GetTargetDirectory()); in TEST()
129 base::FilePath input_image_path; in TEST()
131 base::FilePath output_path(GetTargetDirectory()); in TEST()
159 base in TEST()
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/kernel/linux/linux-6.6/drivers/gpu/drm/gma500/
H A Dpsb_intel_sdvo.c70 struct gma_encoder base; member
147 struct gma_connector base; member
202 return container_of(encoder, struct psb_intel_sdvo, base.base); in to_psb_intel_sdvo()
208 struct psb_intel_sdvo, base); in intel_attached_sdvo()
213 return container_of(to_gma_connector(connector), struct psb_intel_sdvo_connector, base); in to_psb_intel_sdvo_connector()
233 struct drm_device *dev = psb_intel_sdvo->base.base.dev; in psb_intel_sdvo_write_sdvox()
408 struct drm_device *dev = psb_intel_sdvo->base.base in psb_intel_sdvo_debug_write()
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/third_party/node/deps/v8/src/trap-handler/
H A Dhandler-inside.cc53 const uintptr_t base = data->base; in TryFindLandingPad() local
55 if (fault_addr >= base && fault_addr < base + data->size) { in TryFindLandingPad()
57 const uint32_t offset = static_cast<uint32_t>(fault_addr - base); in TryFindLandingPad()
60 TH_DCHECK(base + offset == fault_addr); in TryFindLandingPad()
65 *landing_pad = data->instructions[j].landing_offset + base; in TryFindLandingPad()
/third_party/mesa3d/src/util/
H A Du_qsort.h35 void util_tls_qsort_r(void *base, size_t nmemb, size_t size,
55 util_qsort_r(void *base, size_t nmemb, size_t size, in util_qsort_r() argument
68 qsort_r(base, nmemb, size, &data, util_qsort_adapter); in util_qsort_r()
71 qsort_r(base, nmemb, size, compar, arg); in util_qsort_r()
82 qsort_s(base, nmemb, size, util_qsort_adapter, &data); in util_qsort_r()
85 qsort_s(base, nmemb, size, compar, arg); in util_qsort_r()
89 util_tls_qsort_r(base, nmemb, size, compar, arg); in util_qsort_r()
/third_party/skia/third_party/externals/sfntly/java/src/com/google/typography/font/sfntly/table/opentype/component/
H A DRangeRecord.java15 RangeRecord(ReadableFontData data, int base) { in RangeRecord() argument
16 this.start = data.readUShort(base + START_OFFSET); in RangeRecord()
17 this.end = data.readUShort(base + END_OFFSET); in RangeRecord()
18 this.property = data.readUShort(base + PROPERTY_OFFSET); in RangeRecord()
22 public int writeTo(WritableFontData newData, int base) { in writeTo() argument
23 newData.writeUShort(base + START_OFFSET, start); in writeTo()
24 newData.writeUShort(base + END_OFFSET, end); in writeTo()

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