Lines Matching refs:base
133 * @base: Start address of the SPI controller registers
157 void __iomem *base;
274 reg_val = readl(mdata->base + SPI_CMD_REG);
276 writel(reg_val, mdata->base + SPI_CMD_REG);
278 reg_val = readl(mdata->base + SPI_CMD_REG);
280 writel(reg_val, mdata->base + SPI_CMD_REG);
309 reg_val = readl(mdata->base + SPI_CFG0_REG);
336 writel(reg_val, mdata->base + SPI_CFG0_REG);
341 reg_val = readl(mdata->base + SPI_CFG1_REG);
344 writel(reg_val, mdata->base + SPI_CFG1_REG);
361 reg_val = readl(mdata->base + SPI_CMD_REG);
420 writel(reg_val, mdata->base + SPI_CMD_REG);
425 mdata->base + SPI_PAD_SEL_REG);
430 reg_val = readl(mdata->base + SPI_CMD_REG);
434 writel(reg_val, mdata->base + SPI_CMD_REG);
436 reg_val = readl(mdata->base + SPI_CFG1_REG);
440 writel(reg_val, mdata->base + SPI_CFG1_REG);
443 reg_val = readl(mdata->base + SPI_CFG1_REG);
447 writel(reg_val, mdata->base + SPI_CFG1_REG);
469 reg_val = readl(mdata->base + SPI_CMD_REG);
472 writel(reg_val, mdata->base + SPI_CMD_REG);
475 writel(reg_val, mdata->base + SPI_CMD_REG);
495 reg_val = readl(mdata->base + SPI_CFG2_REG);
502 writel(reg_val, mdata->base + SPI_CFG2_REG);
504 reg_val = readl(mdata->base + SPI_CFG0_REG);
510 writel(reg_val, mdata->base + SPI_CFG0_REG);
530 reg_val = readl(mdata->base + SPI_CFG1_REG);
538 writel(reg_val, mdata->base + SPI_CFG1_REG);
546 cmd = readl(mdata->base + SPI_CMD_REG);
551 writel(cmd, mdata->base + SPI_CMD_REG);
604 mdata->base + SPI_TX_SRC_REG);
608 mdata->base + SPI_TX_SRC_REG_64);
614 mdata->base + SPI_RX_DST_REG);
618 mdata->base + SPI_RX_DST_REG_64);
639 iowrite32_rep(mdata->base + SPI_TX_DATA_REG, xfer->tx_buf, cnt);
644 writel(reg_val, mdata->base + SPI_TX_DATA_REG);
669 cmd = readl(mdata->base + SPI_CMD_REG);
674 writel(cmd, mdata->base + SPI_CMD_REG);
712 writel(reg_val, mdata->base + SPI_CFG3_IPM_REG);
752 reg_val = readl(mdata->base + SPI_STATUS0_REG);
767 ioread32_rep(mdata->base + SPI_RX_DATA_REG,
771 reg_val = readl(mdata->base + SPI_RX_DATA_REG);
792 iowrite32_rep(mdata->base + SPI_TX_DATA_REG,
801 writel(reg_val, mdata->base + SPI_TX_DATA_REG);
832 cmd = readl(mdata->base + SPI_CMD_REG);
835 writel(cmd, mdata->base + SPI_CMD_REG);
895 mdata->base + SPI_TX_SRC_REG);
899 mdata->base + SPI_TX_SRC_REG_64);
904 mdata->base + SPI_RX_DST_REG);
908 mdata->base + SPI_RX_DST_REG_64);
958 reg_val = readl(mdata->base + SPI_CFG3_IPM_REG);
972 writel(0, mdata->base + SPI_CFG1_REG);
1005 writel(reg_val, mdata->base + SPI_CFG3_IPM_REG);
1068 reg_val = readl(mdata->base + SPI_CMD_REG);
1072 writel(reg_val, mdata->base + SPI_CMD_REG);
1084 reg_val = readl(mdata->base + SPI_CMD_REG);
1088 writel(reg_val, mdata->base + SPI_CMD_REG);
1182 mdata->base = devm_platform_ioremap_resource(pdev, 0);
1183 if (IS_ERR(mdata->base))
1184 return PTR_ERR(mdata->base);