| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 1961 unsigned shift; in DecodeSORegMemOperand() local 6402 Val <<= shift; DecodeExpandedImmOperand() local [all...] |
| /third_party/python/Objects/ |
| H A D | longobject.c | 3507 Py_ssize_t shift; /* the number of digits we split off */ in k_mul() local 3986 Py_ssize_t a_size, b_size, shift, extra_bits, diff, x_size, x_bits; long_true_divide() local 4753 digit shift; long_rshift1() local [all...] |
| /third_party/skia/third_party/externals/angle2/src/common/spirv/ |
| H A D | spirv_instruction_parser_autogen.cpp | 2544 ParseShiftRightLogical(const uint32_t *_instruction, IdResultType *idResultType, IdResult *idResult, IdRef *base, IdRef *shift) ParseShiftRightLogical() argument 2560 ParseShiftRightArithmetic(const uint32_t *_instruction, IdResultType *idResultType, IdResult *idResult, IdRef *base, IdRef *shift) ParseShiftRightArithmetic() argument 2576 ParseShiftLeftLogical(const uint32_t *_instruction, IdResultType *idResultType, IdResult *idResult, IdRef *base, IdRef *shift) ParseShiftLeftLogical() argument
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| /third_party/backends/backend/ |
| H A D | umax-scsidef.h | 58 static inline void setbitfield(unsigned char * pageaddr, int mask, int shift, int val) \ in setbitfield() argument 61 static inline void resetbitfield(unsigned char * pageaddr, int mask, int shift, int val) \ in resetbitfield() argument 64 static inline int getbitfield(unsigned char * pageaddr, int mask, int shift) \ in getbitfield() argument
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| H A D | hp3500.c | 2517 int shift = 8; in get_lsbfirst_int() local
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| /third_party/mesa3d/src/amd/common/ |
| H A D | ac_nir_lower_ngg.c | 237 nir_ssa_def *shift = nir_iadd_imm(b, nir_imul_imm(b, lane_id, -4u), num_lds_dwords * 16); in summarize_repack() local [all...] |
| /third_party/mbedtls/library/ |
| H A D | ecp_curves.c | 5314 ecp_mod_koblitz(mbedtls_mpi *N, const mbedtls_mpi_uint *Rp, size_t p_limbs, size_t adjust, size_t shift, mbedtls_mpi_uint mask) ecp_mod_koblitz() argument
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| /third_party/mesa3d/src/freedreno/vulkan/ |
| H A D | tu_pipeline.c | 1324 int shift = 0; in tu6_vpc_varying_mode() local 1376 uint32_t shift = inloc % 32; tu6_emit_vpc_varying_modes() local [all...] |
| /third_party/musl/porting/linux/user/ldso/ |
| H A D | dynlink.c | 2347 size_t shift = 0; in sleb128_decoder() local
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| /third_party/mesa3d/src/intel/vulkan/ |
| H A D | genX_cmd_buffer.c | 3217 const unsigned shift = 4 - buffer_count; in cmd_buffer_emit_push_constant() local
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| /third_party/ltp/testcases/kernel/fs/scsi/ltpscsi/ |
| H A D | scsimain.c | 5125 static void bitfield(unsigned char *pageaddr, char *text, int mask, int shift) in bitfield() argument 5130 notbitfield(unsigned char *pageaddr, char *text, int mask, int shift) notbitfield() argument
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| /third_party/node/deps/v8/src/compiler/ |
| H A D | effect-control-linearizer.cc | 2131 Node* shift = __ Int32Constant(base::bits::WhichPowerOfTwo(divisor)); in LowerCheckedInt32Div() local 2353 Node* shift = __ Uint32Constant(base::bits::WhichPowerOfTwo(divisor)); in LowerCheckedUint32Div() local 4873 Node* shift = __ Int32Constant(Map::Bits2::ElementsKindBits::kShift); AdaptFastCallTypedArrayArgument() local 5765 Node* shift = __ Int32Constant(Map::Bits2::ElementsKindBits::kShift); LowerTransitionAndStoreElement() local 5883 Node* shift = __ Int32Constant(Map::Bits2::ElementsKindBits::kShift); LowerTransitionAndStoreNumberElement() local 5944 Node* shift = __ Int32Constant(Map::Bits2::ElementsKindBits::kShift); LowerTransitionAndStoreNonNumberElement() local 6011 Node* shift = __ Int32Constant(Map::Bits2::ElementsKindBits::kShift); LowerStoreSignedSmallElement() local [all...] |
| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.cc | 1585 NEONShiftLeftImmediate(const VRegister& vd, const VRegister& vn, int shift, NEONShiftImmediateOp op) NEONShiftLeftImmediate() argument 1592 NEONShiftRightImmediate(const VRegister& vd, const VRegister& vn, int shift, NEONShiftImmediateOp op) NEONShiftRightImmediate() argument 1600 NEONShiftImmediateL(const VRegister& vd, const VRegister& vn, int shift, NEONShiftImmediateOp op) NEONShiftImmediateL() argument 1614 NEONShiftImmediateN(const VRegister& vd, const VRegister& vn, int shift, NEONShiftImmediateOp op) NEONShiftImmediateN() argument 1636 shl(const VRegister& vd, const VRegister& vn, int shift) shl() argument 1641 sli(const VRegister& vd, const VRegister& vn, int shift) sli() argument 1646 sqshl(const VRegister& vd, const VRegister& vn, int shift) sqshl() argument 1650 sqshlu(const VRegister& vd, const VRegister& vn, int shift) sqshlu() argument 1654 uqshl(const VRegister& vd, const VRegister& vn, int shift) uqshl() argument 1658 sshll(const VRegister& vd, const VRegister& vn, int shift) sshll() argument 1663 sshll2(const VRegister& vd, const VRegister& vn, int shift) sshll2() argument 1676 ushll(const VRegister& vd, const VRegister& vn, int shift) ushll() argument 1681 ushll2(const VRegister& vd, const VRegister& vn, int shift) ushll2() argument 1694 sri(const VRegister& vd, const VRegister& vn, int shift) sri() argument 1699 sshr(const VRegister& vd, const VRegister& vn, int shift) sshr() argument 1704 ushr(const VRegister& vd, const VRegister& vn, int shift) ushr() argument 1709 srshr(const VRegister& vd, const VRegister& vn, int shift) srshr() argument 1714 urshr(const VRegister& vd, const VRegister& vn, int shift) urshr() argument 1719 ssra(const VRegister& vd, const VRegister& vn, int shift) ssra() argument 1724 usra(const VRegister& vd, const VRegister& vn, int shift) usra() argument 1729 srsra(const VRegister& vd, const VRegister& vn, int shift) srsra() argument 1734 ursra(const VRegister& vd, const VRegister& vn, int shift) ursra() argument 1739 shrn(const VRegister& vd, const VRegister& vn, int shift) shrn() argument 1744 shrn2(const VRegister& vd, const VRegister& vn, int shift) shrn2() argument 1749 rshrn(const VRegister& vd, const VRegister& vn, int shift) rshrn() argument 1754 rshrn2(const VRegister& vd, const VRegister& vn, int shift) rshrn2() argument 1759 sqshrn(const VRegister& vd, const VRegister& vn, int shift) sqshrn() argument 1764 sqshrn2(const VRegister& vd, const VRegister& vn, int shift) sqshrn2() argument 1769 sqrshrn(const VRegister& vd, const VRegister& vn, int shift) sqrshrn() argument 1774 sqrshrn2(const VRegister& vd, const VRegister& vn, int shift) sqrshrn2() argument 1779 sqshrun(const VRegister& vd, const VRegister& vn, int shift) sqshrun() argument 1784 sqshrun2(const VRegister& vd, const VRegister& vn, int shift) sqshrun2() argument 1789 sqrshrun(const VRegister& vd, const VRegister& vn, int shift) sqrshrun() argument 1794 sqrshrun2(const VRegister& vd, const VRegister& vn, int shift) sqrshrun2() argument 1799 uqshrn(const VRegister& vd, const VRegister& vn, int shift) uqshrn() argument 1804 uqshrn2(const VRegister& vd, const VRegister& vn, int shift) uqshrn2() argument 1809 uqrshrn(const VRegister& vd, const VRegister& vn, int shift) uqrshrn() argument 1814 uqrshrn2(const VRegister& vd, const VRegister& vn, int shift) uqrshrn2() argument 2907 shll(const VRegister& vd, const VRegister& vn, int shift) shll() argument 2915 shll2(const VRegister& vd, const VRegister& vn, int shift) shll2() argument 3212 movi(const VRegister& vd, const uint64_t imm, Shift shift, const int shift_amount) movi() argument 3249 mvni(const VRegister& vd, const int imm8, Shift shift, const int shift_amount) mvni() argument 3590 MoveWide(const Register& rd, uint64_t imm, int shift, MoveWideImmediateOp mov_op) MoveWide() argument 3866 EmitShift(const Register& rd, const Register& rn, Shift shift, unsigned shift_amount) EmitShift() argument 3972 Shift shift = addr.shift(); LoadStore() local [all...] |
| /third_party/node/deps/v8/src/codegen/mips/ |
| H A D | macro-assembler-mips.cc | 1500 ShlPair(Register dst_low, Register dst_high, Register src_low, Register src_high, Register shift, Register scratch1, Register scratch2) CallRecordWriteStub() argument 1526 ShlPair(Register dst_low, Register dst_high, Register src_low, Register src_high, uint32_t shift, Register scratch) CallRecordWriteStub() argument 1557 ShrPair(Register dst_low, Register dst_high, Register src_low, Register src_high, Register shift, Register scratch1, Register scratch2) CallRecordWriteStub() argument 1583 ShrPair(Register dst_low, Register dst_high, Register src_low, Register src_high, uint32_t shift, Register scratch) CallRecordWriteStub() argument 1614 SarPair(Register dst_low, Register dst_high, Register src_low, Register src_high, Register shift, Register scratch1, Register scratch2) CallRecordWriteStub() argument 1635 SarPair(Register dst_low, Register dst_high, Register src_low, Register src_high, uint32_t shift, Register scratch) CallRecordWriteStub() argument 2644 uint32_t shift = 24; // (sizeof(T) - 1) * BITS_PER_BYTE CallRecordWriteStub() local [all...] |
| /third_party/node/deps/v8/src/codegen/riscv64/ |
| H A D | macro-assembler-riscv64.cc | 2697 uint32_t shift = 24; in Popcnt32() local 2733 uint64_t shift = 24; in Popcnt64() local
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| /third_party/node/deps/v8/src/codegen/arm/ |
| H A D | assembler-arm.cc | 4620 EncodeNeonShiftOp(NeonShiftOp op, NeonSize size, bool is_unsigned, NeonRegType reg_type, int dst_code, int src_code, int shift) EncodeNeonShiftOp() argument 4673 vshl(NeonDataType dt, QwNeonRegister dst, QwNeonRegister src, int shift) vshl() argument 4682 vshl(NeonDataType dt, QwNeonRegister dst, QwNeonRegister src, QwNeonRegister shift) vshl() argument 4691 vshr(NeonDataType dt, DwVfpRegister dst, DwVfpRegister src, int shift) vshr() argument 4700 vshr(NeonDataType dt, QwNeonRegister dst, QwNeonRegister src, int shift) vshr() argument 4709 vsli(NeonSize size, DwVfpRegister dst, DwVfpRegister src, int shift) vsli() argument 4718 vsri(NeonSize size, DwVfpRegister dst, DwVfpRegister src, int shift) vsri() argument [all...] |
| /third_party/node/deps/v8/src/execution/arm/ |
| H A D | simulator-arm.cc | 1305 ShiftOp shift = instr->ShiftField(); in GetShiftRm() local 2709 int32_t shift = instr->Bits(11, 7); in DecodeType3() local 2710 rm_val <<= shift; in DecodeType3() local 2716 int32_t shift = instr->Bits(11, 7); in DecodeType3() local 2720 rm_val >>= shift; DecodeType3() local 2735 int32_t shift = instr->Bits(11, 7); DecodeType3() local 2739 rm_val <<= shift; DecodeType3() local 2741 rm_val >>= shift; DecodeType3() local 3400 int shift = i * kBitsPerByte; DecodeTypeVFP() local 3408 int shift = i * kBitsPerByte * kShortSize; DecodeTypeVFP() local 3477 int shift = i * kBitsPerByte; DecodeTypeVFP() local 3484 int shift = i * kBitsPerByte * kShortSize; DecodeTypeVFP() local 4135 ShiftLeft(Simulator* simulator, int Vd, int Vm, int shift) ShiftLeft() argument 4140 LogicalShiftRight(Simulator* simulator, int Vd, int Vm, int shift) LogicalShiftRight() argument 4145 ArithmeticShiftRight(Simulator* simulator, int Vd, int Vm, int shift) ArithmeticShiftRight() argument 4152 ShiftRight(Simulator* simulator, int Vd, int Vm, int shift, bool is_unsigned) ShiftRight() argument 4163 ShiftRightAccumulate(Simulator* simulator, int Vd, int Vm, int shift) ShiftRightAccumulate() argument 4169 ArithmeticShiftRightAccumulate(Simulator* simulator, int Vd, int Vm, int shift) ArithmeticShiftRightAccumulate() argument 4178 ShiftLeftAndInsert(Simulator* simulator, int Vd, int Vm, int shift) ShiftLeftAndInsert() argument 4192 ShiftRightAndInsert(Simulator* simulator, int Vd, int Vm, int shift) ShiftRightAndInsert() argument 4209 S_T shift[kElems]; ShiftByRegister() local 4915 int shift = i * kBitsPerByte; DecodeAdvancedSIMDTwoOrThreeRegisters() local 5558 int shift = 2 * size - imm7; DecodeAdvancedSIMDDataProcessing() local 5582 int shift = 2 * size - imm7; DecodeAdvancedSIMDDataProcessing() local 5660 int shift = imm7 - size; DecodeAdvancedSIMDDataProcessing() local 5681 int shift = 2 * size - imm7; DecodeAdvancedSIMDDataProcessing() local 5702 int shift = imm7 - size; DecodeAdvancedSIMDDataProcessing() local [all...] |
| /third_party/node/deps/v8/src/wasm/baseline/x64/ |
| H A D | liftoff-assembler-x64.h | 2353 byte shift = static_cast<byte>(count & mask); in EmitSimdShiftOpImm() local
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| /third_party/mesa3d/src/gallium/drivers/iris/ |
| H A D | iris_state.c | 5696 const unsigned shift = 4 - n; in emit_push_constant_packets() local
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| /third_party/mesa3d/src/panfrost/midgard/ |
| H A D | midgard.h | 723 unsigned shift : 3; member
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| /third_party/musl/ldso/linux/ |
| H A D | dynlink.c | 2575 size_t shift = 0; in sleb128_decoder() local
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| /third_party/node/deps/simdutf/ |
| H A D | simdutf.cpp | 13340 uint32x4_t shift = vreinterpretq_u32_u8(vshlq_n_u8(swap, 2)); in convert_masked_utf8_to_utf16() local [all...] |
| /third_party/libabigail/src/ |
| H A D | abg-dwarf-reader.cc | 846 size_t shift; member
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| /third_party/skia/third_party/externals/angle2/src/libANGLE/renderer/vulkan/shaders/src/third_party/ffx_spd/ |
| H A D | ffx_a.h | 509 static AB1 shift[512]={ in AU1_AH1_AF1() local
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| /third_party/skia/third_party/externals/libwebp/swig/ |
| H A D | libwebp_python_wrap.c | 5465 size_t shift = (ci->ptype) - types; in SWIG_Python_FixMethods() local
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