| /device/soc/hisilicon/hi3516dv300/sdk_linux/drv/interdrv/common/cipher/src/drv/cipher_v1.0/compat/ |
| H A D | hal_otp.c | 64 hi_u32 reg_value = 0; in hal_otp_wait_free() local
84 hi_u32 reg_value = otp_mode; in hal_otp_set_mode() local
97 hi_u32 reg_value = OTP_OP_START_VAL; in hal_otp_op_start() local
104 hi_u32 reg_value = 0; in hal_otp_wait_op_done() local
123 hi_u32 reg_value; hal_choose_otp_key() local
[all...] |
| /device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/ |
| H A D | mali_kbase_device.c | 340 kbase_device_trace_register_access(struct kbase_context *kctx, enum kbase_reg_access_type type, u16 reg_offset, u32 reg_value) kbase_device_trace_register_access() argument
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| /device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/ |
| H A D | mali_kbase_device.c | 331 void kbase_device_trace_register_access(struct kbase_context *kctx, enum kbase_reg_access_type type, u16 reg_offset, u32 reg_value) in kbase_device_trace_register_access() argument
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| /device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/component/hdmi/src/mkp/hal/ctrl/hisiv100/ |
| H A D | hdmi_hal_intf.c | 71 hi_u32 reg_value;
in hal_hdmi_cbar_enable() local
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| H A D | hdmi_hal_ctrl.c | 514 hi_u32 reg_value;
in ctrl_video_color_rgb_set() local
822 hi_u32 reg_value;
in ctrl_video_color_rgb_get() local
[all...] |
| /third_party/mesa3d/src/amd/common/ |
| H A D | ac_shadowed_regs.c | 4032 uint32_t reg_value = info->pa_sc_tile_steering_override; in ac_emulate_clear_state() local
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| /third_party/backends/backend/genesys/ |
| H A D | low.cpp | 219 auto reg_value = dev.interface->read_register(address); in scanner_register_rw_bits() local
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| /third_party/backends/backend/ |
| H A D | hp4200.c | 120 unsigned char reg_value; in getreg() local
132 setreg (HP4200_Scanner * s, unsigned char reg, unsigned char reg_value) in setreg() argument
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| /third_party/mesa3d/src/intel/tools/ |
| H A D | aubinator_viewer.cpp | 109 handle_reg_write(void *user_data, uint32_t reg_offset, uint32_t reg_value) in handle_reg_write() argument
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| /third_party/node/deps/v8/src/compiler/backend/ppc/ |
| H A D | code-generator-ppc.cc | 3917 int reg_value = -1; in AssembleArchBoolean() local
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| /third_party/mesa3d/src/gallium/drivers/r300/compiler/ |
| H A D | radeon_pair_schedule.c | 97 struct reg_value { struct
[all...] |
| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| H A D | si_state.h | 346 uint32_t reg_value[SI_NUM_TRACKED_REGS]; member
|
| /third_party/node/deps/v8/src/execution/riscv64/ |
| H A D | simulator-riscv64.cc | 2557 void Simulator::TraceMemRd(int64_t addr, T value, int64_t reg_value) { in TraceMemRd() argument
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| /third_party/cmsis/CMSIS/Core/Include/ |
| H A D | core_cm7.h | 1883 uint32_t reg_value; in __NVIC_SetPriorityGrouping() local
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| H A D | core_cm4.h | 1664 uint32_t reg_value; in __NVIC_SetPriorityGrouping() local
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| H A D | core_sc300.h | 1465 uint32_t reg_value; in __NVIC_SetPriorityGrouping() local
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| H A D | core_cm3.h | 1482 uint32_t reg_value; in __NVIC_SetPriorityGrouping() local
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| H A D | core_starmc1.h | 2294 uint32_t reg_value; in __NVIC_SetPriorityGrouping() local
2692 uint32_t reg_value; in TZ_NVIC_SetPriorityGrouping_NS() local
[all...] |
| H A D | core_cm35p.h | 2196 uint32_t reg_value; in __NVIC_SetPriorityGrouping() local
2573 uint32_t reg_value; in TZ_NVIC_SetPriorityGrouping_NS() local
[all...] |
| H A D | core_cm33.h | 2196 uint32_t reg_value; in __NVIC_SetPriorityGrouping() local
2573 uint32_t reg_value; in TZ_NVIC_SetPriorityGrouping_NS() local
[all...] |
| H A D | core_cm85.h | 3729 uint32_t reg_value; in __NVIC_SetPriorityGrouping() local
4106 uint32_t reg_value; in TZ_NVIC_SetPriorityGrouping_NS() local
[all...] |
| H A D | core_cm55.h | 3705 uint32_t reg_value; in __NVIC_SetPriorityGrouping() local
4082 uint32_t reg_value; in TZ_NVIC_SetPriorityGrouping_NS() local
[all...] |
| /device/soc/hisilicon/hi3516dv300/sdk_liteos/include/adapt/ |
| H A D | hi_comm_isp_adapt.h | 2081 hi_u32 reg_value;
member
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| /device/soc/hisilicon/hi3516dv300/sdk_linux/include/adapt/ |
| H A D | hi_comm_isp_adapt.h | 2081 hi_u32 reg_value;
member
|