| /third_party/node/deps/v8/src/compiler/backend/x64/ |
| H A D | code-generator-x64.cc | 3842 uint8_t lane = lanes >> k; in AssembleArchInstruction() local 3858 uint8_t lane = lanes >> k; in AssembleArchInstruction() local 3930 uint8_t lane = i.InputUint8(index + 1); in AssembleArchInstruction() local 3938 uint8_t lane in AssembleArchInstruction() local 4006 uint8_t lane = i.InputInt8(1) & 0x7; AssembleArchInstruction() local 4020 uint8_t lane = i.InputInt8(1) & 0xf; AssembleArchInstruction() local [all...] |
| H A D | instruction-selector-x64.cc | 3271 int32_t lane = OpParameter<int32_t>(node->op()); in VisitF32x4ReplaceLane() local 3279 int32_t lane = OpParameter<int32_t>(node->op()); in VisitF64x2ReplaceLane() local [all...] |
| /third_party/vixl/src/aarch64/ |
| H A D | simulator-aarch64.h | 503 void Insert(int lane, T new_value) { in Insert() argument 564 WriteLane(T src, int lane) WriteLane() argument 580 WriteLane(vixl::internal::SimFloat16 src, int lane) WriteLane() argument 581 WriteLane(Float16ToRawbits(src), lane); WriteLane() local 647 SetChunk(int lane, ChunkType new_value) SetChunk() argument 667 SetActiveMask(int lane, T new_value) SetActiveMask() argument 1083 GetElementAddress(int lane, int reg) const GetElementAddress() argument [all...] |
| H A D | assembler-aarch64.cc | 2641 ld2(const VRegister& vt, const VRegister& vt2, int lane, const MemOperand& src) ld2() argument 2676 ld3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, int lane, const MemOperand& src) ld3() argument 2714 ld4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, int lane, const MemOperand& src) ld4() argument 2794 st2(const VRegister& vt, const VRegister& vt2, int lane, const MemOperand& dst) st2() argument 2818 st3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, int lane, const MemOperand& dst) st3() argument 2844 st4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, int lane, const MemOperand& dst) st4() argument 2858 LoadStoreStructSingle(const VRegister& vt, uint32_t lane, const MemOperand& addr, NEONLoadStoreSingleStructOp op) LoadStoreStructSingle() argument [all...] |
| H A D | macro-assembler-aarch64.h | 3374 void Ld1(const VRegister& vt, int lane, const MemOperand& src) { in Ld1() argument 3543 void St1(const VRegister& vt, int lane, const MemOperand& dst) { in St1() argument 3389 Ld2(const VRegister& vt, const VRegister& vt2, int lane, const MemOperand& src) Ld2() argument 3410 Ld3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, int lane, const MemOperand& src) Ld3() argument 3436 Ld4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, int lane, const MemOperand& src) Ld4() argument 3570 St2(const VRegister& vt, const VRegister& vt2, int lane, const MemOperand& dst) St2() argument 3578 St3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, int lane, const MemOperand& dst) St3() argument 3587 St4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, int lane, const MemOperand& dst) St4() argument [all...] |
| H A D | simulator-aarch64.cc | 1881 PrintVSingleStructAccess(int rt_code, int reg_count, int lane, PrintRegisterFormat format, const char* op, uintptr_t address) Simulator() argument 1984 int lane = (q_index * lanes_per_q) + i; Simulator() local 8505 int lane = instr->GetNEONLSIndex(index_shift); Simulator() local 11343 int lane = reverse ? ((lane_count - 1) - i) : i; Simulator() local [all...] |
| /third_party/node/deps/v8/src/wasm/baseline/ppc/ |
| H A D | liftoff-assembler-ppc.h | 1763 StoreLane(Register dst, Register offset, uintptr_t offset_imm, LiftoffRegister src, StoreType type, uint8_t lane, uint32_t* protected_store_pc) StoreLane() argument
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| /third_party/node/deps/v8/src/wasm/ |
| H A D | function-body-decoder-impl.h | 685 uint8_t lane; member [all...] |
| /third_party/node/deps/v8/src/compiler/backend/ia32/ |
| H A D | instruction-selector-ia32.cc | 2481 InstructionOperand lane = g.UseImmediate(OpParameter<int32_t>(node->op())); in VisitI64x2ReplaceLaneI32Pair() local 2634 int32_t lane = OpParameter<int32_t>(node->op()); in VisitF64x2ReplaceLane() local
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| /third_party/node/deps/v8/src/codegen/arm/ |
| H A D | macro-assembler-arm.cc | 1086 ExtractLane(Register dst, QwNeonRegister src, NeonDataType dt, int lane) CallRecordWriteStub() argument 1098 ExtractLane(Register dst, DwVfpRegister src, NeonDataType dt, int lane) CallRecordWriteStub() argument 1107 ExtractLane(SwVfpRegister dst, QwNeonRegister src, int lane) CallRecordWriteStub() argument 1113 ExtractLane(DwVfpRegister dst, QwNeonRegister src, int lane) CallRecordWriteStub() argument 1119 ReplaceLane(QwNeonRegister dst, QwNeonRegister src, Register src_lane, NeonDataType dt, int lane) CallRecordWriteStub() argument 1132 ReplaceLane(QwNeonRegister dst, QwNeonRegister src, SwVfpRegister src_lane, int lane) CallRecordWriteStub() argument 1139 ReplaceLane(QwNeonRegister dst, QwNeonRegister src, DwVfpRegister src_lane, int lane) CallRecordWriteStub() argument 1146 LoadLane(NeonSize sz, NeonListOperand dst_list, uint8_t lane, NeonMemOperand src) CallRecordWriteStub() argument 1156 StoreLane(NeonSize sz, NeonListOperand src_list, uint8_t lane, NeonMemOperand dst) CallRecordWriteStub() argument [all...] |
| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-arm64.h | 339 void Insert(int lane, T new_value) { in Insert() argument [all...] |
| /third_party/node/deps/v8/src/wasm/baseline/ia32/ |
| H A D | liftoff-assembler-ia32.h | 2880 uint8_t lane = shuffle[i * 4 + j]; in emit_i8x16_shuffle() local 2891 uint8_t lane = shuffle[i * 4 + j]; in emit_i8x16_shuffle() local 2833 StoreLane(Register dst, Register offset, uintptr_t offset_imm, LiftoffRegister src, StoreType type, uint8_t lane, uint32_t* protected_store_pc) StoreLane() argument [all...] |
| /third_party/node/deps/v8/src/wasm/baseline/arm64/ |
| H A D | liftoff-assembler-arm64.h | 1750 StoreLane(Register dst, Register offset, uintptr_t offset_imm, LiftoffRegister src, StoreType type, uint8_t lane, uint32_t* protected_store_pc) StoreLane() argument
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| /third_party/mesa3d/src/amd/llvm/ |
| H A D | ac_nir_to_llvm.c | 4096 unsigned lane = nir_src_as_uint(instr->src[1]); in visit_intrinsic() local
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| H A D | ac_llvm_build.c | 3138 _ac_build_readlane(struct ac_llvm_context *ctx, LLVMValueRef src, LLVMValueRef lane, bool with_opt_barrier) _ac_build_readlane() argument 3159 ac_build_readlane_common(struct ac_llvm_context *ctx, LLVMValueRef src, LLVMValueRef lane, bool with_opt_barrier) ac_build_readlane_common() argument 3202 ac_build_readlane_no_opt_barrier(struct ac_llvm_context *ctx, LLVMValueRef src, LLVMValueRef lane) ac_build_readlane_no_opt_barrier() argument 3208 ac_build_readlane(struct ac_llvm_context *ctx, LLVMValueRef src, LLVMValueRef lane) ac_build_readlane() argument 3213 ac_build_writelane(struct ac_llvm_context *ctx, LLVMValueRef src, LLVMValueRef value, LLVMValueRef lane) ac_build_writelane() argument [all...] |
| /third_party/node/deps/v8/src/wasm/baseline/mips/ |
| H A D | liftoff-assembler-mips.h | 1809 StoreLane(Register dst, Register offset, uintptr_t offset_imm, LiftoffRegister src, StoreType type, uint8_t lane, uint32_t* protected_store_pc) StoreLane() argument
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| /third_party/node/deps/v8/src/wasm/baseline/loong64/ |
| H A D | liftoff-assembler-loong64.h | 1797 StoreLane(Register dst, Register offset, uintptr_t offset_imm, LiftoffRegister src, StoreType type, uint8_t lane, uint32_t* protected_store_pc) StoreLane() argument
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.cc | 2382 void Assembler::ld2(const VRegister& vt, const VRegister& vt2, int lane, in ld2() argument 2498 void Assembler::st2(const VRegister& vt, const VRegister& vt2, int lane, in st2() argument 2407 ld3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, int lane, const MemOperand& src) ld3() argument 2436 ld4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, int lane, const MemOperand& src) ld4() argument 2515 st3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, int lane, const MemOperand& dst) st3() argument 2535 st4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, int lane, const MemOperand& dst) st4() argument 2546 LoadStoreStructSingle(const VRegister& vt, uint32_t lane, const MemOperand& addr, NEONLoadStoreSingleStructOp op) LoadStoreStructSingle() argument 2588 ld1(const VRegister& vt, int lane, const MemOperand& src) ld1() argument 2596 st1(const VRegister& vt, int lane, const MemOperand& dst) st1() argument [all...] |
| /third_party/node/deps/v8/src/wasm/baseline/x64/ |
| H A D | liftoff-assembler-x64.h | 2485 uint8_t lane = shuffle[i]; in emit_i8x16_shuffle() local 2495 uint8_t lane = shuffle[i]; in emit_i8x16_shuffle() local 2449 StoreLane(Register dst, Register offset, uintptr_t offset_imm, LiftoffRegister src, StoreType type, uint8_t lane, uint32_t* protected_store_pc) StoreLane() argument [all...] |
| /third_party/node/deps/v8/src/wasm/baseline/riscv64/ |
| H A D | liftoff-assembler-riscv64.h | 1845 StoreLane(Register dst, Register offset, uintptr_t offset_imm, LiftoffRegister src, StoreType type, uint8_t lane, uint32_t* protected_store_pc) StoreLane() argument
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| /third_party/node/deps/v8/src/wasm/baseline/mips64/ |
| H A D | liftoff-assembler-mips64.h | 2093 StoreLane(Register dst, Register offset, uintptr_t offset_imm, LiftoffRegister src, StoreType type, uint8_t lane, uint32_t* protected_store_pc) StoreLane() argument
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| /third_party/mesa3d/src/panfrost/bifrost/ |
| H A D | bifrost_compile.c | 2213 bi_index lane = bi_lshift_xor_i32(b, lane_id, s1, bi_imm_u8(0)); in bi_clper_xor() local
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| /third_party/vixl/src/aarch32/ |
| H A D | assembler-aarch32.cc | 517 Dt_U_opc1_opc2_1::Dt_U_opc1_opc2_1(DataType dt, const DRegisterLane& lane) { in Dt_U_opc1_opc2_1() argument 565 Dt_opc1_opc2_1(DataType dt, const DRegisterLane& lane) Dt_opc1_opc2_1() argument 601 Dt_imm4_1(DataType dt, const DRegisterLane& lane) Dt_imm4_1() argument [all...] |
| H A D | disasm-aarch32.cc | 76 DecodeNeon(int lane, SpacingType spacing) in DecodeNeon() argument 330 DataTypeValue Dt_U_opc1_opc2_1_Decode(uint32_t value, unsigned* lane) { in Dt_U_opc1_opc2_1_Decode() argument 355 DataTypeValue Dt_opc1_opc2_1_Decode(uint32_t value, unsigned* lane) { in Dt_opc1_opc2_1_Decode() argument 372 Dt_imm4_1_Decode(uint32_t value, unsigned* lane) Dt_imm4_1_Decode() argument 840 int lane = (value >> 1) & 0x7; Index_1_Decode() local 846 int lane = (value >> 2) & 0x3; Index_1_Decode() local 852 int lane = (value >> 3) & 0x1; Index_1_Decode() local 872 int lane = (value >> 1) & 0x7; Align_index_align_1_Decode() local 885 int lane = (value >> 2) & 0x3; Align_index_align_1_Decode() local 898 int lane = (value >> 3) & 0x1; Align_index_align_1_Decode() local 919 int lane = (value >> 1) & 0x7; Align_index_align_2_Decode() local 932 int lane = (value >> 2) & 0x3; Align_index_align_2_Decode() local 945 int lane = (value >> 3) & 0x1; Align_index_align_2_Decode() local 966 int lane = (value >> 1) & 0x7; Align_index_align_3_Decode() local 979 int lane = (value >> 2) & 0x3; Align_index_align_3_Decode() local 994 int lane = (value >> 3) & 0x1; Align_index_align_3_Decode() local 14948 int lane = decode_neon.GetLane(); DecodeT32() local 14962 lane), DecodeT32() local 14990 int lane = decode_neon.GetLane(); DecodeT32() local 15004 lane), DecodeT32() local 15034 int lane = decode_neon.GetLane(); DecodeT32() local 15049 lane), DecodeT32() local 15097 int lane = decode_neon.GetLane(); DecodeT32() local 15114 lane), DecodeT32() local 15142 int lane = decode_neon.GetLane(); DecodeT32() local 15159 lane), DecodeT32() local 15189 int lane = decode_neon.GetLane(); DecodeT32() local 15207 lane), DecodeT32() local 15306 int lane = decode_neon.GetLane(); DecodeT32() local 15323 lane), DecodeT32() local 15350 int lane = decode_neon.GetLane(); DecodeT32() local 15367 lane), DecodeT32() local 15396 int lane = decode_neon.GetLane(); DecodeT32() local 15415 lane), DecodeT32() local 15463 int lane = decode_neon.GetLane(); DecodeT32() local 15480 lane), DecodeT32() local 15508 int lane = decode_neon.GetLane(); DecodeT32() local 15525 lane), DecodeT32() local 15555 int lane = decode_neon.GetLane(); DecodeT32() local 15573 lane), DecodeT32() local 15773 int lane = decode_neon.GetLane(); DecodeT32() local 15787 lane), DecodeT32() local 15815 int lane = decode_neon.GetLane(); DecodeT32() local 15829 lane), DecodeT32() local 15859 int lane = decode_neon.GetLane(); DecodeT32() local 15874 lane), DecodeT32() local 16083 int lane = decode_neon.GetLane(); DecodeT32() local 16100 lane), DecodeT32() local 16128 int lane = decode_neon.GetLane(); DecodeT32() local 16145 lane), DecodeT32() local 16175 int lane = decode_neon.GetLane(); DecodeT32() local 16193 lane), DecodeT32() local 16386 int lane = decode_neon.GetLane(); DecodeT32() local 16403 lane), DecodeT32() local 16426 int lane = decode_neon.GetLane(); DecodeT32() local 16443 lane), DecodeT32() local 16468 int lane = decode_neon.GetLane(); DecodeT32() local 16487 lane), DecodeT32() local 16700 int lane = decode_neon.GetLane(); DecodeT32() local 16717 lane), DecodeT32() local 16745 int lane = decode_neon.GetLane(); DecodeT32() local 16762 lane), DecodeT32() local 16792 int lane = decode_neon.GetLane(); DecodeT32() local 16810 lane), DecodeT32() local 24707 unsigned lane; DecodeT32() local 24867 unsigned lane; DecodeT32() local 28338 unsigned lane; DecodeT32() local 28364 unsigned lane; DecodeT32() local 28551 int lane; DecodeT32() local 28591 int lane; DecodeT32() local 28634 int lane; DecodeT32() local 28929 int lane; DecodeT32() local 28969 int lane; DecodeT32() local 29012 int lane; DecodeT32() local 29349 int lane; DecodeT32() local 29458 int lane; DecodeT32() local 29486 int lane; DecodeT32() local 29522 int lane; DecodeT32() local 29558 int lane; DecodeT32() local 42538 unsigned lane; DecodeA32() local 42560 unsigned lane; DecodeA32() local 42736 int lane; DecodeA32() local 42769 int lane; DecodeA32() local 42805 int lane; DecodeA32() local 43073 int lane; DecodeA32() local 43106 int lane; DecodeA32() local 43142 int lane; DecodeA32() local 43454 int lane; DecodeA32() local 43557 int lane; DecodeA32() local 43581 int lane; DecodeA32() local 43613 int lane; DecodeA32() local 43645 int lane; DecodeA32() local 51293 int lane = decode_neon.GetLane(); DecodeA32() local 51333 int lane = decode_neon.GetLane(); DecodeA32() local 51374 int lane = decode_neon.GetLane(); DecodeA32() local 51434 int lane = decode_neon.GetLane(); DecodeA32() local 51476 int lane = decode_neon.GetLane(); DecodeA32() local 51519 int lane = decode_neon.GetLane(); DecodeA32() local 51632 int lane = decode_neon.GetLane(); DecodeA32() local 51673 int lane = decode_neon.GetLane(); DecodeA32() local 51716 int lane = decode_neon.GetLane(); DecodeA32() local 51779 int lane = decode_neon.GetLane(); DecodeA32() local 51821 int lane = decode_neon.GetLane(); DecodeA32() local 51864 int lane = decode_neon.GetLane(); DecodeA32() local 53878 int lane = decode_neon.GetLane(); DecodeA32() local 53918 int lane = decode_neon.GetLane(); DecodeA32() local 53959 int lane = decode_neon.GetLane(); DecodeA32() local 54173 int lane = decode_neon.GetLane(); DecodeA32() local 54215 int lane = decode_neon.GetLane(); DecodeA32() local 54258 int lane = decode_neon.GetLane(); DecodeA32() local 54460 int lane = decode_neon.GetLane(); DecodeA32() local 54497 int lane = decode_neon.GetLane(); DecodeA32() local 54536 int lane = decode_neon.GetLane(); DecodeA32() local 54759 int lane = decode_neon.GetLane(); DecodeA32() local 54801 int lane = decode_neon.GetLane(); DecodeA32() local 54844 int lane = decode_neon.GetLane(); DecodeA32() local 65854 unsigned lane; DecodeA32() local 67157 unsigned lane; DecodeA32() local [all...] |
| /third_party/node/deps/v8/src/compiler/ |
| H A D | wasm-compiler.cc | 5093 Node* WasmGraphBuilder::SimdLaneOp(wasm::WasmOpcode opcode, uint8_t lane, in SimdLaneOp() argument [all...] |