Lines Matching defs:lane
594 for (int lane = 0; lane < lane_count; lane++) {
595 // Encode the register number and (D-sized) lane into each NaN, to
598 (0x0000000000000001 * lane);
601 vregisters_[i].Insert(lane, nan_bits);
614 for (int lane = 0; lane < lane_count; lane++) {
615 // Encode the register number and (H-sized) lane into each lane slot.
616 uint16_t bits = (0x0100 * lane) | i;
617 pregisters_[i].Insert(lane, bits);
1023 // equal to the register lane size. Work out the shifted result based on
1362 // Read the lane as a double, so we can format all FP types in the same
1755 // We want to assume that we'll access at least one lane.
1764 for (int lane = reg_size_in_bytes - 1; lane >= 0; lane--) {
1765 bool access = (access_mask & (1 << lane)) != 0;
1766 bool future = (future_access_mask & (1 << lane)) != 0;
1883 int lane,
1895 uint16_t lane_mask = 1 << (lane * lane_size_in_bytes);
1984 int lane = (q_index * lanes_per_q) + i;
1992 addr.GetStructAddress(lane));
2827 // '00' is reserved for Q-sized lane.
2834 // '00' is reserved for Q-sized lane.
8505 int lane = instr->GetNEONLSIndex(index_shift);
8517 ld1(vf, ReadVRegister(rt), lane, addr);
8519 st1(vf, ReadVRegister(rt), lane, addr);
8528 ld2(vf, ReadVRegister(rt), ReadVRegister(rt2), lane, addr);
8530 st2(vf, ReadVRegister(rt), ReadVRegister(rt2), lane, addr);
8547 lane,
8554 lane,
8574 lane,
8582 lane,
8598 PrintVSingleStructAccess(rt, reg_count, lane, print_format, "<-", addr);
8606 PrintVSingleStructAccess(rt, reg_count, lane, print_format, "->", addr);
9694 /* DUPM uses the same lane size and immediate encoding as bitwise logical
9792 // SVE uses the whole (saturated) lane for the shift amount.
9956 // Although the instructions have a separate encoding class, the lane size is
10026 // Although the instructions have a separate encoding class, the lane size is
10159 // Although the instructions are separated, the lane size is encoded in the
11343 int lane = reverse ? ((lane_count - 1) - i) : i;
11344 dst.SetActive(vform, lane, last);
11571 mov(kFormatVnD, zd, zn); // The lane size is arbitrary.