Home
last modified time | relevance | path

Searched refs:vt2 (Results 1 - 11 of 11) sorted by relevance

/third_party/ffmpeg/libavcodec/mips/
H A Dvp8_idct_msa.c51 v4i32 in0, in1, in2, in3, hz0, hz1, hz2, hz3, vt0, vt1, vt2, vt3; in ff_vp8_idct_add_msa() local
64 VP8_IDCT_1D_W(hz0, hz1, hz2, hz3, vt0, vt1, vt2, vt3); in ff_vp8_idct_add_msa()
65 SRARI_W4_SW(vt0, vt1, vt2, vt3, 3); in ff_vp8_idct_add_msa()
67 TRANSPOSE4x4_SW_SW(vt0, vt1, vt2, vt3, vt0, vt1, vt2, vt3); in ff_vp8_idct_add_msa()
73 ADD4(res0, vt0, res1, vt1, res2, vt2, res3, vt3, res0, res1, res2, res3); in ff_vp8_idct_add_msa()
109 v4i32 hz0, hz1, hz2, hz3, vt0, vt1, vt2, vt3; in ff_vp8_luma_dc_wht_msa() local
120 BUTTERFLY_4(a1, d1, c1, b1, vt0, vt1, vt3, vt2); in ff_vp8_luma_dc_wht_msa()
121 ADD4(vt0, 3, vt1, 3, vt2, 3, vt3, 3, vt0, vt1, vt2, vt in ff_vp8_luma_dc_wht_msa()
[all...]
/third_party/node/deps/v8/src/codegen/arm64/
H A Dmacro-assembler-arm64.h1195 void St1(const VRegister& vt, const VRegister& vt2, const MemOperand& dst) { in St1() argument
1197 st1(vt, vt2, dst); in St1()
1199 void St1(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, in St1() argument
1202 st1(vt, vt2, vt3, dst); in St1()
1204 void St1(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, in St1() argument
1207 st1(vt, vt2, vt3, vt4, dst); in St1()
1636 void Ld1(const VRegister& vt, const VRegister& vt2, const MemOperand& src) { in Ld1() argument
1638 ld1(vt, vt2, src); in Ld1()
1640 void Ld1(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, in Ld1() argument
1643 ld1(vt, vt2, vt in Ld1()
1645 Ld1(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, const MemOperand& src) Ld1() argument
1658 Ld2(const VRegister& vt, const VRegister& vt2, const MemOperand& src) Ld2() argument
1662 Ld2(const VRegister& vt, const VRegister& vt2, int lane, const MemOperand& src) Ld2() argument
1667 Ld2r(const VRegister& vt, const VRegister& vt2, const MemOperand& src) Ld2r() argument
1671 Ld3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const MemOperand& src) Ld3() argument
1676 Ld3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, int lane, const MemOperand& src) Ld3() argument
1681 Ld3r(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const MemOperand& src) Ld3r() argument
1686 Ld4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, const MemOperand& src) Ld4() argument
1691 Ld4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, int lane, const MemOperand& src) Ld4() argument
1696 Ld4r(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, const MemOperand& src) Ld4r() argument
1701 St2(const VRegister& vt, const VRegister& vt2, const MemOperand& dst) St2() argument
1705 St3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const MemOperand& dst) St3() argument
1710 St4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, const MemOperand& dst) St4() argument
1715 St2(const VRegister& vt, const VRegister& vt2, int lane, const MemOperand& dst) St2() argument
1720 St3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, int lane, const MemOperand& dst) St3() argument
1725 St4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, int lane, const MemOperand& dst) St4() argument
[all...]
H A Dassembler-arm64.cc2346 void Assembler::ld1(const VRegister& vt, const VRegister& vt2, in ld1() argument
2348 USE(vt2); in ld1()
2349 DCHECK(AreSameFormat(vt, vt2)); in ld1()
2350 DCHECK(AreConsecutive(vt, vt2)); in ld1()
2354 void Assembler::ld1(const VRegister& vt, const VRegister& vt2, in ld1() argument
2356 USE(vt2); in ld1()
2358 DCHECK(AreSameFormat(vt, vt2, vt3)); in ld1()
2359 DCHECK(AreConsecutive(vt, vt2, vt3)); in ld1()
2363 void Assembler::ld1(const VRegister& vt, const VRegister& vt2, in ld1() argument
2366 USE(vt2); in ld1()
2374 ld2(const VRegister& vt, const VRegister& vt2, const MemOperand& src) ld2() argument
2382 ld2(const VRegister& vt, const VRegister& vt2, int lane, const MemOperand& src) ld2() argument
2390 ld2r(const VRegister& vt, const VRegister& vt2, const MemOperand& src) ld2r() argument
2398 ld3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const MemOperand& src) ld3() argument
2407 ld3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, int lane, const MemOperand& src) ld3() argument
2416 ld3r(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const MemOperand& src) ld3r() argument
2425 ld4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, const MemOperand& src) ld4() argument
2436 ld4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, int lane, const MemOperand& src) ld4() argument
2447 ld4r(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, const MemOperand& src) ld4r() argument
2462 st1(const VRegister& vt, const VRegister& vt2, const MemOperand& src) st1() argument
2470 st1(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const MemOperand& src) st1() argument
2479 st1(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, const MemOperand& src) st1() argument
2490 st2(const VRegister& vt, const VRegister& vt2, const MemOperand& dst) st2() argument
2498 st2(const VRegister& vt, const VRegister& vt2, int lane, const MemOperand& dst) st2() argument
2506 st3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const MemOperand& dst) st3() argument
2515 st3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, int lane, const MemOperand& dst) st3() argument
2524 st4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, const MemOperand& dst) st4() argument
2535 st4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, int lane, const MemOperand& dst) st4() argument
[all...]
H A Dassembler-arm64.h1227 void st1(const VRegister& vt, const VRegister& vt2, const MemOperand& src);
1230 void st1(const VRegister& vt, const VRegister& vt2, const VRegister& vt3,
1234 void st1(const VRegister& vt, const VRegister& vt2, const VRegister& vt3,
1241 void st2(const VRegister& vt, const VRegister& vt2, const MemOperand& src);
1244 void st2(const VRegister& vt, const VRegister& vt2, int lane,
1248 void st3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3,
1252 void st3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3,
1256 void st4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3,
1260 void st4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3,
1841 void ld1(const VRegister& vt, const VRegister& vt2, cons
[all...]
/third_party/vixl/src/aarch64/
H A Dassembler-aarch64.cc2595 const VRegister& vt2, in ld1()
2597 USE(vt2); in ld1()
2599 VIXL_ASSERT(AreSameFormat(vt, vt2)); in ld1()
2600 VIXL_ASSERT(AreConsecutive(vt, vt2)); in ld1()
2606 const VRegister& vt2, in ld1()
2609 USE(vt2, vt3); in ld1()
2611 VIXL_ASSERT(AreSameFormat(vt, vt2, vt3)); in ld1()
2612 VIXL_ASSERT(AreConsecutive(vt, vt2, vt3)); in ld1()
2618 const VRegister& vt2, in ld1()
2622 USE(vt2, vt in ld1()
2594 ld1(const VRegister& vt, const VRegister& vt2, const MemOperand& src) ld1() argument
2605 ld1(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const MemOperand& src) ld1() argument
2617 ld1(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, const MemOperand& src) ld1() argument
2630 ld2(const VRegister& vt, const VRegister& vt2, const MemOperand& src) ld2() argument
2641 ld2(const VRegister& vt, const VRegister& vt2, int lane, const MemOperand& src) ld2() argument
2653 ld2r(const VRegister& vt, const VRegister& vt2, const MemOperand& src) ld2r() argument
2664 ld3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const MemOperand& src) ld3() argument
2676 ld3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, int lane, const MemOperand& src) ld3() argument
2689 ld3r(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const MemOperand& src) ld3r() argument
2701 ld4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, const MemOperand& src) ld4() argument
2714 ld4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, int lane, const MemOperand& src) ld4() argument
2728 ld4r(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, const MemOperand& src) ld4r() argument
2747 st1(const VRegister& vt, const VRegister& vt2, const MemOperand& src) st1() argument
2758 st1(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const MemOperand& src) st1() argument
2770 st1(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, const MemOperand& src) st1() argument
2783 st2(const VRegister& vt, const VRegister& vt2, const MemOperand& dst) st2() argument
2794 st2(const VRegister& vt, const VRegister& vt2, int lane, const MemOperand& dst) st2() argument
2806 st3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const MemOperand& dst) st3() argument
2818 st3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, int lane, const MemOperand& dst) st3() argument
2831 st4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, const MemOperand& dst) st4() argument
2844 st4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, int lane, const MemOperand& dst) st4() argument
[all...]
H A Dmacro-assembler-aarch64.h3352 void Ld1(const VRegister& vt, const VRegister& vt2, const MemOperand& src) { in Ld1() argument
3355 ld1(vt, vt2, src); in Ld1()
3358 const VRegister& vt2, in Ld1()
3363 ld1(vt, vt2, vt3, src); in Ld1()
3366 const VRegister& vt2, in Ld1()
3372 ld1(vt, vt2, vt3, vt4, src); in Ld1()
3384 void Ld2(const VRegister& vt, const VRegister& vt2, const MemOperand& src) { in Ld2() argument
3387 ld2(vt, vt2, src); in Ld2()
3390 const VRegister& vt2, in Ld2()
3395 ld2(vt, vt2, lan in Ld2()
3357 Ld1(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const MemOperand& src) Ld1() argument
3365 Ld1(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, const MemOperand& src) Ld1() argument
3389 Ld2(const VRegister& vt, const VRegister& vt2, int lane, const MemOperand& src) Ld2() argument
3397 Ld2r(const VRegister& vt, const VRegister& vt2, const MemOperand& src) Ld2r() argument
3402 Ld3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const MemOperand& src) Ld3() argument
3410 Ld3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, int lane, const MemOperand& src) Ld3() argument
3419 Ld3r(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const MemOperand& src) Ld3r() argument
3427 Ld4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, const MemOperand& src) Ld4() argument
3436 Ld4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, int lane, const MemOperand& src) Ld4() argument
3446 Ld4r(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, const MemOperand& src) Ld4r() argument
3521 St1(const VRegister& vt, const VRegister& vt2, const MemOperand& dst) St1() argument
3526 St1(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const MemOperand& dst) St1() argument
3534 St1(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, const MemOperand& dst) St1() argument
3548 St2(const VRegister& vt, const VRegister& vt2, const MemOperand& dst) St2() argument
3553 St3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const MemOperand& dst) St3() argument
3561 St4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, const MemOperand& dst) St4() argument
3570 St2(const VRegister& vt, const VRegister& vt2, int lane, const MemOperand& dst) St2() argument
3578 St3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, int lane, const MemOperand& dst) St3() argument
3587 St4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3, const VRegister& vt4, int lane, const MemOperand& dst) St4() argument
[all...]
H A Dassembler-aarch64.h2875 void ld1(const VRegister& vt, const VRegister& vt2, const MemOperand& src);
2879 const VRegister& vt2,
2885 const VRegister& vt2,
2897 void ld2(const VRegister& vt, const VRegister& vt2, const MemOperand& src);
2901 const VRegister& vt2,
2906 void ld2r(const VRegister& vt, const VRegister& vt2, const MemOperand& src);
2910 const VRegister& vt2,
2916 const VRegister& vt2,
2923 const VRegister& vt2,
2929 const VRegister& vt2,
[all...]
/third_party/vixl/benchmarks/aarch64/
H A Dbench-utils.cc388 VRegister vt2((vt.GetCode() + 1) % kNumberOfVRegisters, kQRegSize); in GenerateNEONSequence()
392 VIXL_ASSERT(!kCalleeSavedV.IncludesAliasOf(vt2)); in GenerateNEONSequence()
395 __ Ld3(vt.V4S(), vt2.V4S(), vt3.V4S(), MemOperand(scratch)); in GenerateNEONSequence()
396 __ St4(vt.V16B(), vt2.V16B(), vt3.V16B(), vt4.V16B(), MemOperand(scratch)); in GenerateNEONSequence()
/third_party/mesa3d/src/intel/compiler/
H A Dbrw_clip_tri.c529 struct brw_indirect vt2 = brw_indirect(2, 0); in brw_clip_test() local
539 brw_MOV(p, get_addr_reg(vt2), brw_address(c->reg.vertex[2])); in brw_clip_test()
542 brw_MOV(p, v2, deref_4f(vt2, hpos_offset)); in brw_clip_test()
/third_party/skia/third_party/externals/libwebp/src/dsp/
H A Ddec_msa.c45 v4i32 in0, in1, in2, in3, hz0, hz1, hz2, hz3, vt0, vt1, vt2, vt3; in TransformOne() local
55 IDCT_1D_W(hz0, hz1, hz2, hz3, vt0, vt1, vt2, vt3); in TransformOne()
56 SRARI_W4_SW(vt0, vt1, vt2, vt3, 3); in TransformOne()
57 TRANSPOSE4x4_SW_SW(vt0, vt1, vt2, vt3, vt0, vt1, vt2, vt3); in TransformOne()
63 ADD4(res0, vt0, res1, vt1, res2, vt2, res3, vt3, res0, res1, res2, res3); in TransformOne()
H A Denc_msa.c47 v4i32 in0, in1, in2, in3, hz0, hz1, hz2, hz3, vt0, vt1, vt2, vt3; in ITransformOne() local
57 IDCT_1D_W(hz0, hz1, hz2, hz3, vt0, vt1, vt2, vt3); in ITransformOne()
58 SRARI_W4_SW(vt0, vt1, vt2, vt3, 3); in ITransformOne()
59 TRANSPOSE4x4_SW_SW(vt0, vt1, vt2, vt3, vt0, vt1, vt2, vt3); in ITransformOne()
65 ADD4(res0, vt0, res1, vt1, res2, vt2, res3, vt3, res0, res1, res2, res3); in ITransformOne()

Completed in 39 milliseconds