Lines Matching refs:vt2
2346 void Assembler::ld1(const VRegister& vt, const VRegister& vt2,
2348 USE(vt2);
2349 DCHECK(AreSameFormat(vt, vt2));
2350 DCHECK(AreConsecutive(vt, vt2));
2354 void Assembler::ld1(const VRegister& vt, const VRegister& vt2,
2356 USE(vt2);
2358 DCHECK(AreSameFormat(vt, vt2, vt3));
2359 DCHECK(AreConsecutive(vt, vt2, vt3));
2363 void Assembler::ld1(const VRegister& vt, const VRegister& vt2,
2366 USE(vt2);
2369 DCHECK(AreSameFormat(vt, vt2, vt3, vt4));
2370 DCHECK(AreConsecutive(vt, vt2, vt3, vt4));
2374 void Assembler::ld2(const VRegister& vt, const VRegister& vt2,
2376 USE(vt2);
2377 DCHECK(AreSameFormat(vt, vt2));
2378 DCHECK(AreConsecutive(vt, vt2));
2382 void Assembler::ld2(const VRegister& vt, const VRegister& vt2, int lane,
2384 USE(vt2);
2385 DCHECK(AreSameFormat(vt, vt2));
2386 DCHECK(AreConsecutive(vt, vt2));
2390 void Assembler::ld2r(const VRegister& vt, const VRegister& vt2,
2392 USE(vt2);
2393 DCHECK(AreSameFormat(vt, vt2));
2394 DCHECK(AreConsecutive(vt, vt2));
2398 void Assembler::ld3(const VRegister& vt, const VRegister& vt2,
2400 USE(vt2);
2402 DCHECK(AreSameFormat(vt, vt2, vt3));
2403 DCHECK(AreConsecutive(vt, vt2, vt3));
2407 void Assembler::ld3(const VRegister& vt, const VRegister& vt2,
2409 USE(vt2);
2411 DCHECK(AreSameFormat(vt, vt2, vt3));
2412 DCHECK(AreConsecutive(vt, vt2, vt3));
2416 void Assembler::ld3r(const VRegister& vt, const VRegister& vt2,
2418 USE(vt2);
2420 DCHECK(AreSameFormat(vt, vt2, vt3));
2421 DCHECK(AreConsecutive(vt, vt2, vt3));
2425 void Assembler::ld4(const VRegister& vt, const VRegister& vt2,
2428 USE(vt2);
2431 DCHECK(AreSameFormat(vt, vt2, vt3, vt4));
2432 DCHECK(AreConsecutive(vt, vt2, vt3, vt4));
2436 void Assembler::ld4(const VRegister& vt, const VRegister& vt2,
2439 USE(vt2);
2442 DCHECK(AreSameFormat(vt, vt2, vt3, vt4));
2443 DCHECK(AreConsecutive(vt, vt2, vt3, vt4));
2447 void Assembler::ld4r(const VRegister& vt, const VRegister& vt2,
2450 USE(vt2);
2453 DCHECK(AreSameFormat(vt, vt2, vt3, vt4));
2454 DCHECK(AreConsecutive(vt, vt2, vt3, vt4));
2462 void Assembler::st1(const VRegister& vt, const VRegister& vt2,
2464 USE(vt2);
2465 DCHECK(AreSameFormat(vt, vt2));
2466 DCHECK(AreConsecutive(vt, vt2));
2470 void Assembler::st1(const VRegister& vt, const VRegister& vt2,
2472 USE(vt2);
2474 DCHECK(AreSameFormat(vt, vt2, vt3));
2475 DCHECK(AreConsecutive(vt, vt2, vt3));
2479 void Assembler::st1(const VRegister& vt, const VRegister& vt2,
2482 USE(vt2);
2485 DCHECK(AreSameFormat(vt, vt2, vt3, vt4));
2486 DCHECK(AreConsecutive(vt, vt2, vt3, vt4));
2490 void Assembler::st2(const VRegister& vt, const VRegister& vt2,
2492 USE(vt2);
2493 DCHECK(AreSameFormat(vt, vt2));
2494 DCHECK(AreConsecutive(vt, vt2));
2498 void Assembler::st2(const VRegister& vt, const VRegister& vt2, int lane,
2500 USE(vt2);
2501 DCHECK(AreSameFormat(vt, vt2));
2502 DCHECK(AreConsecutive(vt, vt2));
2506 void Assembler::st3(const VRegister& vt, const VRegister& vt2,
2508 USE(vt2);
2510 DCHECK(AreSameFormat(vt, vt2, vt3));
2511 DCHECK(AreConsecutive(vt, vt2, vt3));
2515 void Assembler::st3(const VRegister& vt, const VRegister& vt2,
2517 USE(vt2);
2519 DCHECK(AreSameFormat(vt, vt2, vt3));
2520 DCHECK(AreConsecutive(vt, vt2, vt3));
2524 void Assembler::st4(const VRegister& vt, const VRegister& vt2,
2527 USE(vt2);
2530 DCHECK(AreSameFormat(vt, vt2, vt3, vt4));
2531 DCHECK(AreConsecutive(vt, vt2, vt3, vt4));
2535 void Assembler::st4(const VRegister& vt, const VRegister& vt2,
2538 USE(vt2);
2541 DCHECK(AreSameFormat(vt, vt2, vt3, vt4));
2542 DCHECK(AreConsecutive(vt, vt2, vt3, vt4));