Lines Matching refs:vt2
1195 void St1(const VRegister& vt, const VRegister& vt2, const MemOperand& dst) {
1197 st1(vt, vt2, dst);
1199 void St1(const VRegister& vt, const VRegister& vt2, const VRegister& vt3,
1202 st1(vt, vt2, vt3, dst);
1204 void St1(const VRegister& vt, const VRegister& vt2, const VRegister& vt3,
1207 st1(vt, vt2, vt3, vt4, dst);
1636 void Ld1(const VRegister& vt, const VRegister& vt2, const MemOperand& src) {
1638 ld1(vt, vt2, src);
1640 void Ld1(const VRegister& vt, const VRegister& vt2, const VRegister& vt3,
1643 ld1(vt, vt2, vt3, src);
1645 void Ld1(const VRegister& vt, const VRegister& vt2, const VRegister& vt3,
1648 ld1(vt, vt2, vt3, vt4, src);
1658 void Ld2(const VRegister& vt, const VRegister& vt2, const MemOperand& src) {
1660 ld2(vt, vt2, src);
1662 void Ld2(const VRegister& vt, const VRegister& vt2, int lane,
1665 ld2(vt, vt2, lane, src);
1667 void Ld2r(const VRegister& vt, const VRegister& vt2, const MemOperand& src) {
1669 ld2r(vt, vt2, src);
1671 void Ld3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3,
1674 ld3(vt, vt2, vt3, src);
1676 void Ld3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3,
1679 ld3(vt, vt2, vt3, lane, src);
1681 void Ld3r(const VRegister& vt, const VRegister& vt2, const VRegister& vt3,
1684 ld3r(vt, vt2, vt3, src);
1686 void Ld4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3,
1689 ld4(vt, vt2, vt3, vt4, src);
1691 void Ld4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3,
1694 ld4(vt, vt2, vt3, vt4, lane, src);
1696 void Ld4r(const VRegister& vt, const VRegister& vt2, const VRegister& vt3,
1699 ld4r(vt, vt2, vt3, vt4, src);
1701 void St2(const VRegister& vt, const VRegister& vt2, const MemOperand& dst) {
1703 st2(vt, vt2, dst);
1705 void St3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3,
1708 st3(vt, vt2, vt3, dst);
1710 void St4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3,
1713 st4(vt, vt2, vt3, vt4, dst);
1715 void St2(const VRegister& vt, const VRegister& vt2, int lane,
1718 st2(vt, vt2, lane, dst);
1720 void St3(const VRegister& vt, const VRegister& vt2, const VRegister& vt3,
1723 st3(vt, vt2, vt3, lane, dst);
1725 void St4(const VRegister& vt, const VRegister& vt2, const VRegister& vt3,
1728 st4(vt, vt2, vt3, vt4, lane, dst);