Lines Matching refs:vt2
3352 void Ld1(const VRegister& vt, const VRegister& vt2, const MemOperand& src) {
3355 ld1(vt, vt2, src);
3358 const VRegister& vt2,
3363 ld1(vt, vt2, vt3, src);
3366 const VRegister& vt2,
3372 ld1(vt, vt2, vt3, vt4, src);
3384 void Ld2(const VRegister& vt, const VRegister& vt2, const MemOperand& src) {
3387 ld2(vt, vt2, src);
3390 const VRegister& vt2,
3395 ld2(vt, vt2, lane, src);
3397 void Ld2r(const VRegister& vt, const VRegister& vt2, const MemOperand& src) {
3400 ld2r(vt, vt2, src);
3403 const VRegister& vt2,
3408 ld3(vt, vt2, vt3, src);
3411 const VRegister& vt2,
3417 ld3(vt, vt2, vt3, lane, src);
3420 const VRegister& vt2,
3425 ld3r(vt, vt2, vt3, src);
3428 const VRegister& vt2,
3434 ld4(vt, vt2, vt3, vt4, src);
3437 const VRegister& vt2,
3444 ld4(vt, vt2, vt3, vt4, lane, src);
3447 const VRegister& vt2,
3453 ld4r(vt, vt2, vt3, vt4, src);
3521 void St1(const VRegister& vt, const VRegister& vt2, const MemOperand& dst) {
3524 st1(vt, vt2, dst);
3527 const VRegister& vt2,
3532 st1(vt, vt2, vt3, dst);
3535 const VRegister& vt2,
3541 st1(vt, vt2, vt3, vt4, dst);
3548 void St2(const VRegister& vt, const VRegister& vt2, const MemOperand& dst) {
3551 st2(vt, vt2, dst);
3554 const VRegister& vt2,
3559 st3(vt, vt2, vt3, dst);
3562 const VRegister& vt2,
3568 st4(vt, vt2, vt3, vt4, dst);
3571 const VRegister& vt2,
3576 st2(vt, vt2, lane, dst);
3579 const VRegister& vt2,
3585 st3(vt, vt2, vt3, lane, dst);
3588 const VRegister& vt2,
3595 st4(vt, vt2, vt3, vt4, lane, dst);