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Searched refs:SCB_SHCSR_MEMFAULTENA_Msk (Results 1 - 11 of 11) sorted by relevance

/third_party/cmsis/CMSIS/Core/Include/m-profile/
H A Darmv8m_mpu.h203 #ifdef SCB_SHCSR_MEMFAULTENA_Msk in ARM_MPU_Enable()
204 SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Enable()
215 #ifdef SCB_SHCSR_MEMFAULTENA_Msk in ARM_MPU_Disable()
216 SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Disable()
231 #ifdef SCB_SHCSR_MEMFAULTENA_Msk in ARM_MPU_Enable_NS()
232 SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Enable_NS()
243 #ifdef SCB_SHCSR_MEMFAULTENA_Msk in ARM_MPU_Disable_NS()
244 SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Disable_NS()
H A Darmv7m_mpu.h193 #ifdef SCB_SHCSR_MEMFAULTENA_Msk in ARM_MPU_Enable()
194 SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Enable()
205 #ifdef SCB_SHCSR_MEMFAULTENA_Msk in ARM_MPU_Disable()
206 SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; in ARM_MPU_Disable()
/third_party/cmsis/CMSIS/Core/Include/
H A Dcore_cm4.h590 #define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ macro
H A Dcore_sc300.h520 #define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ macro
H A Dcore_cm3.h525 #define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ macro
H A Dcore_cm35p.h714 #define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ macro
H A Dcore_cm33.h714 #define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ macro
H A Dcore_cm7.h642 #define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ macro
H A Dcore_starmc1.h732 #define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ macro
H A Dcore_cm85.h755 #define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ macro
H A Dcore_cm55.h734 #define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ macro

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