Home
last modified time | relevance | path

Searched refs:SCB_CPUID_REVISION_Pos (Results 1 - 14 of 14) sorted by relevance

/third_party/cmsis/CMSIS/Core/Include/
H A Dcore_sc000.h381 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ macro
382 #define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
H A Dcore_cm1.h368 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ macro
369 #define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
H A Dcore_cm0.h368 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ macro
369 #define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
H A Dcore_cm0plus.h386 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ macro
387 #define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
H A Dcore_cm4.h493 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ macro
494 #define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
H A Dcore_sc300.h420 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ macro
421 #define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
H A Dcore_cm3.h420 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ macro
421 #define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
H A Dcore_cm23.h412 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ macro
413 #define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
H A Dcore_cm35p.h584 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ macro
585 #define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
H A Dcore_cm33.h584 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ macro
585 #define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
H A Dcore_cm7.h536 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ macro
537 #define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
H A Dcore_starmc1.h602 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ macro
603 #define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
H A Dcore_cm85.h616 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ macro
617 #define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
H A Dcore_cm55.h595 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ macro
596 #define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */

Completed in 86 milliseconds