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/kernel/linux/linux-5.10/drivers/staging/media/meson/vdec/
H A Dcodec_h264.c73 0x6c, 0x65, 0x66, 0x74, 0x20, 0x32, 0x30, 0x30, 0x33, 0x2d, 0x32, 0x30,
74 0x30, 0x39, 0x20, 0x2d, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f,
76 0x2e, 0x6f, 0x72, 0x67, 0x2f, 0x78, 0x32, 0x36, 0x34, 0x2e, 0x68, 0x74,
77 0x6d, 0x6c, 0x20, 0x2d, 0x20, 0x6f, 0x70, 0x74, 0x69, 0x6f, 0x6e, 0x73,
87 0x5f, 0x6d, 0x65, 0x3d, 0x31, 0x20, 0x74, 0x72, 0x65, 0x6c, 0x6c, 0x69,
88 0x73, 0x3d, 0x30, 0x20, 0x38, 0x78, 0x38, 0x64, 0x63, 0x74, 0x3d, 0x30,
92 0x65, 0x74, 0x3d, 0x2d, 0x32, 0x20, 0x74, 0x68, 0x72, 0x65, 0x61, 0x64,
94 0x69, 0x6d, 0x61, 0x74,
[all...]
/kernel/linux/linux-6.6/drivers/staging/media/meson/vdec/
H A Dcodec_h264.c73 0x6c, 0x65, 0x66, 0x74, 0x20, 0x32, 0x30, 0x30, 0x33, 0x2d, 0x32, 0x30,
74 0x30, 0x39, 0x20, 0x2d, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f,
76 0x2e, 0x6f, 0x72, 0x67, 0x2f, 0x78, 0x32, 0x36, 0x34, 0x2e, 0x68, 0x74,
77 0x6d, 0x6c, 0x20, 0x2d, 0x20, 0x6f, 0x70, 0x74, 0x69, 0x6f, 0x6e, 0x73,
87 0x5f, 0x6d, 0x65, 0x3d, 0x31, 0x20, 0x74, 0x72, 0x65, 0x6c, 0x6c, 0x69,
88 0x73, 0x3d, 0x30, 0x20, 0x38, 0x78, 0x38, 0x64, 0x63, 0x74, 0x3d, 0x30,
92 0x65, 0x74, 0x3d, 0x2d, 0x32, 0x20, 0x74, 0x68, 0x72, 0x65, 0x61, 0x64,
94 0x69, 0x6d, 0x61, 0x74,
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/hdmi/
H A Dhdmi.c417 HDMI_CFG(pwr_reg, 8x74),
418 HDMI_CFG(hpd_reg, 8x74),
419 HDMI_CFG(pwr_clk, 8x74),
420 HDMI_CFG(hpd_clk, 8x74),
427 HDMI_CFG(pwr_reg, 8x74),
429 HDMI_CFG(pwr_clk, 8x74),
430 HDMI_CFG(hpd_clk, 8x74),
435 HDMI_CFG(pwr_reg, 8x74),
437 HDMI_CFG(pwr_clk, 8x74),
438 HDMI_CFG(hpd_clk, 8x74),
[all...]
/kernel/linux/linux-5.10/drivers/clk/imx/
H A Dclk-imx6ul.c394 hws[IMX6UL_CLK_UART5_IPG] = imx_clk_hw_gate2("uart5_ipg", "ipg", base + 0x74, 2); in imx6ul_clocks_init()
395 hws[IMX6UL_CLK_UART5_SERIAL] = imx_clk_hw_gate2("uart5_serial", "uart_podf", base + 0x74, 2); in imx6ul_clocks_init()
397 hws[IMX6UL_CLK_ENET] = imx_clk_hw_gate2("enet", "ipg", base + 0x74, 4); in imx6ul_clocks_init()
398 hws[IMX6UL_CLK_ENET_AHB] = imx_clk_hw_gate2("enet_ahb", "ahb", base + 0x74, 4); in imx6ul_clocks_init()
400 hws[IMX6ULL_CLK_EPDC_ACLK] = imx_clk_hw_gate2("epdc_aclk", "axi", base + 0x74, 4); in imx6ul_clocks_init()
401 hws[IMX6ULL_CLK_EPDC_PIX] = imx_clk_hw_gate2("epdc_pix", "epdc_podf", base + 0x74, 4); in imx6ul_clocks_init()
403 hws[IMX6UL_CLK_UART6_IPG] = imx_clk_hw_gate2("uart6_ipg", "ipg", base + 0x74, 6); in imx6ul_clocks_init()
404 hws[IMX6UL_CLK_UART6_SERIAL] = imx_clk_hw_gate2("uart6_serial", "uart_podf", base + 0x74, 6); in imx6ul_clocks_init()
405 hws[IMX6UL_CLK_LCDIF_PIX] = imx_clk_hw_gate2("lcdif_pix", "lcdif_podf", base + 0x74, 10); in imx6ul_clocks_init()
406 hws[IMX6UL_CLK_GPIO4] = imx_clk_hw_gate2("gpio4", "ipg", base + 0x74, 1 in imx6ul_clocks_init()
[all...]
H A Dclk-imx6sll.c295 hws[IMX6SLL_CLK_UART5_IPG] = imx_clk_hw_gate2("uart5_ipg", "ipg", base + 0x74, 2); in imx6sll_clocks_init()
296 hws[IMX6SLL_CLK_UART5_SERIAL] = imx_clk_hw_gate2("uart5_serial", "uart_podf", base + 0x74, 2); in imx6sll_clocks_init()
297 hws[IMX6SLL_CLK_EPDC_AXI] = imx_clk_hw_gate2("epdc_aclk", "axi", base + 0x74, 4); in imx6sll_clocks_init()
298 hws[IMX6SLL_CLK_EPDC_PIX] = imx_clk_hw_gate2("epdc_pix", "epdc_podf", base + 0x74, 4); in imx6sll_clocks_init()
299 hws[IMX6SLL_CLK_LCDIF_PIX] = imx_clk_hw_gate2("lcdif_pix", "lcdif_podf", base + 0x74, 10); in imx6sll_clocks_init()
300 hws[IMX6SLL_CLK_GPIO4] = imx_clk_hw_gate2("gpio4", "ipg", base + 0x74, 12); in imx6sll_clocks_init()
301 hws[IMX6SLL_CLK_WDOG1] = imx_clk_hw_gate2("wdog1", "ipg", base + 0x74, 16); in imx6sll_clocks_init()
302 hws[IMX6SLL_CLK_MMDC_P0_FAST] = imx_clk_hw_gate_flags("mmdc_p0_fast", "mmdc_podf", base + 0x74, 20, CLK_IS_CRITICAL); in imx6sll_clocks_init()
303 hws[IMX6SLL_CLK_MMDC_P0_IPG] = imx_clk_hw_gate2_flags("mmdc_p0_ipg", "ipg", base + 0x74, 24, CLK_IS_CRITICAL); in imx6sll_clocks_init()
304 hws[IMX6SLL_CLK_MMDC_P1_IPG] = imx_clk_hw_gate2_flags("mmdc_p1_ipg", "ipg", base + 0x74, 2 in imx6sll_clocks_init()
[all...]
H A Dclk-imx6q.c829 hws[IMX6QDL_CLK_IPU1] = imx_clk_hw_gate2("ipu1", "ipu1_podf", base + 0x74, 0); in imx6q_clocks_init()
830 hws[IMX6QDL_CLK_IPU1_DI0] = imx_clk_hw_gate2("ipu1_di0", "ipu1_di0_sel", base + 0x74, 2); in imx6q_clocks_init()
831 hws[IMX6QDL_CLK_IPU1_DI1] = imx_clk_hw_gate2("ipu1_di1", "ipu1_di1_sel", base + 0x74, 4); in imx6q_clocks_init()
832 hws[IMX6QDL_CLK_IPU2] = imx_clk_hw_gate2("ipu2", "ipu2_podf", base + 0x74, 6); in imx6q_clocks_init()
833 hws[IMX6QDL_CLK_IPU2_DI0] = imx_clk_hw_gate2("ipu2_di0", "ipu2_di0_sel", base + 0x74, 8); in imx6q_clocks_init()
835 hws[IMX6QDL_CLK_LDB_DI0] = imx_clk_hw_gate2("ldb_di0", "ldb_di0_sel", base + 0x74, 12); in imx6q_clocks_init()
836 hws[IMX6QDL_CLK_LDB_DI1] = imx_clk_hw_gate2("ldb_di1", "ldb_di1_sel", base + 0x74, 14); in imx6q_clocks_init()
838 hws[IMX6QDL_CLK_LDB_DI0] = imx_clk_hw_gate2("ldb_di0", "ldb_di0_podf", base + 0x74, 12); in imx6q_clocks_init()
839 hws[IMX6QDL_CLK_LDB_DI1] = imx_clk_hw_gate2("ldb_di1", "ldb_di1_podf", base + 0x74, 14); in imx6q_clocks_init()
841 hws[IMX6QDL_CLK_IPU2_DI1] = imx_clk_hw_gate2("ipu2_di1", "ipu2_di1_sel", base + 0x74, 1 in imx6q_clocks_init()
[all...]
H A Dclk-imx6sx.c419 hws[IMX6SX_CLK_M4] = imx_clk_hw_gate2("m4", "m4_podf", base + 0x74, 2); in imx6sx_clocks_init()
420 hws[IMX6SX_CLK_ENET] = imx_clk_hw_gate2("enet", "ipg", base + 0x74, 4); in imx6sx_clocks_init()
421 hws[IMX6SX_CLK_ENET_AHB] = imx_clk_hw_gate2("enet_ahb", "enet_sel", base + 0x74, 4); in imx6sx_clocks_init()
422 hws[IMX6SX_CLK_DISPLAY_AXI] = imx_clk_hw_gate2("display_axi", "display_podf", base + 0x74, 6); in imx6sx_clocks_init()
423 hws[IMX6SX_CLK_LCDIF2_PIX] = imx_clk_hw_gate2("lcdif2_pix", "lcdif2_sel", base + 0x74, 8); in imx6sx_clocks_init()
424 hws[IMX6SX_CLK_LCDIF1_PIX] = imx_clk_hw_gate2("lcdif1_pix", "lcdif1_sel", base + 0x74, 10); in imx6sx_clocks_init()
425 hws[IMX6SX_CLK_LDB_DI0] = imx_clk_hw_gate2("ldb_di0", "ldb_di0_div_sel", base + 0x74, 12); in imx6sx_clocks_init()
426 hws[IMX6SX_CLK_QSPI1] = imx_clk_hw_gate2("qspi1", "qspi1_podf", base + 0x74, 14); in imx6sx_clocks_init()
427 hws[IMX6SX_CLK_MLB] = imx_clk_hw_gate2("mlb", "ahb", base + 0x74, 18); in imx6sx_clocks_init()
428 hws[IMX6SX_CLK_MMDC_P0_FAST] = imx_clk_hw_gate2_flags("mmdc_p0_fast", "mmdc_podf", base + 0x74, 2 in imx6sx_clocks_init()
[all...]
/kernel/linux/linux-5.10/drivers/misc/habanalabs/include/goya/asic_reg/
H A Dgoya_blocks.h20 #define PCI_RD_REGULATOR_MAX_OFFSET 0x74
23 #define PCI_WR_REGULATOR_MAX_OFFSET 0x74
29 #define MME1_RD_REGULATOR_MAX_OFFSET 0x74
32 #define MME1_WR_REGULATOR_MAX_OFFSET 0x74
38 #define MME2_RD_REGULATOR_MAX_OFFSET 0x74
41 #define MME2_WR_REGULATOR_MAX_OFFSET 0x74
47 #define MME3_RD_REGULATOR_MAX_OFFSET 0x74
50 #define MME3_WR_REGULATOR_MAX_OFFSET 0x74
83 #define MME4_RD_REGULATOR_MAX_OFFSET 0x74
86 #define MME4_WR_REGULATOR_MAX_OFFSET 0x74
[all...]
/kernel/linux/linux-6.6/drivers/accel/habanalabs/include/goya/asic_reg/
H A Dgoya_blocks.h20 #define PCI_RD_REGULATOR_MAX_OFFSET 0x74
23 #define PCI_WR_REGULATOR_MAX_OFFSET 0x74
29 #define MME1_RD_REGULATOR_MAX_OFFSET 0x74
32 #define MME1_WR_REGULATOR_MAX_OFFSET 0x74
38 #define MME2_RD_REGULATOR_MAX_OFFSET 0x74
41 #define MME2_WR_REGULATOR_MAX_OFFSET 0x74
47 #define MME3_RD_REGULATOR_MAX_OFFSET 0x74
50 #define MME3_WR_REGULATOR_MAX_OFFSET 0x74
83 #define MME4_RD_REGULATOR_MAX_OFFSET 0x74
86 #define MME4_WR_REGULATOR_MAX_OFFSET 0x74
[all...]
/kernel/linux/linux-6.6/drivers/clk/imx/
H A Dclk-imx6sll.c295 hws[IMX6SLL_CLK_UART5_IPG] = imx_clk_hw_gate2("uart5_ipg", "ipg", base + 0x74, 2); in imx6sll_clocks_init()
296 hws[IMX6SLL_CLK_UART5_SERIAL] = imx_clk_hw_gate2("uart5_serial", "uart_podf", base + 0x74, 2); in imx6sll_clocks_init()
297 hws[IMX6SLL_CLK_EPDC_AXI] = imx_clk_hw_gate2("epdc_aclk", "axi", base + 0x74, 4); in imx6sll_clocks_init()
298 hws[IMX6SLL_CLK_EPDC_PIX] = imx_clk_hw_gate2("epdc_pix", "epdc_podf", base + 0x74, 4); in imx6sll_clocks_init()
299 hws[IMX6SLL_CLK_LCDIF_PIX] = imx_clk_hw_gate2("lcdif_pix", "lcdif_podf", base + 0x74, 10); in imx6sll_clocks_init()
300 hws[IMX6SLL_CLK_GPIO4] = imx_clk_hw_gate2("gpio4", "ipg", base + 0x74, 12); in imx6sll_clocks_init()
301 hws[IMX6SLL_CLK_WDOG1] = imx_clk_hw_gate2("wdog1", "ipg", base + 0x74, 16); in imx6sll_clocks_init()
302 hws[IMX6SLL_CLK_MMDC_P0_FAST] = imx_clk_hw_gate_flags("mmdc_p0_fast", "mmdc_podf", base + 0x74, 20, CLK_IS_CRITICAL); in imx6sll_clocks_init()
303 hws[IMX6SLL_CLK_MMDC_P0_IPG] = imx_clk_hw_gate2_flags("mmdc_p0_ipg", "ipg", base + 0x74, 24, CLK_IS_CRITICAL); in imx6sll_clocks_init()
304 hws[IMX6SLL_CLK_MMDC_P1_IPG] = imx_clk_hw_gate2_flags("mmdc_p1_ipg", "ipg", base + 0x74, 2 in imx6sll_clocks_init()
[all...]
H A Dclk-imx6ul.c413 hws[IMX6UL_CLK_CSI] = imx_clk_hw_gate2("csi", "csi_podf", base + 0x74, 0); in imx6ul_clocks_init()
414 hws[IMX6UL_CLK_UART5_IPG] = imx_clk_hw_gate2("uart5_ipg", "ipg", base + 0x74, 2); in imx6ul_clocks_init()
415 hws[IMX6UL_CLK_UART5_SERIAL] = imx_clk_hw_gate2("uart5_serial", "uart_podf", base + 0x74, 2); in imx6ul_clocks_init()
417 hws[IMX6UL_CLK_ENET] = imx_clk_hw_gate2("enet", "ipg", base + 0x74, 4); in imx6ul_clocks_init()
418 hws[IMX6UL_CLK_ENET_AHB] = imx_clk_hw_gate2("enet_ahb", "ahb", base + 0x74, 4); in imx6ul_clocks_init()
420 hws[IMX6ULL_CLK_EPDC_ACLK] = imx_clk_hw_gate2("epdc_aclk", "axi", base + 0x74, 4); in imx6ul_clocks_init()
421 hws[IMX6ULL_CLK_EPDC_PIX] = imx_clk_hw_gate2("epdc_pix", "epdc_podf", base + 0x74, 4); in imx6ul_clocks_init()
423 hws[IMX6UL_CLK_UART6_IPG] = imx_clk_hw_gate2("uart6_ipg", "ipg", base + 0x74, 6); in imx6ul_clocks_init()
424 hws[IMX6UL_CLK_UART6_SERIAL] = imx_clk_hw_gate2("uart6_serial", "uart_podf", base + 0x74, 6); in imx6ul_clocks_init()
425 hws[IMX6UL_CLK_LCDIF_PIX] = imx_clk_hw_gate2("lcdif_pix", "lcdif_podf", base + 0x74, 1 in imx6ul_clocks_init()
[all...]
H A Dclk-imx6q.c834 hws[IMX6QDL_CLK_IPU1] = imx_clk_hw_gate2("ipu1", "ipu1_podf", base + 0x74, 0); in imx6q_clocks_init()
835 hws[IMX6QDL_CLK_IPU1_DI0] = imx_clk_hw_gate2("ipu1_di0", "ipu1_di0_sel", base + 0x74, 2); in imx6q_clocks_init()
836 hws[IMX6QDL_CLK_IPU1_DI1] = imx_clk_hw_gate2("ipu1_di1", "ipu1_di1_sel", base + 0x74, 4); in imx6q_clocks_init()
837 hws[IMX6QDL_CLK_IPU2] = imx_clk_hw_gate2("ipu2", "ipu2_podf", base + 0x74, 6); in imx6q_clocks_init()
838 hws[IMX6QDL_CLK_IPU2_DI0] = imx_clk_hw_gate2("ipu2_di0", "ipu2_di0_sel", base + 0x74, 8); in imx6q_clocks_init()
840 hws[IMX6QDL_CLK_LDB_DI0] = imx_clk_hw_gate2("ldb_di0", "ldb_di0_sel", base + 0x74, 12); in imx6q_clocks_init()
841 hws[IMX6QDL_CLK_LDB_DI1] = imx_clk_hw_gate2("ldb_di1", "ldb_di1_sel", base + 0x74, 14); in imx6q_clocks_init()
843 hws[IMX6QDL_CLK_LDB_DI0] = imx_clk_hw_gate2("ldb_di0", "ldb_di0_podf", base + 0x74, 12); in imx6q_clocks_init()
844 hws[IMX6QDL_CLK_LDB_DI1] = imx_clk_hw_gate2("ldb_di1", "ldb_di1_podf", base + 0x74, 14); in imx6q_clocks_init()
846 hws[IMX6QDL_CLK_IPU2_DI1] = imx_clk_hw_gate2("ipu2_di1", "ipu2_di1_sel", base + 0x74, 1 in imx6q_clocks_init()
[all...]
H A Dclk-imx6sx.c419 hws[IMX6SX_CLK_M4] = imx_clk_hw_gate2("m4", "m4_podf", base + 0x74, 2); in imx6sx_clocks_init()
420 hws[IMX6SX_CLK_ENET] = imx_clk_hw_gate2("enet", "ipg", base + 0x74, 4); in imx6sx_clocks_init()
421 hws[IMX6SX_CLK_ENET_AHB] = imx_clk_hw_gate2("enet_ahb", "enet_sel", base + 0x74, 4); in imx6sx_clocks_init()
422 hws[IMX6SX_CLK_DISPLAY_AXI] = imx_clk_hw_gate2("display_axi", "display_podf", base + 0x74, 6); in imx6sx_clocks_init()
423 hws[IMX6SX_CLK_LCDIF2_PIX] = imx_clk_hw_gate2("lcdif2_pix", "lcdif2_sel", base + 0x74, 8); in imx6sx_clocks_init()
424 hws[IMX6SX_CLK_LCDIF1_PIX] = imx_clk_hw_gate2("lcdif1_pix", "lcdif1_sel", base + 0x74, 10); in imx6sx_clocks_init()
425 hws[IMX6SX_CLK_LDB_DI0] = imx_clk_hw_gate2("ldb_di0", "ldb_di0_div_sel", base + 0x74, 12); in imx6sx_clocks_init()
426 hws[IMX6SX_CLK_QSPI1] = imx_clk_hw_gate2("qspi1", "qspi1_podf", base + 0x74, 14); in imx6sx_clocks_init()
427 hws[IMX6SX_CLK_MLB] = imx_clk_hw_gate2("mlb", "ahb", base + 0x74, 18); in imx6sx_clocks_init()
428 hws[IMX6SX_CLK_MMDC_P0_FAST] = imx_clk_hw_gate2_flags("mmdc_p0_fast", "mmdc_podf", base + 0x74, 2 in imx6sx_clocks_init()
[all...]
/kernel/linux/linux-6.6/drivers/soc/tegra/
H A Dpmc.c3763 TEGRA_IO_PAD(TEGRA_IO_PAD_CSIA, 0, 0x74, 0x78, UINT_MAX, "csia"),
3764 TEGRA_IO_PAD(TEGRA_IO_PAD_CSIB, 1, 0x74, 0x78, UINT_MAX, "csib"),
3765 TEGRA_IO_PAD(TEGRA_IO_PAD_DSI, 2, 0x74, 0x78, UINT_MAX, "dsi"),
3766 TEGRA_IO_PAD(TEGRA_IO_PAD_MIPI_BIAS, 3, 0x74, 0x78, UINT_MAX, "mipi-bias"),
3767 TEGRA_IO_PAD(TEGRA_IO_PAD_PEX_CLK_BIAS, 4, 0x74, 0x78, UINT_MAX, "pex-clk-bias"),
3768 TEGRA_IO_PAD(TEGRA_IO_PAD_PEX_CLK3, 5, 0x74, 0x78, UINT_MAX, "pex-clk3"),
3769 TEGRA_IO_PAD(TEGRA_IO_PAD_PEX_CLK2, 6, 0x74, 0x78, UINT_MAX, "pex-clk2"),
3770 TEGRA_IO_PAD(TEGRA_IO_PAD_PEX_CLK1, 7, 0x74, 0x78, UINT_MAX, "pex-clk1"),
3771 TEGRA_IO_PAD(TEGRA_IO_PAD_USB0, 9, 0x74, 0x78, UINT_MAX, "usb0"),
3772 TEGRA_IO_PAD(TEGRA_IO_PAD_USB1, 10, 0x74,
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gt/uc/abi/
H A Dguc_errors_abi.h38 INTEL_GUC_LOAD_STATUS_INIT_MMIO_SAVE_RESTORE_INVALID = 0x74,
50 INTEL_BOOTROM_STATUS_WOPCM_FAILED = 0x74,
/kernel/linux/linux-5.10/arch/arm/include/asm/hardware/
H A Dioc.h64 #define IOC_T3CNTH (0x74)
65 #define IOC_T3LTCHH (0x74)
/kernel/linux/linux-6.6/arch/arm/include/asm/hardware/
H A Dioc.h64 #define IOC_T3CNTH (0x74)
65 #define IOC_T3LTCHH (0x74)
/kernel/linux/linux-5.10/drivers/pinctrl/
H A Dpinctrl-at91.h37 #define PIO_BSR 0x74 /* Peripheral B Select Register */
38 #define PIO_ABCDSR2 0x74 /* Peripheral ABCD Select Register 2 [some sam9 only] */
/kernel/linux/linux-6.6/drivers/pinctrl/
H A Dpinctrl-at91.h37 #define PIO_BSR 0x74 /* Peripheral B Select Register */
38 #define PIO_ABCDSR2 0x74 /* Peripheral ABCD Select Register 2 [some sam9 only] */
/kernel/linux/linux-5.10/lib/crypto/
H A Dchacha20poly1305-selftest.c31 0x49, 0x6e, 0x74, 0x65, 0x72, 0x6e, 0x65, 0x74,
32 0x2d, 0x44, 0x72, 0x61, 0x66, 0x74, 0x73, 0x20,
34 0x74, 0x20, 0x64, 0x6f, 0x63, 0x75, 0x6d, 0x65,
35 0x6e, 0x74, 0x73, 0x20, 0x76, 0x61, 0x6c, 0x69,
39 0x6f, 0x6e, 0x74, 0x68, 0x73, 0x20, 0x61, 0x6e,
41 0x20, 0x75, 0x70, 0x64, 0x61, 0x74, 0x65, 0x64,
44 0x62, 0x73, 0x6f, 0x6c, 0x65, 0x74, 0x65, 0x64,
45 0x20, 0x62, 0x79, 0x20, 0x6f, 0x74, 0x68, 0x65,
47 0x6e, 0x74,
[all...]
/kernel/linux/linux-6.6/lib/crypto/
H A Dchacha20poly1305-selftest.c31 0x49, 0x6e, 0x74, 0x65, 0x72, 0x6e, 0x65, 0x74,
32 0x2d, 0x44, 0x72, 0x61, 0x66, 0x74, 0x73, 0x20,
34 0x74, 0x20, 0x64, 0x6f, 0x63, 0x75, 0x6d, 0x65,
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/kernel/linux/linux-5.10/drivers/media/usb/gspca/
H A Dnw80x.c175 0xef, 0x0e, 0x00, 0x74, 0x01, 0x01, 0x00, 0x19,
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[all...]
/kernel/linux/linux-6.6/drivers/media/usb/gspca/
H A Dnw80x.c175 0xef, 0x0e, 0x00, 0x74, 0x01, 0x01, 0x00, 0x19,
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/kernel/linux/linux-5.10/sound/ppc/
H A Dtumbler_volume.h81 0x75, 0x74, 0x73,
102 0x76, 0x74, 0x72,
206 0x75, 0x74, 0x73,
236 0x75, 0x74, 0x73,
/kernel/linux/linux-5.10/include/sound/
H A Dac97_codec.h33 #define AC97_SIGMATEL_MULTICHN 0x74 /* Multi-Channel programming */
43 #define AC97_AD_SERIAL_CFG 0x74 /* Serial Configuration */
101 #define AC97_ALC650_MISC 0x74
118 #define AC97_WM9704_RMIXER_VOL 0x74

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