162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci *  arch/arm/include/asm/hardware/ioc.h
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci *  Copyright (C) Russell King
662306a36Sopenharmony_ci *
762306a36Sopenharmony_ci *  Use these macros to read/write the IOC.  All it does is perform the actual
862306a36Sopenharmony_ci *  read/write.
962306a36Sopenharmony_ci */
1062306a36Sopenharmony_ci#ifndef __ASMARM_HARDWARE_IOC_H
1162306a36Sopenharmony_ci#define __ASMARM_HARDWARE_IOC_H
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_ci#ifndef __ASSEMBLY__
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ci/*
1662306a36Sopenharmony_ci * We use __raw_base variants here so that we give the compiler the
1762306a36Sopenharmony_ci * chance to keep IOC_BASE in a register.
1862306a36Sopenharmony_ci */
1962306a36Sopenharmony_ci#define ioc_readb(off)		__raw_readb(IOC_BASE + (off))
2062306a36Sopenharmony_ci#define ioc_writeb(val,off)	__raw_writeb(val, IOC_BASE + (off))
2162306a36Sopenharmony_ci
2262306a36Sopenharmony_ci#endif
2362306a36Sopenharmony_ci
2462306a36Sopenharmony_ci#define IOC_CONTROL	(0x00)
2562306a36Sopenharmony_ci#define IOC_KARTTX	(0x04)
2662306a36Sopenharmony_ci#define IOC_KARTRX	(0x04)
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_ci#define IOC_IRQSTATA	(0x10)
2962306a36Sopenharmony_ci#define IOC_IRQREQA	(0x14)
3062306a36Sopenharmony_ci#define IOC_IRQCLRA	(0x14)
3162306a36Sopenharmony_ci#define IOC_IRQMASKA	(0x18)
3262306a36Sopenharmony_ci
3362306a36Sopenharmony_ci#define IOC_IRQSTATB	(0x20)
3462306a36Sopenharmony_ci#define IOC_IRQREQB	(0x24)
3562306a36Sopenharmony_ci#define IOC_IRQMASKB	(0x28)
3662306a36Sopenharmony_ci
3762306a36Sopenharmony_ci#define IOC_FIQSTAT	(0x30)
3862306a36Sopenharmony_ci#define IOC_FIQREQ	(0x34)
3962306a36Sopenharmony_ci#define IOC_FIQMASK	(0x38)
4062306a36Sopenharmony_ci
4162306a36Sopenharmony_ci#define IOC_T0CNTL	(0x40)
4262306a36Sopenharmony_ci#define IOC_T0LTCHL	(0x40)
4362306a36Sopenharmony_ci#define IOC_T0CNTH	(0x44)
4462306a36Sopenharmony_ci#define IOC_T0LTCHH	(0x44)
4562306a36Sopenharmony_ci#define IOC_T0GO	(0x48)
4662306a36Sopenharmony_ci#define IOC_T0LATCH	(0x4c)
4762306a36Sopenharmony_ci
4862306a36Sopenharmony_ci#define IOC_T1CNTL	(0x50)
4962306a36Sopenharmony_ci#define IOC_T1LTCHL	(0x50)
5062306a36Sopenharmony_ci#define IOC_T1CNTH	(0x54)
5162306a36Sopenharmony_ci#define IOC_T1LTCHH	(0x54)
5262306a36Sopenharmony_ci#define IOC_T1GO	(0x58)
5362306a36Sopenharmony_ci#define IOC_T1LATCH	(0x5c)
5462306a36Sopenharmony_ci
5562306a36Sopenharmony_ci#define IOC_T2CNTL	(0x60)
5662306a36Sopenharmony_ci#define IOC_T2LTCHL	(0x60)
5762306a36Sopenharmony_ci#define IOC_T2CNTH	(0x64)
5862306a36Sopenharmony_ci#define IOC_T2LTCHH	(0x64)
5962306a36Sopenharmony_ci#define IOC_T2GO	(0x68)
6062306a36Sopenharmony_ci#define IOC_T2LATCH	(0x6c)
6162306a36Sopenharmony_ci
6262306a36Sopenharmony_ci#define IOC_T3CNTL	(0x70)
6362306a36Sopenharmony_ci#define IOC_T3LTCHL	(0x70)
6462306a36Sopenharmony_ci#define IOC_T3CNTH	(0x74)
6562306a36Sopenharmony_ci#define IOC_T3LTCHH	(0x74)
6662306a36Sopenharmony_ci#define IOC_T3GO	(0x78)
6762306a36Sopenharmony_ci#define IOC_T3LATCH	(0x7c)
6862306a36Sopenharmony_ci
6962306a36Sopenharmony_ci#endif
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