Home
last modified time | relevance | path

Searched refs:spll (Results 1 - 25 of 71) sorted by relevance

123

/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
H A Dradeon_clocks.c42 struct radeon_pll *spll = &rdev->clock.spll; in radeon_legacy_get_engine_clock() local
48 fb_div *= spll->reference_freq; in radeon_legacy_get_engine_clock()
111 struct radeon_pll *spll = &rdev->clock.spll; in radeon_read_clocks_OF() local
150 spll->reference_freq = mpll->reference_freq = p1pll->reference_freq; in radeon_read_clocks_OF()
151 spll->reference_div = mpll->reference_div = in radeon_read_clocks_OF()
186 struct radeon_pll *spll = &rdev->clock.spll; in radeon_get_clock_info() local
214 if (spll in radeon_get_clock_info()
355 struct radeon_pll *spll = &rdev->clock.spll; calc_eng_mem_clock() local
[all...]
H A Dradeon_combios.c739 struct radeon_pll *spll = &rdev->clock.spll; in radeon_combios_get_clock_info() local
766 spll->reference_freq = RBIOS16(pll_info + 0x1a); in radeon_combios_get_clock_info()
767 spll->reference_div = RBIOS16(pll_info + 0x1c); in radeon_combios_get_clock_info()
768 spll->pll_out_min = RBIOS32(pll_info + 0x1e); in radeon_combios_get_clock_info()
769 spll->pll_out_max = RBIOS32(pll_info + 0x22); in radeon_combios_get_clock_info()
772 spll->pll_in_min = RBIOS32(pll_info + 0x48); in radeon_combios_get_clock_info()
773 spll->pll_in_max = RBIOS32(pll_info + 0x4c); in radeon_combios_get_clock_info()
776 spll->pll_in_min = 40; in radeon_combios_get_clock_info()
777 spll in radeon_combios_get_clock_info()
[all...]
H A Dradeon_atombios.c1138 struct radeon_pll *spll = &rdev->clock.spll; in radeon_atom_get_clock_info() local
1191 spll->reference_freq = in radeon_atom_get_clock_info()
1194 spll->reference_freq = in radeon_atom_get_clock_info()
1196 spll->reference_div = 0; in radeon_atom_get_clock_info()
1198 spll->pll_out_min = in radeon_atom_get_clock_info()
1200 spll->pll_out_max = in radeon_atom_get_clock_info()
1204 if (spll->pll_out_min == 0) { in radeon_atom_get_clock_info()
1206 spll->pll_out_min = 64800; in radeon_atom_get_clock_info()
1208 spll in radeon_atom_get_clock_info()
[all...]
H A Drv6xx_dpm.c163 u32 ref_clk = rdev->clock.spll.reference_freq; in rv6xx_output_stepping()
428 u32 ref_clk = rdev->clock.spll.reference_freq; in rv6xx_compute_count_for_delay()
551 u32 ref_clk = rdev->clock.spll.reference_freq; in rv6xx_program_engine_spread_spectrum()
840 u32 ref_clk = rdev->clock.spll.reference_freq; in rv6xx_program_bsp()
H A Drv740_dpm.c131 u32 reference_clock = rdev->clock.spll.reference_freq; in rv740_populate_sclk_value()
H A Drs780_dpm.c992 u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) / in rs780_dpm_debugfs_print_current_performance_level()
1014 u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) / in rs780_dpm_get_current_sclk()
/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/
H A Dradeon_clocks.c42 struct radeon_pll *spll = &rdev->clock.spll; in radeon_legacy_get_engine_clock() local
48 fb_div *= spll->reference_freq; in radeon_legacy_get_engine_clock()
111 struct radeon_pll *spll = &rdev->clock.spll; in radeon_read_clocks_OF() local
150 spll->reference_freq = mpll->reference_freq = p1pll->reference_freq; in radeon_read_clocks_OF()
151 spll->reference_div = mpll->reference_div = in radeon_read_clocks_OF()
186 struct radeon_pll *spll = &rdev->clock.spll; in radeon_get_clock_info() local
214 if (spll in radeon_get_clock_info()
355 struct radeon_pll *spll = &rdev->clock.spll; calc_eng_mem_clock() local
[all...]
H A Dradeon_combios.c735 struct radeon_pll *spll = &rdev->clock.spll; in radeon_combios_get_clock_info() local
762 spll->reference_freq = RBIOS16(pll_info + 0x1a); in radeon_combios_get_clock_info()
763 spll->reference_div = RBIOS16(pll_info + 0x1c); in radeon_combios_get_clock_info()
764 spll->pll_out_min = RBIOS32(pll_info + 0x1e); in radeon_combios_get_clock_info()
765 spll->pll_out_max = RBIOS32(pll_info + 0x22); in radeon_combios_get_clock_info()
768 spll->pll_in_min = RBIOS32(pll_info + 0x48); in radeon_combios_get_clock_info()
769 spll->pll_in_max = RBIOS32(pll_info + 0x4c); in radeon_combios_get_clock_info()
772 spll->pll_in_min = 40; in radeon_combios_get_clock_info()
773 spll in radeon_combios_get_clock_info()
[all...]
H A Dradeon_atombios.c1130 struct radeon_pll *spll = &rdev->clock.spll; in radeon_atom_get_clock_info() local
1183 spll->reference_freq = in radeon_atom_get_clock_info()
1186 spll->reference_freq = in radeon_atom_get_clock_info()
1188 spll->reference_div = 0; in radeon_atom_get_clock_info()
1190 spll->pll_out_min = in radeon_atom_get_clock_info()
1192 spll->pll_out_max = in radeon_atom_get_clock_info()
1196 if (spll->pll_out_min == 0) { in radeon_atom_get_clock_info()
1198 spll->pll_out_min = 64800; in radeon_atom_get_clock_info()
1200 spll in radeon_atom_get_clock_info()
[all...]
H A Drv6xx_dpm.c163 u32 ref_clk = rdev->clock.spll.reference_freq; in rv6xx_output_stepping()
428 u32 ref_clk = rdev->clock.spll.reference_freq; in rv6xx_compute_count_for_delay()
551 u32 ref_clk = rdev->clock.spll.reference_freq; in rv6xx_program_engine_spread_spectrum()
840 u32 ref_clk = rdev->clock.spll.reference_freq; in rv6xx_program_bsp()
H A Drv740_dpm.c130 u32 reference_clock = rdev->clock.spll.reference_freq; in rv740_populate_sclk_value()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_atomfirmware.c380 struct amdgpu_pll *spll = &adev->clock.spll; in amdgpu_atomfirmware_get_clock_info() local
418 spll->reference_freq = le32_to_cpu(smu_info->v31.core_refclk_10khz); in amdgpu_atomfirmware_get_clock_info()
420 spll->reference_div = 0; in amdgpu_atomfirmware_get_clock_info()
421 spll->min_post_div = 1; in amdgpu_atomfirmware_get_clock_info()
422 spll->max_post_div = 1; in amdgpu_atomfirmware_get_clock_info()
423 spll->min_ref_div = 2; in amdgpu_atomfirmware_get_clock_info()
424 spll->max_ref_div = 0xff; in amdgpu_atomfirmware_get_clock_info()
425 spll->min_feedback_div = 4; in amdgpu_atomfirmware_get_clock_info()
426 spll in amdgpu_atomfirmware_get_clock_info()
[all...]
H A Damdgpu_atombios.c570 struct amdgpu_pll *spll = &adev->clock.spll; in amdgpu_atombios_get_clock_info() local
616 spll->reference_freq = in amdgpu_atombios_get_clock_info()
618 spll->reference_div = 0; in amdgpu_atombios_get_clock_info()
620 spll->pll_out_min = in amdgpu_atombios_get_clock_info()
622 spll->pll_out_max = in amdgpu_atombios_get_clock_info()
626 if (spll->pll_out_min == 0) in amdgpu_atombios_get_clock_info()
627 spll->pll_out_min = 64800; in amdgpu_atombios_get_clock_info()
629 spll->pll_in_min = in amdgpu_atombios_get_clock_info()
631 spll in amdgpu_atombios_get_clock_info()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_atomfirmware.c659 struct amdgpu_pll *spll = &adev->clock.spll; in amdgpu_atomfirmware_get_clock_info() local
694 spll->reference_freq = le32_to_cpu(smu_info->v31.core_refclk_10khz); in amdgpu_atomfirmware_get_clock_info()
696 spll->reference_freq = le32_to_cpu(smu_info->v40.core_refclk_10khz); in amdgpu_atomfirmware_get_clock_info()
698 spll->reference_div = 0; in amdgpu_atomfirmware_get_clock_info()
699 spll->min_post_div = 1; in amdgpu_atomfirmware_get_clock_info()
700 spll->max_post_div = 1; in amdgpu_atomfirmware_get_clock_info()
701 spll->min_ref_div = 2; in amdgpu_atomfirmware_get_clock_info()
702 spll->max_ref_div = 0xff; in amdgpu_atomfirmware_get_clock_info()
703 spll in amdgpu_atomfirmware_get_clock_info()
[all...]
H A Damdgpu_atombios.c570 struct amdgpu_pll *spll = &adev->clock.spll; in amdgpu_atombios_get_clock_info() local
616 spll->reference_freq = in amdgpu_atombios_get_clock_info()
618 spll->reference_div = 0; in amdgpu_atombios_get_clock_info()
620 spll->pll_out_min = in amdgpu_atombios_get_clock_info()
622 spll->pll_out_max = in amdgpu_atombios_get_clock_info()
626 if (spll->pll_out_min == 0) in amdgpu_atombios_get_clock_info()
627 spll->pll_out_min = 64800; in amdgpu_atombios_get_clock_info()
629 spll->pll_in_min = in amdgpu_atombios_get_clock_info()
631 spll in amdgpu_atombios_get_clock_info()
[all...]
/kernel/linux/linux-5.10/drivers/clk/microchip/
H A Dclk-core.c628 pr_warn("spll: no match found\n"); in spll_calc_mult_div()
735 struct pic32_sys_pll *spll; in pic32_spll_clk_register() local
738 spll = devm_kzalloc(core->dev, sizeof(*spll), GFP_KERNEL); in pic32_spll_clk_register()
739 if (!spll) in pic32_spll_clk_register()
742 spll->core = core; in pic32_spll_clk_register()
743 spll->hw.init = &data->init_data; in pic32_spll_clk_register()
744 spll->ctrl_reg = data->ctrl_reg + core->iobase; in pic32_spll_clk_register()
745 spll->status_reg = data->status_reg + core->iobase; in pic32_spll_clk_register()
746 spll in pic32_spll_clk_register()
[all...]
/kernel/linux/linux-6.6/drivers/clk/microchip/
H A Dclk-core.c628 pr_warn("spll: no match found\n"); in spll_calc_mult_div()
735 struct pic32_sys_pll *spll; in pic32_spll_clk_register() local
738 spll = devm_kzalloc(core->dev, sizeof(*spll), GFP_KERNEL); in pic32_spll_clk_register()
739 if (!spll) in pic32_spll_clk_register()
742 spll->core = core; in pic32_spll_clk_register()
743 spll->hw.init = &data->init_data; in pic32_spll_clk_register()
744 spll->ctrl_reg = data->ctrl_reg + core->iobase; in pic32_spll_clk_register()
745 spll->status_reg = data->status_reg + core->iobase; in pic32_spll_clk_register()
746 spll in pic32_spll_clk_register()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dnv40.c36 u32 spll; member
175 clk->spll = 0xc0000000 | (log2P << 16) | (N1 << 8) | M1; in nv40_clk_calc()
178 clk->spll = 0x00000000; in nv40_clk_calc()
193 nvkm_mask(device, 0x004008, 0xc007ffff, clk->spll); in nv40_clk_prog()
H A Dnv50.c467 /* shader: tie to nvclk if possible, otherwise use spll. have to be in nv50_clk_calc()
474 clk_mask(hwsq, spll[0], 0xc03f0100, (P1 << 19) | (P1 << 16)); in nv50_clk_calc()
481 clk_mask(hwsq, spll[0], 0xc03f0100, in nv50_clk_calc()
483 clk_mask(hwsq, spll[1], 0x0000ffff, (N << 8) | M); in nv50_clk_calc()
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dnv40.c36 u32 spll; member
175 clk->spll = 0xc0000000 | (log2P << 16) | (N1 << 8) | M1; in nv40_clk_calc()
178 clk->spll = 0x00000000; in nv40_clk_calc()
193 nvkm_mask(device, 0x004008, 0xc007ffff, clk->spll); in nv40_clk_prog()
H A Dnv50.c468 /* shader: tie to nvclk if possible, otherwise use spll. have to be in nv50_clk_calc()
475 clk_mask(hwsq, spll[0], 0xc03f0100, (P1 << 19) | (P1 << 16)); in nv50_clk_calc()
482 clk_mask(hwsq, spll[0], 0xc03f0100, in nv50_clk_calc()
484 clk_mask(hwsq, spll[1], 0x0000ffff, (N << 8) | M); in nv50_clk_calc()
/kernel/linux/linux-5.10/drivers/clk/imx/
H A Dclk-imx31.c34 static const char *mcu_main_sel[] = { "spll", "mpll", };
36 static const char *csi_sel[] = { "upll", "spll", };
37 static const char *fir_sel[] = { "mcu_main", "upll", "spll" };
40 dummy, ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg, enumerator
70 clk[spll] = imx_clk_pllv1(IMX_PLLV1_IMX31, "spll", "ckih", base + MXC_CCM_SRPCTL); in _mx31_clocks_init()
98 clk[ssi1_gate] = imx_clk_gate2("ssi1_gate", "spll", base + MXC_CCM_CGR0, 24); in _mx31_clocks_init()
118 clk[ssi2_gate] = imx_clk_gate2("ssi2_gate", "spll", base + MXC_CCM_CGR2, 0); in _mx31_clocks_init()
/kernel/linux/linux-6.6/drivers/clk/imx/
H A Dclk-imx31.c33 static const char *mcu_main_sel[] = { "spll", "mpll", };
35 static const char *csi_sel[] = { "upll", "spll", };
36 static const char *fir_sel[] = { "mcu_main", "upll", "spll" };
39 dummy, ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg, enumerator
59 clk[spll] = imx_clk_pllv1(IMX_PLLV1_IMX31, "spll", "ckih", base + MXC_CCM_SRPCTL); in _mx31_clocks_init()
87 clk[ssi1_gate] = imx_clk_gate2("ssi1_gate", "spll", base + MXC_CCM_CGR0, 24); in _mx31_clocks_init()
107 clk[ssi2_gate] = imx_clk_gate2("ssi2_gate", "spll", base + MXC_CCM_CGR2, 0); in _mx31_clocks_init()
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/
H A Dintel_dpll_mgr.h187 u32 spll; member
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
H A Dintel_dpll_mgr.h177 u32 spll; member

Completed in 36 milliseconds

123