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Searched refs:reset_val (Results 1 - 25 of 32) sorted by relevance

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/kernel/linux/linux-5.10/drivers/power/supply/
H A Dmax17040_battery.c56 u16 reset_val; member
67 .reset_val = 0x0054,
76 .reset_val = 0x0054,
85 .reset_val = 0x0054,
94 .reset_val = 0x0054,
103 .reset_val = 0x5400,
112 .reset_val = 0x5400,
121 .reset_val = 0x5400,
130 .reset_val = 0x5400,
162 return regmap_write(chip->regmap, MAX17040_CMD, chip->data.reset_val); in max17040_reset()
[all...]
H A Dcw2015_battery.c100 u8 reset_val; in cw_update_profile() local
107 reset_val = reg_val; in cw_update_profile()
130 reset_val &= ~CW2015_MODE_RESTART; in cw_update_profile()
131 reg_val = reset_val | CW2015_MODE_RESTART; in cw_update_profile()
140 ret = regmap_write(cw_bat->regmap, CW2015_REG_MODE, reset_val); in cw_update_profile()
229 unsigned char reset_val; in cw_power_on_reset() local
231 reset_val = CW2015_MODE_SLEEP; in cw_power_on_reset()
232 ret = regmap_write(cw_bat->regmap, CW2015_REG_MODE, reset_val); in cw_power_on_reset()
239 reset_val = CW2015_MODE_NORMAL; in cw_power_on_reset()
240 ret = regmap_write(cw_bat->regmap, CW2015_REG_MODE, reset_val); in cw_power_on_reset()
[all...]
/kernel/linux/linux-6.6/drivers/power/supply/
H A Dmax17040_battery.c55 u16 reset_val; member
66 .reset_val = 0x0054,
75 .reset_val = 0x0054,
84 .reset_val = 0x0054,
93 .reset_val = 0x0054,
102 .reset_val = 0x5400,
111 .reset_val = 0x5400,
120 .reset_val = 0x5400,
129 .reset_val = 0x5400,
158 return regmap_write(chip->regmap, MAX17040_CMD, chip->data.reset_val); in max17040_reset()
[all...]
H A Dcw2015_battery.c101 u8 reset_val; in cw_update_profile() local
108 reset_val = reg_val; in cw_update_profile()
131 reset_val &= ~CW2015_MODE_RESTART; in cw_update_profile()
132 reg_val = reset_val | CW2015_MODE_RESTART; in cw_update_profile()
141 ret = regmap_write(cw_bat->regmap, CW2015_REG_MODE, reset_val); in cw_update_profile()
230 unsigned char reset_val; in cw_power_on_reset() local
232 reset_val = CW2015_MODE_SLEEP; in cw_power_on_reset()
233 ret = regmap_write(cw_bat->regmap, CW2015_REG_MODE, reset_val); in cw_power_on_reset()
240 reset_val = CW2015_MODE_NORMAL; in cw_power_on_reset()
241 ret = regmap_write(cw_bat->regmap, CW2015_REG_MODE, reset_val); in cw_power_on_reset()
[all...]
/kernel/linux/linux-6.6/arch/arm64/kvm/
H A Dsys_regs.c1932 { SYS_DESC(SYS_MDCCINT_EL1), trap_debug_regs, reset_val, MDCCINT_EL1, 0 },
1933 { SYS_DESC(SYS_MDSCR_EL1), trap_debug_regs, reset_val, MDSCR_EL1, 0 },
1951 { SYS_DESC(SYS_OSLSR_EL1), trap_oslsr_el1, reset_val, OSLSR_EL1,
1964 { SYS_DESC(SYS_DBGVCR32_EL2), NULL, reset_val, DBGVCR32_EL2, 0 },
2061 { SYS_DESC(SYS_SCTLR_EL1), access_vm_reg, reset_val, SCTLR_EL1, 0x00C50078 },
2063 { SYS_DESC(SYS_CPACR_EL1), NULL, reset_val, CPACR_EL1, 0 },
2068 { SYS_DESC(SYS_ZCR_EL1), NULL, reset_val, ZCR_EL1, 0, .visibility = sve_visibility },
2074 { SYS_DESC(SYS_TCR_EL1), access_vm_reg, reset_val, TCR_EL1, 0 },
2075 { SYS_DESC(SYS_TCR2_EL1), access_vm_reg, reset_val, TCR2_EL1, 0 },
2135 { SYS_DESC(SYS_VBAR_EL1), access_rw, reset_val, VBAR_EL
[all...]
H A Dsys_regs.h145 static inline u64 reset_val(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) in reset_val() function
/kernel/linux/linux-5.10/drivers/memory/
H A Dstm32-fmc2-ebi.c153 * @reset_val: the default value that have to be set in case the property
168 u32 reset_val; member
743 .reset_val = FMC2_BUSWIDTH_16,
790 .reset_val = FMC2_BXTR_ADDSET_MAX,
798 .reset_val = FMC2_BXTR_ADDHLD_MAX,
806 .reset_val = FMC2_BXTR_DATAST_MAX,
814 .reset_val = FMC2_BXTR_BUSTURN_MAX + 1,
827 .reset_val = FMC2_BTR_CLKDIV_MAX + 1,
841 .reset_val = FMC2_BXTR_ADDSET_MAX,
849 .reset_val
[all...]
/kernel/linux/linux-6.6/drivers/memory/
H A Dstm32-fmc2-ebi.c155 * @reset_val: the default value that have to be set in case the property
170 u32 reset_val; member
745 .reset_val = FMC2_BUSWIDTH_16,
792 .reset_val = FMC2_BXTR_ADDSET_MAX,
800 .reset_val = FMC2_BXTR_ADDHLD_MAX,
808 .reset_val = FMC2_BXTR_DATAST_MAX,
816 .reset_val = FMC2_BXTR_BUSTURN_MAX + 1,
829 .reset_val = FMC2_BTR_CLKDIV_MAX + 1,
843 .reset_val = FMC2_BXTR_ADDSET_MAX,
851 .reset_val
[all...]
/kernel/linux/linux-5.10/include/linux/qed/
H A Dqed_chain.h495 u32 reset_val = p_chain->page_cnt - 1; in qed_chain_reset() local
498 p_chain->pbl.c.u16.prod_page_idx = (u16)reset_val; in qed_chain_reset()
499 p_chain->pbl.c.u16.cons_page_idx = (u16)reset_val; in qed_chain_reset()
501 p_chain->pbl.c.u32.prod_page_idx = reset_val; in qed_chain_reset()
502 p_chain->pbl.c.u32.cons_page_idx = reset_val; in qed_chain_reset()
/kernel/linux/linux-6.6/include/linux/qed/
H A Dqed_chain.h498 u32 reset_val = p_chain->page_cnt - 1; in qed_chain_reset() local
501 p_chain->pbl.c.u16.prod_page_idx = (u16)reset_val; in qed_chain_reset()
502 p_chain->pbl.c.u16.cons_page_idx = (u16)reset_val; in qed_chain_reset()
504 p_chain->pbl.c.u32.prod_page_idx = reset_val; in qed_chain_reset()
505 p_chain->pbl.c.u32.cons_page_idx = reset_val; in qed_chain_reset()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn314/
H A Ddcn314_dio_stream_encoder.c55 uint32_t reset_val = reset ? 1 : 0; in enc314_reset_fifo() local
58 REG_UPDATE(DIG_FIFO_CTRL0, DIG_FIFO_RESET, reset_val); in enc314_reset_fifo()
62 REG_WAIT(DIG_FIFO_CTRL0, DIG_FIFO_RESET_DONE, reset_val, 10, 5000); in enc314_reset_fifo()
/kernel/linux/linux-5.10/arch/arm64/kvm/
H A Dsys_regs.c1430 { SYS_DESC(SYS_MDCCINT_EL1), trap_debug_regs, reset_val, MDCCINT_EL1, 0 },
1431 { SYS_DESC(SYS_MDSCR_EL1), trap_debug_regs, reset_val, MDSCR_EL1, 0 },
1461 { SYS_DESC(SYS_DBGVCR32_EL2), NULL, reset_val, DBGVCR32_EL2, 0 },
1543 { SYS_DESC(SYS_SCTLR_EL1), access_vm_reg, reset_val, SCTLR_EL1, 0x00C50078 },
1545 { SYS_DESC(SYS_CPACR_EL1), NULL, reset_val, CPACR_EL1, 0 },
1550 { SYS_DESC(SYS_ZCR_EL1), NULL, reset_val, ZCR_EL1, 0, .visibility = sve_visibility },
1553 { SYS_DESC(SYS_TCR_EL1), access_vm_reg, reset_val, TCR_EL1, 0 },
1592 { SYS_DESC(SYS_VBAR_EL1), NULL, reset_val, VBAR_EL1, 0 },
1593 { SYS_DESC(SYS_DISR_EL1), NULL, reset_val, DISR_EL1, 0 },
1608 { SYS_DESC(SYS_CONTEXTIDR_EL1), access_vm_reg, reset_val, CONTEXTIDR_EL
[all...]
H A Dsys_regs.h107 static inline void reset_val(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) in reset_val() function
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_dio_stream_encoder.c431 uint32_t reset_val = reset ? 1 : 0; in enc32_reset_fifo() local
434 REG_UPDATE(DIG_FIFO_CTRL0, DIG_FIFO_RESET, reset_val); in enc32_reset_fifo()
438 REG_WAIT(DIG_FIFO_CTRL0, DIG_FIFO_RESET_DONE, reset_val, 10, 5000); in enc32_reset_fifo()
/kernel/linux/linux-5.10/drivers/net/ethernet/amd/
H A Dlance.c472 int i, reset_val, lance_version; in lance_probe1() local
504 reset_val = inw(ioaddr+LANCE_RESET); /* Reset the LANCE */ in lance_probe1()
509 outw(reset_val, ioaddr+LANCE_RESET); in lance_probe1()
599 short reset_val = inw(ioaddr+LANCE_RESET); in lance_probe1() local
600 dev->dma = dma_tbl[(reset_val >> 2) & 3]; in lance_probe1()
601 dev->irq = irq_tbl[(reset_val >> 4) & 7]; in lance_probe1()
/kernel/linux/linux-6.6/drivers/net/ethernet/amd/
H A Dlance.c475 int i, reset_val, lance_version; in lance_probe1() local
508 reset_val = inw(ioaddr+LANCE_RESET); /* Reset the LANCE */ in lance_probe1()
513 outw(reset_val, ioaddr+LANCE_RESET); in lance_probe1()
604 short reset_val = inw(ioaddr+LANCE_RESET); in lance_probe1() local
605 dev->dma = dma_tbl[(reset_val >> 2) & 3]; in lance_probe1()
606 dev->irq = irq_tbl[(reset_val >> 4) & 7]; in lance_probe1()
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/adreno/
H A Da6xx_gmu.c206 u32 mask, reset_val; in a6xx_gmu_start() local
211 reset_val = 0xbabeface; in a6xx_gmu_start()
214 reset_val = 0x100; in a6xx_gmu_start()
227 (val & mask) == reset_val, 100, 10000); in a6xx_gmu_start()
/kernel/linux/linux-5.10/drivers/infiniband/hw/efa/
H A Defa_com.c1042 u32 reset_val = 0; in efa_com_dev_reset() local
1061 EFA_SET(&reset_val, EFA_REGS_DEV_CTL_DEV_RESET, 1); in efa_com_dev_reset()
1062 EFA_SET(&reset_val, EFA_REGS_DEV_CTL_RESET_REASON, reset_reason); in efa_com_dev_reset()
1063 writel(reset_val, edev->reg_bar + EFA_REGS_DEV_CTL_OFF); in efa_com_dev_reset()
/kernel/linux/linux-6.6/drivers/infiniband/hw/efa/
H A Defa_com.c1043 u32 reset_val = 0; in efa_com_dev_reset() local
1062 EFA_SET(&reset_val, EFA_REGS_DEV_CTL_DEV_RESET, 1); in efa_com_dev_reset()
1063 EFA_SET(&reset_val, EFA_REGS_DEV_CTL_RESET_REASON, reset_reason); in efa_com_dev_reset()
1064 writel(reset_val, edev->reg_bar + EFA_REGS_DEV_CTL_OFF); in efa_com_dev_reset()
/kernel/linux/linux-6.6/drivers/gpu/drm/msm/adreno/
H A Da6xx_gmu.c207 u32 mask, reset_val; in a6xx_gmu_start() local
212 reset_val = 0xbabeface; in a6xx_gmu_start()
215 reset_val = 0x100; in a6xx_gmu_start()
228 (val & mask) == reset_val, 100, 10000); in a6xx_gmu_start()
/kernel/linux/linux-5.10/drivers/scsi/hisi_sas/
H A Dhisi_sas_v2_hw.c1018 int i, reset_val; in reset_hw_v2_hw() local
1025 reset_val = 0x1fffff; in reset_hw_v2_hw()
1027 reset_val = 0x7ffff; in reset_hw_v2_hw()
1087 reset_val); in reset_hw_v2_hw()
1089 reset_val); in reset_hw_v2_hw()
1092 if (reset_val != (val & reset_val)) { in reset_hw_v2_hw()
1099 reset_val); in reset_hw_v2_hw()
1101 reset_val); in reset_hw_v2_hw()
1105 if (val & reset_val) { in reset_hw_v2_hw()
[all...]
/kernel/linux/linux-6.6/drivers/scsi/hisi_sas/
H A Dhisi_sas_v2_hw.c1018 int i, reset_val; in reset_hw_v2_hw() local
1025 reset_val = 0x1fffff; in reset_hw_v2_hw()
1027 reset_val = 0x7ffff; in reset_hw_v2_hw()
1087 reset_val); in reset_hw_v2_hw()
1089 reset_val); in reset_hw_v2_hw()
1092 if (reset_val != (val & reset_val)) { in reset_hw_v2_hw()
1099 reset_val); in reset_hw_v2_hw()
1101 reset_val); in reset_hw_v2_hw()
1105 if (val & reset_val) { in reset_hw_v2_hw()
[all...]
/kernel/linux/linux-5.10/drivers/net/ethernet/amazon/ena/
H A Dena_com.c2077 u32 stat, timeout, cap, reset_val; in ena_com_dev_reset() local
2102 reset_val = ENA_REGS_DEV_CTL_DEV_RESET_MASK; in ena_com_dev_reset()
2103 reset_val |= (reset_reason << ENA_REGS_DEV_CTL_RESET_REASON_SHIFT) & in ena_com_dev_reset()
2105 writel(reset_val, ena_dev->reg_bar + ENA_REGS_DEV_CTL_OFF); in ena_com_dev_reset()
/kernel/linux/linux-6.6/drivers/net/ethernet/amazon/ena/
H A Dena_com.c2134 u32 stat, timeout, cap, reset_val; in ena_com_dev_reset() local
2160 reset_val = ENA_REGS_DEV_CTL_DEV_RESET_MASK; in ena_com_dev_reset()
2161 reset_val |= (reset_reason << ENA_REGS_DEV_CTL_RESET_REASON_SHIFT) & in ena_com_dev_reset()
2163 writel(reset_val, ena_dev->reg_bar + ENA_REGS_DEV_CTL_OFF); in ena_com_dev_reset()
/kernel/linux/linux-5.10/drivers/gpu/drm/exynos/
H A Dexynos_drm_dsi.c533 u32 reset_val = dsi->driver_data->reg_values[RESET_TYPE]; in exynos_dsi_reset() local
536 exynos_dsi_write(dsi, DSIM_SWRST_REG, reset_val); in exynos_dsi_reset()

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