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Searched refs:regp (Results 1 - 25 of 42) sorted by relevance

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/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/dispnv04/
H A Dhw.c396 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; in nv_save_state_ramdac() local
400 regp->nv10_cursync = NVReadRAMDAC(dev, head, NV_RAMDAC_NV10_CURSYNC); in nv_save_state_ramdac()
402 nouveau_hw_get_pllvals(dev, head ? PLL_VPLL1 : PLL_VPLL0, &regp->pllvals); in nv_save_state_ramdac()
407 regp->dither = NVReadRAMDAC(dev, head, NV_RAMDAC_DITHER_NV11); in nv_save_state_ramdac()
409 regp->ramdac_gen_ctrl = NVReadRAMDAC(dev, head, NV_PRAMDAC_GENERAL_CONTROL); in nv_save_state_ramdac()
412 regp->ramdac_630 = NVReadRAMDAC(dev, head, NV_PRAMDAC_630); in nv_save_state_ramdac()
414 regp->ramdac_634 = NVReadRAMDAC(dev, head, NV_PRAMDAC_634); in nv_save_state_ramdac()
416 regp->tv_setup = NVReadRAMDAC(dev, head, NV_PRAMDAC_TV_SETUP); in nv_save_state_ramdac()
417 regp->tv_vtotal = NVReadRAMDAC(dev, head, NV_PRAMDAC_TV_VTOTAL); in nv_save_state_ramdac()
418 regp in nv_save_state_ramdac()
472 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; nv_load_state_ramdac() local
542 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; nv_save_state_vga() local
566 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; nv_load_state_vga() local
593 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; nv_save_state_ext() local
669 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; nv_load_state_ext() local
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H A Dcrtc.c67 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv_crtc_set_digital_vibrance() local
69 regp->CRTC[NV_CIO_CRE_CSB] = nv_crtc->saturation = level; in nv_crtc_set_digital_vibrance()
71 regp->CRTC[NV_CIO_CRE_CSB] = 0x80; in nv_crtc_set_digital_vibrance()
72 regp->CRTC[NV_CIO_CRE_5B] = nv_crtc->saturation << 2; in nv_crtc_set_digital_vibrance()
73 crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_5B); in nv_crtc_set_digital_vibrance()
75 crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_CSB); in nv_crtc_set_digital_vibrance()
82 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv_crtc_set_image_sharpening() local
87 regp->ramdac_634 = level; in nv_crtc_set_image_sharpening()
88 NVWriteRAMDAC(crtc->dev, nv_crtc->index, NV_PRAMDAC_634, regp->ramdac_634); in nv_crtc_set_image_sharpening()
125 struct nv04_crtc_reg *regp in nv_crtc_calc_state_ext() local
241 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; nv_crtc_mode_set_vga() local
466 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; nv_crtc_mode_set_regs() local
831 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; nv04_crtc_do_mode_set_base() local
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H A Ddfp.c288 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv04_dfp_mode_set() local
301 regp->fp_horiz_regs[FP_DISPLAY_END] = output_mode->hdisplay - 1; in nv04_dfp_mode_set()
302 regp->fp_horiz_regs[FP_TOTAL] = output_mode->htotal - 1; in nv04_dfp_mode_set()
306 regp->fp_horiz_regs[FP_CRTC] = output_mode->hdisplay; in nv04_dfp_mode_set()
308 regp->fp_horiz_regs[FP_CRTC] = output_mode->hsync_start - drm->vbios.digital_min_front_porch - 1; in nv04_dfp_mode_set()
309 regp->fp_horiz_regs[FP_SYNC_START] = output_mode->hsync_start - 1; in nv04_dfp_mode_set()
310 regp->fp_horiz_regs[FP_SYNC_END] = output_mode->hsync_end - 1; in nv04_dfp_mode_set()
311 regp->fp_horiz_regs[FP_VALID_START] = output_mode->hskew; in nv04_dfp_mode_set()
312 regp->fp_horiz_regs[FP_VALID_END] = output_mode->hdisplay - 1; in nv04_dfp_mode_set()
314 regp in nv04_dfp_mode_set()
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H A Dcursor.c42 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv04_cursor_set_offset() local
45 regp->CRTC[NV_CIO_CRE_HCUR_ADDR0_INDEX] = in nv04_cursor_set_offset()
48 regp->CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX] = in nv04_cursor_set_offset()
51 regp->CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX] |= in nv04_cursor_set_offset()
53 regp->CRTC[NV_CIO_CRE_HCUR_ADDR2_INDEX] = offset >> 24; in nv04_cursor_set_offset()
55 crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR0_INDEX); in nv04_cursor_set_offset()
56 crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR1_INDEX); in nv04_cursor_set_offset()
57 crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR2_INDEX); in nv04_cursor_set_offset()
H A Dtvnv04.c146 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv04_tv_mode_set() local
148 regp->tv_htotal = adjusted_mode->htotal; in nv04_tv_mode_set()
149 regp->tv_vtotal = adjusted_mode->vtotal; in nv04_tv_mode_set()
155 regp->tv_hskew = 1; in nv04_tv_mode_set()
156 regp->tv_hsync_delay = 1; in nv04_tv_mode_set()
157 regp->tv_hsync_delay2 = 64; in nv04_tv_mode_set()
158 regp->tv_vskew = 1; in nv04_tv_mode_set()
159 regp->tv_vsync_delay = 1; in nv04_tv_mode_set()
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/dispnv04/
H A Dhw.c398 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; in nv_save_state_ramdac() local
402 regp->nv10_cursync = NVReadRAMDAC(dev, head, NV_RAMDAC_NV10_CURSYNC); in nv_save_state_ramdac()
404 nouveau_hw_get_pllvals(dev, head ? PLL_VPLL1 : PLL_VPLL0, &regp->pllvals); in nv_save_state_ramdac()
409 regp->dither = NVReadRAMDAC(dev, head, NV_RAMDAC_DITHER_NV11); in nv_save_state_ramdac()
411 regp->ramdac_gen_ctrl = NVReadRAMDAC(dev, head, NV_PRAMDAC_GENERAL_CONTROL); in nv_save_state_ramdac()
414 regp->ramdac_630 = NVReadRAMDAC(dev, head, NV_PRAMDAC_630); in nv_save_state_ramdac()
416 regp->ramdac_634 = NVReadRAMDAC(dev, head, NV_PRAMDAC_634); in nv_save_state_ramdac()
418 regp->tv_setup = NVReadRAMDAC(dev, head, NV_PRAMDAC_TV_SETUP); in nv_save_state_ramdac()
419 regp->tv_vtotal = NVReadRAMDAC(dev, head, NV_PRAMDAC_TV_VTOTAL); in nv_save_state_ramdac()
420 regp in nv_save_state_ramdac()
474 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; nv_load_state_ramdac() local
544 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; nv_save_state_vga() local
568 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; nv_load_state_vga() local
595 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; nv_save_state_ext() local
671 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; nv_load_state_ext() local
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H A Dcrtc.c67 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv_crtc_set_digital_vibrance() local
69 regp->CRTC[NV_CIO_CRE_CSB] = nv_crtc->saturation = level; in nv_crtc_set_digital_vibrance()
71 regp->CRTC[NV_CIO_CRE_CSB] = 0x80; in nv_crtc_set_digital_vibrance()
72 regp->CRTC[NV_CIO_CRE_5B] = nv_crtc->saturation << 2; in nv_crtc_set_digital_vibrance()
73 crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_5B); in nv_crtc_set_digital_vibrance()
75 crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_CSB); in nv_crtc_set_digital_vibrance()
82 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv_crtc_set_image_sharpening() local
87 regp->ramdac_634 = level; in nv_crtc_set_image_sharpening()
88 NVWriteRAMDAC(crtc->dev, nv_crtc->index, NV_PRAMDAC_634, regp->ramdac_634); in nv_crtc_set_image_sharpening()
125 struct nv04_crtc_reg *regp in nv_crtc_calc_state_ext() local
241 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; nv_crtc_mode_set_vga() local
466 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; nv_crtc_mode_set_regs() local
832 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; nv04_crtc_do_mode_set_base() local
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H A Ddfp.c288 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv04_dfp_mode_set() local
301 regp->fp_horiz_regs[FP_DISPLAY_END] = output_mode->hdisplay - 1; in nv04_dfp_mode_set()
302 regp->fp_horiz_regs[FP_TOTAL] = output_mode->htotal - 1; in nv04_dfp_mode_set()
306 regp->fp_horiz_regs[FP_CRTC] = output_mode->hdisplay; in nv04_dfp_mode_set()
308 regp->fp_horiz_regs[FP_CRTC] = output_mode->hsync_start - drm->vbios.digital_min_front_porch - 1; in nv04_dfp_mode_set()
309 regp->fp_horiz_regs[FP_SYNC_START] = output_mode->hsync_start - 1; in nv04_dfp_mode_set()
310 regp->fp_horiz_regs[FP_SYNC_END] = output_mode->hsync_end - 1; in nv04_dfp_mode_set()
311 regp->fp_horiz_regs[FP_VALID_START] = output_mode->hskew; in nv04_dfp_mode_set()
312 regp->fp_horiz_regs[FP_VALID_END] = output_mode->hdisplay - 1; in nv04_dfp_mode_set()
314 regp in nv04_dfp_mode_set()
[all...]
H A Dcursor.c42 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv04_cursor_set_offset() local
45 regp->CRTC[NV_CIO_CRE_HCUR_ADDR0_INDEX] = in nv04_cursor_set_offset()
48 regp->CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX] = in nv04_cursor_set_offset()
51 regp->CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX] |= in nv04_cursor_set_offset()
53 regp->CRTC[NV_CIO_CRE_HCUR_ADDR2_INDEX] = offset >> 24; in nv04_cursor_set_offset()
55 crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR0_INDEX); in nv04_cursor_set_offset()
56 crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR1_INDEX); in nv04_cursor_set_offset()
57 crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR2_INDEX); in nv04_cursor_set_offset()
H A Dtvnv04.c146 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv04_tv_mode_set() local
148 regp->tv_htotal = adjusted_mode->htotal; in nv04_tv_mode_set()
149 regp->tv_vtotal = adjusted_mode->vtotal; in nv04_tv_mode_set()
155 regp->tv_hskew = 1; in nv04_tv_mode_set()
156 regp->tv_hsync_delay = 1; in nv04_tv_mode_set()
157 regp->tv_hsync_delay2 = 64; in nv04_tv_mode_set()
158 regp->tv_vskew = 1; in nv04_tv_mode_set()
159 regp->tv_vsync_delay = 1; in nv04_tv_mode_set()
/kernel/linux/linux-5.10/arch/m68k/mm/
H A Dhwtest.c29 int hwreg_present(volatile void *regp) in hwreg_present() argument
50 : "a" (regp), "a" (tmp_vectors) in hwreg_present()
62 int hwreg_write(volatile void *regp, unsigned short val) in hwreg_write() argument
87 : "a" (regp), "a" (tmp_vectors), "g" (val) in hwreg_write()
/kernel/linux/linux-6.6/arch/m68k/mm/
H A Dhwtest.c29 int hwreg_present(volatile void *regp) in hwreg_present() argument
50 : "a" (regp), "a" (tmp_vectors) in hwreg_present()
62 int hwreg_write(volatile void *regp, unsigned short val) in hwreg_write() argument
87 : "a" (regp), "a" (tmp_vectors), "g" (val) in hwreg_write()
/kernel/linux/linux-5.10/arch/sparc/prom/
H A Dranges.c20 static void prom_adjust_regs(struct linux_prom_registers *regp, int nregs, in prom_adjust_regs() argument
27 if (regp[regc].which_io == rangep[rngc].ot_child_space) in prom_adjust_regs()
31 regp[regc].which_io = rangep[rngc].ot_parent_space; in prom_adjust_regs()
32 regp[regc].phys_addr -= rangep[rngc].ot_child_base; in prom_adjust_regs()
33 regp[regc].phys_addr += rangep[rngc].ot_parent_base; in prom_adjust_regs()
/kernel/linux/linux-6.6/arch/sparc/prom/
H A Dranges.c20 static void prom_adjust_regs(struct linux_prom_registers *regp, int nregs, in prom_adjust_regs() argument
27 if (regp[regc].which_io == rangep[rngc].ot_child_space) in prom_adjust_regs()
31 regp[regc].which_io = rangep[rngc].ot_parent_space; in prom_adjust_regs()
32 regp[regc].phys_addr -= rangep[rngc].ot_child_base; in prom_adjust_regs()
33 regp[regc].phys_addr += rangep[rngc].ot_parent_base; in prom_adjust_regs()
/kernel/linux/linux-5.10/arch/m68k/include/asm/
H A Dhwtest.h13 extern int hwreg_present(volatile void *regp);
14 extern int hwreg_write(volatile void *regp, unsigned short val);
/kernel/linux/linux-6.6/arch/m68k/include/asm/
H A Dhwtest.h13 extern int hwreg_present(volatile void *regp);
14 extern int hwreg_write(volatile void *regp, unsigned short val);
/kernel/linux/linux-5.10/arch/sh/kernel/
H A Ddwarf.c406 struct dwarf_reg *regp; in dwarf_cfa_execute_insns() local
429 regp = dwarf_frame_alloc_reg(frame, reg); in dwarf_cfa_execute_insns()
430 regp->addr = offset; in dwarf_cfa_execute_insns()
431 regp->flags |= DWARF_REG_OFFSET; in dwarf_cfa_execute_insns()
475 regp = dwarf_frame_alloc_reg(frame, reg); in dwarf_cfa_execute_insns()
476 regp->flags |= DWARF_UNDEFINED; in dwarf_cfa_execute_insns()
515 regp = dwarf_frame_alloc_reg(frame, reg); in dwarf_cfa_execute_insns()
516 regp->flags |= DWARF_REG_OFFSET; in dwarf_cfa_execute_insns()
517 regp->addr = offset; in dwarf_cfa_execute_insns()
524 regp in dwarf_cfa_execute_insns()
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/kernel/linux/linux-6.6/arch/sh/kernel/
H A Ddwarf.c406 struct dwarf_reg *regp; in dwarf_cfa_execute_insns() local
429 regp = dwarf_frame_alloc_reg(frame, reg); in dwarf_cfa_execute_insns()
430 regp->addr = offset; in dwarf_cfa_execute_insns()
431 regp->flags |= DWARF_REG_OFFSET; in dwarf_cfa_execute_insns()
475 regp = dwarf_frame_alloc_reg(frame, reg); in dwarf_cfa_execute_insns()
476 regp->flags |= DWARF_UNDEFINED; in dwarf_cfa_execute_insns()
515 regp = dwarf_frame_alloc_reg(frame, reg); in dwarf_cfa_execute_insns()
516 regp->flags |= DWARF_REG_OFFSET; in dwarf_cfa_execute_insns()
517 regp->addr = offset; in dwarf_cfa_execute_insns()
524 regp in dwarf_cfa_execute_insns()
[all...]
/kernel/linux/linux-5.10/drivers/video/fbdev/
H A Dcg3.c336 u8 __iomem *regp = &((u8 __iomem *)par->regs)[p[0]]; in cg3_do_default_mode() local
337 sbus_writeb(p[1], regp); in cg3_do_default_mode()
340 u8 __iomem *regp; in cg3_do_default_mode() local
342 regp = (u8 __iomem *)&par->regs->cmap.addr; in cg3_do_default_mode()
343 sbus_writeb(p[0], regp); in cg3_do_default_mode()
344 regp = (u8 __iomem *)&par->regs->cmap.control; in cg3_do_default_mode()
345 sbus_writeb(p[1], regp); in cg3_do_default_mode()
/kernel/linux/linux-6.6/drivers/video/fbdev/
H A Dcg3.c337 u8 __iomem *regp = &((u8 __iomem *)par->regs)[p[0]]; in cg3_do_default_mode() local
338 sbus_writeb(p[1], regp); in cg3_do_default_mode()
341 u8 __iomem *regp; in cg3_do_default_mode() local
343 regp = (u8 __iomem *)&par->regs->cmap.addr; in cg3_do_default_mode()
344 sbus_writeb(p[0], regp); in cg3_do_default_mode()
345 regp = (u8 __iomem *)&par->regs->cmap.control; in cg3_do_default_mode()
346 sbus_writeb(p[1], regp); in cg3_do_default_mode()
/kernel/linux/linux-6.6/drivers/i3c/master/
H A Dast2600-i3c-master.c53 static int ast2600_i3c_pullup_to_reg(unsigned int ohms, u32 *regp) in ast2600_i3c_pullup_to_reg() argument
71 if (regp) in ast2600_i3c_pullup_to_reg()
72 *regp = reg; in ast2600_i3c_pullup_to_reg()
/kernel/linux/linux-6.6/arch/arm64/kernel/
H A Dcpu_errata.c128 struct arm64_ftr_reg *regp; in cpu_clear_bf16_from_user_emulation() local
130 regp = get_arm64_ftr_reg(SYS_ID_AA64ISAR1_EL1); in cpu_clear_bf16_from_user_emulation()
131 if (!regp) in cpu_clear_bf16_from_user_emulation()
135 if (regp->user_mask & ID_AA64ISAR1_EL1_BF16_MASK) in cpu_clear_bf16_from_user_emulation()
136 regp->user_mask &= ~ID_AA64ISAR1_EL1_BF16_MASK; in cpu_clear_bf16_from_user_emulation()
H A Dcpufeature.c753 static int search_cmp_ftr_reg(const void *id, const void *regp) in search_cmp_ftr_reg() argument
755 return (int)(unsigned long)id - (int)((const struct __ftr_reg_entry *)regp)->sys_id; in search_cmp_ftr_reg()
1096 struct arm64_ftr_reg *regp = get_arm64_ftr_reg(sys_id); in check_update_ftr_reg() local
1098 if (!regp) in check_update_ftr_reg()
1101 update_cpu_ftr_reg(regp, val); in check_update_ftr_reg()
1102 if ((boot & regp->strict_mask) == (val & regp->strict_mask)) in check_update_ftr_reg()
1105 regp->name, boot, cpu, val); in check_update_ftr_reg()
1112 struct arm64_ftr_reg *regp = get_arm64_ftr_reg(sys_id); in relax_cpu_ftr_reg() local
1114 if (!regp) in relax_cpu_ftr_reg()
1357 struct arm64_ftr_reg *regp = get_arm64_ftr_reg(id); read_sanitised_ftr_reg() local
1374 struct arm64_ftr_reg *regp; __read_sysreg_by_encoding() local
1464 struct arm64_ftr_reg *regp; has_user_cpuid_feature() local
3469 struct arm64_ftr_reg *regp; emulate_sys_reg() local
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/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Dnv04.h12 unsigned regp; member
/kernel/linux/linux-5.10/arch/arm64/kernel/
H A Dcpufeature.c630 static int search_cmp_ftr_reg(const void *id, const void *regp) in search_cmp_ftr_reg() argument
632 return (int)(unsigned long)id - (int)((const struct __ftr_reg_entry *)regp)->sys_id; in search_cmp_ftr_reg()
916 struct arm64_ftr_reg *regp = get_arm64_ftr_reg(sys_id); in check_update_ftr_reg() local
918 if (!regp) in check_update_ftr_reg()
921 update_cpu_ftr_reg(regp, val); in check_update_ftr_reg()
922 if ((boot & regp->strict_mask) == (val & regp->strict_mask)) in check_update_ftr_reg()
925 regp->name, boot, cpu, val); in check_update_ftr_reg()
932 struct arm64_ftr_reg *regp = get_arm64_ftr_reg(sys_id); in relax_cpu_ftr_reg() local
934 if (!regp) in relax_cpu_ftr_reg()
1127 struct arm64_ftr_reg *regp = get_arm64_ftr_reg(id); read_sanitised_ftr_reg() local
2822 struct arm64_ftr_reg *regp; emulate_sys_reg() local
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