| /kernel/linux/linux-6.6/drivers/clk/mediatek/ |
| H A D | clk-mt7986-topckgen.c | 86 static const char *const pwm_parents[] __initconst = {
186 MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, 0x010,
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| H A D | clk-mt2712.c | 154 static const char * const pwm_parents[] = { variable
650 MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, 0x050, 0, 2, 7),
744 MUX_GATE(CLK_TOP_PWM_INFRA_SEL, "pwm_infra_sel", pwm_parents, 0x560, 8, 2, 15),
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| H A D | clk-mt6795-topckgen.c | 273 static const char * const pwm_parents[] = { variable
460 TOP_MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, 0x50, 0, 2, 7, 0),
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| H A D | clk-mt7622.c | 67 static const char * const pwm_parents[] = { variable
396 MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,
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| H A D | clk-mt7981-topckgen.c | 140 static const char * const pwm_parents[] __initconst = {
303 MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,
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| H A D | clk-mt8173-topckgen.c | 66 static const char * const pwm_parents[] = { variable
539 MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, 0x0050, 0, 2, 7),
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| H A D | clk-mt6797.c | 117 static const char * const pwm_parents[] = { variable
333 MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
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| H A D | clk-mt7629.c | 97 static const char * const pwm_parents[] = { variable
471 MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,
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| H A D | clk-mt8516.c | 310 static const char * const pwm_parents[] __initconst = {
421 MUX(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,
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| H A D | clk-mt8186-topckgen.c | 243 static const char * const pwm_parents[] = { variable
581 pwm_parents, 0x00b0, 0x00b4, 0x00b8, 0, 2, 7, 0x0004, 28),
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| H A D | clk-mt8167.c | 469 static const char * const pwm_parents[] = { variable
610 MUX(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,
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| H A D | clk-mt6765.c | 325 static const char * const pwm_parents[] = { variable
451 MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, CLK_CFG_6,
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| H A D | clk-mt2701.c | 175 static const char * const pwm_parents[] = { variable
496 MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,
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| H A D | clk-mt8365.c | 278 static const char * const pwm_parents[] = { variable
490 MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, 0x0b0,
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| H A D | clk-mt8188-topckgen.c | 647 static const char * const pwm_parents[] = { variable
1083 pwm_parents, 0x0BC, 0x0C0, 0x0C4, 8, 4, 15, 0x08, 21),
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| /kernel/linux/linux-5.10/drivers/clk/mediatek/ |
| H A D | clk-mt8516.c | 308 static const char * const pwm_parents[] __initconst = {
419 MUX(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,
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| H A D | clk-mt6797.c | 118 static const char * const pwm_parents[] = { variable
334 MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
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| H A D | clk-mt7622.c | 145 static const char * const pwm_parents[] = { variable
525 MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,
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| H A D | clk-mt7629.c | 122 static const char * const pwm_parents[] = { variable
496 MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,
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| H A D | clk-mt2712.c | 248 static const char * const pwm_parents[] = { variable
746 pwm_parents, 0x050, 0, 2, 7),
883 pwm_parents, 0x560, 8, 2, 15),
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| H A D | clk-mt2701.c | 176 static const char * const pwm_parents[] = { variable
497 MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,
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| H A D | clk-mt8167.c | 468 static const char * const pwm_parents[] __initconst = {
609 MUX(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,
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| H A D | clk-mt8173.c | 164 static const char * const pwm_parents[] __initconst = {
547 MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, 0x0050, 0, 2, 7),
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| H A D | clk-mt6779.c | 608 static const char * const pwm_parents[] = { variable
772 MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM, "pwm_sel", pwm_parents,
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| H A D | clk-mt6765.c | 324 static const char * const pwm_parents[] = { variable
448 MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, CLK_CFG_6,
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