Home
last modified time | relevance | path

Searched refs:edac_dbg (Results 1 - 25 of 79) sorted by relevance

1234

/kernel/linux/linux-5.10/drivers/edac/
H A Di5400_edac.c551 edac_dbg(0, "\t\t%s DIMM= %d Channels= %d,%d (Branch= %d DRAM Bank= %d Buffer ID = %d rdwr= %s ras= %d cas= %d)\n", in i5400_proccess_non_recoverable_info()
603 edac_dbg(0, "\tCorrected bits= 0x%lx\n", allErrors); in i5400_process_nonfatal_error_info()
624 edac_dbg(0, "\t\tDIMM= %d Channel= %d (Branch %d DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n", in i5400_process_nonfatal_error_info()
689 edac_dbg(4, "MC%d\n", mci->mc_idx); in i5400_check_error()
775 edac_dbg(1, "System Address, processor bus- PCI Bus ID: %s %x:%x\n", in i5400_get_devices()
778 edac_dbg(1, "Branchmap, control and errors - PCI Bus ID: %s %x:%x\n", in i5400_get_devices()
782 edac_dbg(1, "FSB Error Regs - PCI Bus ID: %s %x:%x\n", in i5400_get_devices()
872 edac_dbg(0, "ERROR: trying to access an invalid dimm: %d\n", in determine_mtr()
893 edac_dbg(2, "\tMTR%d=0x%x: DIMMs are %sPresent\n", in decode_mtr()
898 edac_dbg( in decode_mtr()
[all...]
H A Dedac_mc.c86 edac_dbg(4, " channel->chan_idx = %d\n", chan->chan_idx); in edac_mc_dump_channel()
87 edac_dbg(4, " channel = %p\n", chan); in edac_mc_dump_channel()
88 edac_dbg(4, " channel->csrow = %p\n", chan->csrow); in edac_mc_dump_channel()
89 edac_dbg(4, " channel->dimm = %p\n", chan->dimm); in edac_mc_dump_channel()
101 edac_dbg(4, "%s%i: %smapped as virtual row %d, chan %d\n", in edac_mc_dump_dimm()
104 edac_dbg(4, " dimm = %p\n", dimm); in edac_mc_dump_dimm()
105 edac_dbg(4, " dimm->label = '%s'\n", dimm->label); in edac_mc_dump_dimm()
106 edac_dbg(4, " dimm->nr_pages = 0x%x\n", dimm->nr_pages); in edac_mc_dump_dimm()
107 edac_dbg(4, " dimm->grain = %d\n", dimm->grain); in edac_mc_dump_dimm()
108 edac_dbg( in edac_mc_dump_dimm()
[all...]
H A Di7300_edac.c597 edac_dbg(2, "\tMTR%d CH%d: DIMMs are %sPresent (mtr)\n", in decode_mtr()
620 edac_dbg(2, "\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr)); in decode_mtr()
622 edac_dbg(2, "\t\tELECTRICAL THROTTLING is %s\n", in decode_mtr()
625 edac_dbg(2, "\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr)); in decode_mtr()
626 edac_dbg(2, "\t\tNUMRANK: %s\n", in decode_mtr()
628 edac_dbg(2, "\t\tNUMROW: %s\n", in decode_mtr()
633 edac_dbg(2, "\t\tNUMCOL: %s\n", in decode_mtr()
638 edac_dbg(2, "\t\tSIZE: %d MB\n", dinfo->megabytes); in decode_mtr()
654 edac_dbg(2, "\t\tECC code is 8-byte-over-32-byte SECDED+ code\n"); in decode_mtr()
656 edac_dbg( in decode_mtr()
[all...]
H A Dedac_device_sysfs.c205 edac_dbg(4, "control index=%d\n", edac_dev->dev_idx); in edac_device_ctrl_master_release()
236 edac_dbg(1, "\n"); in edac_device_register_sysfs_main_kobj()
262 edac_dbg(1, "Failed to register '.../edac/%s'\n", in edac_device_register_sysfs_main_kobj()
272 edac_dbg(4, "Registered '.../edac/%s' kobject\n", edac_dev->name); in edac_device_register_sysfs_main_kobj()
291 edac_dbg(0, "\n"); in edac_device_unregister_sysfs_main_kobj()
292 edac_dbg(4, "name of kobject is: %s\n", kobject_name(&dev->kobj)); in edac_device_unregister_sysfs_main_kobj()
329 edac_dbg(1, "\n"); in edac_device_ctrl_instance_release()
435 edac_dbg(1, "\n"); in edac_device_ctrl_block_release()
517 edac_dbg(4, "Instance '%s' inst_p=%p block '%s' block_p=%p\n", in edac_device_create_block()
519 edac_dbg( in edac_device_create_block()
[all...]
H A Dedac_pci_sysfs.c78 edac_dbg(0, "\n"); in edac_pci_instance_release()
161 edac_dbg(0, "\n"); in edac_pci_create_instance_kobj()
177 edac_dbg(2, "failed to register instance pci%d\n", idx); in edac_pci_create_instance_kobj()
183 edac_dbg(1, "Register instance 'pci%d' kobject\n", idx); in edac_pci_create_instance_kobj()
200 edac_dbg(0, "\n"); in edac_pci_unregister_sysfs_instance_kobj()
316 edac_dbg(0, "here to module_put(THIS_MODULE)\n"); in edac_pci_release_main_kobj()
341 edac_dbg(0, "\n"); in edac_pci_main_kobj_setup()
357 edac_dbg(1, "try_module_get() failed\n"); in edac_pci_main_kobj_setup()
364 edac_dbg(1, "Failed to allocate\n"); in edac_pci_main_kobj_setup()
374 edac_dbg( in edac_pci_main_kobj_setup()
[all...]
H A Di5000_edac.c487 edac_dbg(0, "\t\tCSROW= %d Channel= %d (DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n", in i5000_process_fatal_error_info()
566 edac_dbg(0, "\tUncorrected bits= 0x%x\n", ue_errors); in i5000_process_nonfatal_error_info()
582 edac_dbg(0, "\t\tCSROW= %d Channels= %d,%d (Branch= %d DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n", in i5000_process_nonfatal_error_info()
636 edac_dbg(0, "\tCorrected bits= 0x%x\n", ce_errors); in i5000_process_nonfatal_error_info()
654 edac_dbg(0, "\t\tCSROW= %d Channel= %d (Branch %d DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n", in i5000_process_nonfatal_error_info()
768 edac_dbg(4, "MC%d\n", mci->mc_idx); in i5000_check_error()
839 edac_dbg(1, "System Address, processor bus- PCI Bus ID: %s %x:%x\n", in i5000_get_devices()
842 edac_dbg(1, "Branchmap, control and errors - PCI Bus ID: %s %x:%x\n", in i5000_get_devices()
846 edac_dbg(1, "FSB Error Regs - PCI Bus ID: %s %x:%x\n", in i5000_get_devices()
971 edac_dbg( in decode_mtr()
[all...]
H A Die31200_edac.c217 edac_dbg(0, "In single channel mode\n"); in how_many_channels()
220 edac_dbg(0, "In dual channel mode\n"); in how_many_channels()
226 edac_dbg(0, "2 DIMMS per channel disabled\n"); in how_many_channels()
228 edac_dbg(0, "2 DIMMS per channel enabled\n"); in how_many_channels()
336 edac_dbg(1, "MC%d\n", mci->mc_idx); in ie31200_check()
413 edac_dbg(0, "MC:\n"); in ie31200_probe1()
438 edac_dbg(3, "MC: init mci\n"); in ie31200_probe1()
467 edac_dbg(0, "addr_decode: 0x%x\n", addr_decode); in ie31200_probe1()
471 edac_dbg(0, "size: 0x%x, rank: %d, width: %d\n", in ie31200_probe1()
497 edac_dbg( in ie31200_probe1()
[all...]
H A Dr82600_edac.c207 edac_dbg(1, "MC%d\n", mci->mc_idx); in r82600_check()
238 edac_dbg(1, "Row=%d DRBA = %#0x\n", index, drbar); in r82600_init_csrows()
243 edac_dbg(1, "Row=%d, Boundary Address=%#0x, Last = %#0x\n", in r82600_init_csrows()
279 edac_dbg(0, "\n"); in r82600_probe1()
284 edac_dbg(2, "sdram refresh rate = %#0x\n", sdram_refresh_rate); in r82600_probe1()
285 edac_dbg(2, "DRAMC register = %#0x\n", dramcr); in r82600_probe1()
296 edac_dbg(0, "mci = %p\n", mci); in r82600_probe1()
312 edac_dbg(3, "mci = %p - Scrubbing disabled! EAP: %#0x\n", in r82600_probe1()
329 edac_dbg(3, "failed edac_mc_add_mc()\n"); in r82600_probe1()
336 edac_dbg( in r82600_probe1()
[all...]
H A Dx38_edac.c106 edac_dbg(0, "In single channel mode\n"); in how_many_channel()
109 edac_dbg(0, "In dual channel mode\n"); in how_many_channel()
241 edac_dbg(1, "MC%d\n", mci->mc_idx); in x38_check()
328 edac_dbg(0, "MC:\n"); in x38_probe1()
349 edac_dbg(3, "MC: init mci\n"); in x38_probe1()
398 edac_dbg(3, "MC: failed edac_mc_add_mc()\n"); in x38_probe1()
403 edac_dbg(3, "MC: success\n"); in x38_probe1()
418 edac_dbg(0, "MC:\n"); in x38_init_one()
434 edac_dbg(0, "\n"); in x38_remove_one()
467 edac_dbg( in x38_init()
[all...]
H A Di82443bxgx_edac.c179 edac_dbg(1, "MC%d\n", mci->mc_idx); in i82443bxgx_edacmc_check()
202 edac_dbg(1, "MC%d: Row=%d DRB = %#0x\n", in i82443bxgx_init_csrows()
206 edac_dbg(1, "MC%d: Row=%d, Boundary Address=%#0x, Last = %#0x\n", in i82443bxgx_init_csrows()
241 edac_dbg(0, "MC:\n"); in i82443bxgx_edacmc_probe1()
259 edac_dbg(0, "MC: mci = %p\n", mci); in i82443bxgx_edacmc_probe1()
275 edac_dbg(0, "Unknown/reserved DRAM type value in DRAMC register!\n"); in i82443bxgx_edacmc_probe1()
304 edac_dbg(0, "Unknown/reserved ECC state in NBXCFG register!\n"); in i82443bxgx_edacmc_probe1()
327 edac_dbg(3, "failed edac_mc_add_mc()\n"); in i82443bxgx_edacmc_probe1()
342 edac_dbg(3, "MC: success\n"); in i82443bxgx_edacmc_probe1()
356 edac_dbg( in i82443bxgx_edacmc_init_one()
[all...]
H A Dedac_pci.c38 edac_dbg(1, "\n"); in edac_pci_alloc_ctl_info()
63 edac_dbg(1, "\n"); in edac_pci_free_ctl_info()
80 edac_dbg(1, "\n"); in find_edac_pci_by_dev()
105 edac_dbg(1, "\n"); in add_edac_pci_to_global_list()
174 edac_dbg(3, "checking\n"); in edac_pci_workq_function()
206 edac_dbg(0, "\n"); in edac_pci_add_device()
253 edac_dbg(0, "\n"); in edac_pci_del_device()
290 edac_dbg(4, "\n"); in edac_pci_generic_check()
325 edac_dbg(3, "failed edac_pci_add_device()\n"); in edac_pci_create_generic_ctl()
336 edac_dbg( in edac_pci_release_generic_ctl()
[all...]
H A De7xxx_edac.c168 edac_dbg(3, "\n"); in e7xxx_find_channel()
188 edac_dbg(3, "\n"); in ctl_page_to_phys()
210 edac_dbg(3, "\n"); in process_ce()
227 edac_dbg(3, "\n"); in process_ce_no_info()
237 edac_dbg(3, "\n"); in process_ue()
250 edac_dbg(3, "\n"); in process_ue_no_info()
336 edac_dbg(3, "\n"); in e7xxx_check()
385 edac_dbg(3, "(%d) cumul_size 0x%x\n", index, cumul_size); in e7xxx_init_csrows()
431 edac_dbg(0, "mci\n"); in e7xxx_probe1()
454 edac_dbg( in e7xxx_probe1()
[all...]
H A Di3200_edac.c114 edac_dbg(0, "In single channel mode\n"); in how_many_channels()
117 edac_dbg(0, "In dual channel mode\n"); in how_many_channels()
122 edac_dbg(0, "2 DIMMS per channel disabled\n"); in how_many_channels()
124 edac_dbg(0, "2 DIMMS per channel enabled\n"); in how_many_channels()
256 edac_dbg(1, "MC%d\n", mci->mc_idx); in i3200_check()
301 edac_dbg(0, "drb[0][%d] = %d, drb[1][%d] = %d\n", i, drbs[0][i], i, drbs[1][i]); in i3200_get_drbs()
347 edac_dbg(0, "MC:\n"); in i3200_probe1()
367 edac_dbg(3, "MC: init mci\n"); in i3200_probe1()
401 edac_dbg(0, "csrow %d, channel %d%s, size = %ld MiB\n", i, j, in i3200_probe1()
416 edac_dbg( in i3200_probe1()
[all...]
H A Di3000_edac.c276 edac_dbg(1, "MC%d\n", mci->mc_idx); in i3000_check()
323 edac_dbg(0, "MC:\n"); in i3000_probe1()
367 edac_dbg(3, "MC: init mci\n"); in i3000_probe1()
399 edac_dbg(3, "MC: (%d) cumul_size 0x%x\n", i, cumul_size); in i3000_probe1()
428 edac_dbg(3, "MC: failed edac_mc_add_mc()\n"); in i3000_probe1()
444 edac_dbg(3, "MC: success\n"); in i3000_probe1()
459 edac_dbg(0, "MC:\n"); in i3000_init_one()
475 edac_dbg(0, "\n"); in i3000_remove_one()
509 edac_dbg(3, "MC:\n"); in i3000_init()
523 edac_dbg( in i3000_init()
[all...]
/kernel/linux/linux-6.6/drivers/edac/
H A Di5400_edac.c552 edac_dbg(0, "\t\t%s DIMM= %d Channels= %d,%d (Branch= %d DRAM Bank= %d Buffer ID = %d rdwr= %s ras= %d cas= %d)\n", in i5400_proccess_non_recoverable_info()
604 edac_dbg(0, "\tCorrected bits= 0x%lx\n", allErrors); in i5400_process_nonfatal_error_info()
625 edac_dbg(0, "\t\tDIMM= %d Channel= %d (Branch %d DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n", in i5400_process_nonfatal_error_info()
776 edac_dbg(1, "System Address, processor bus- PCI Bus ID: %s %x:%x\n", in i5400_get_devices()
779 edac_dbg(1, "Branchmap, control and errors - PCI Bus ID: %s %x:%x\n", in i5400_get_devices()
783 edac_dbg(1, "FSB Error Regs - PCI Bus ID: %s %x:%x\n", in i5400_get_devices()
873 edac_dbg(0, "ERROR: trying to access an invalid dimm: %d\n", in determine_mtr()
894 edac_dbg(2, "\tMTR%d=0x%x: DIMMs are %sPresent\n", in decode_mtr()
899 edac_dbg(2, "\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr)); in decode_mtr()
901 edac_dbg( in decode_mtr()
[all...]
H A Dedac_mc.c84 edac_dbg(4, " channel->chan_idx = %d\n", chan->chan_idx); in edac_mc_dump_channel()
85 edac_dbg(4, " channel = %p\n", chan); in edac_mc_dump_channel()
86 edac_dbg(4, " channel->csrow = %p\n", chan->csrow); in edac_mc_dump_channel()
87 edac_dbg(4, " channel->dimm = %p\n", chan->dimm); in edac_mc_dump_channel()
99 edac_dbg(4, "%s%i: %smapped as virtual row %d, chan %d\n", in edac_mc_dump_dimm()
102 edac_dbg(4, " dimm = %p\n", dimm); in edac_mc_dump_dimm()
103 edac_dbg(4, " dimm->label = '%s'\n", dimm->label); in edac_mc_dump_dimm()
104 edac_dbg(4, " dimm->nr_pages = 0x%x\n", dimm->nr_pages); in edac_mc_dump_dimm()
105 edac_dbg(4, " dimm->grain = %d\n", dimm->grain); in edac_mc_dump_dimm()
110 edac_dbg( in edac_mc_dump_csrow()
[all...]
H A Di7300_edac.c597 edac_dbg(2, "\tMTR%d CH%d: DIMMs are %sPresent (mtr)\n", in decode_mtr()
620 edac_dbg(2, "\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr)); in decode_mtr()
622 edac_dbg(2, "\t\tELECTRICAL THROTTLING is %s\n", in decode_mtr()
625 edac_dbg(2, "\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr)); in decode_mtr()
626 edac_dbg(2, "\t\tNUMRANK: %s\n", in decode_mtr()
628 edac_dbg(2, "\t\tNUMROW: %s\n", in decode_mtr()
633 edac_dbg(2, "\t\tNUMCOL: %s\n", in decode_mtr()
638 edac_dbg(2, "\t\tSIZE: %d MB\n", dinfo->megabytes); in decode_mtr()
654 edac_dbg(2, "\t\tECC code is 8-byte-over-32-byte SECDED+ code\n"); in decode_mtr()
656 edac_dbg( in decode_mtr()
[all...]
H A Dedac_device_sysfs.c206 edac_dbg(4, "control index=%d\n", edac_dev->dev_idx); in edac_device_ctrl_master_release()
235 edac_dbg(1, "\n"); in edac_device_register_sysfs_main_kobj()
262 edac_dbg(1, "Failed to register '.../edac/%s'\n", in edac_device_register_sysfs_main_kobj()
272 edac_dbg(4, "Registered '.../edac/%s' kobject\n", edac_dev->name); in edac_device_register_sysfs_main_kobj()
291 edac_dbg(0, "\n"); in edac_device_unregister_sysfs_main_kobj()
292 edac_dbg(4, "name of kobject is: %s\n", kobject_name(&dev->kobj)); in edac_device_unregister_sysfs_main_kobj()
329 edac_dbg(1, "\n"); in edac_device_ctrl_instance_release()
436 edac_dbg(1, "\n"); in edac_device_ctrl_block_release()
519 edac_dbg(4, "Instance '%s' inst_p=%p block '%s' block_p=%p\n", in edac_device_create_block()
521 edac_dbg( in edac_device_create_block()
[all...]
H A Dedac_pci_sysfs.c78 edac_dbg(0, "\n"); in edac_pci_instance_release()
162 edac_dbg(0, "\n"); in edac_pci_create_instance_kobj()
178 edac_dbg(2, "failed to register instance pci%d\n", idx); in edac_pci_create_instance_kobj()
184 edac_dbg(1, "Register instance 'pci%d' kobject\n", idx); in edac_pci_create_instance_kobj()
201 edac_dbg(0, "\n"); in edac_pci_unregister_sysfs_instance_kobj()
318 edac_dbg(0, "here to module_put(THIS_MODULE)\n"); in edac_pci_release_main_kobj()
344 edac_dbg(0, "\n"); in edac_pci_main_kobj_setup()
360 edac_dbg(1, "try_module_get() failed\n"); in edac_pci_main_kobj_setup()
366 edac_dbg(1, "Failed to allocate\n"); in edac_pci_main_kobj_setup()
380 edac_dbg( in edac_pci_main_kobj_setup()
[all...]
H A Di5000_edac.c487 edac_dbg(0, "\t\tCSROW= %d Channel= %d (DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n", in i5000_process_fatal_error_info()
566 edac_dbg(0, "\tUncorrected bits= 0x%x\n", ue_errors); in i5000_process_nonfatal_error_info()
582 edac_dbg(0, "\t\tCSROW= %d Channels= %d,%d (Branch= %d DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n", in i5000_process_nonfatal_error_info()
636 edac_dbg(0, "\tCorrected bits= 0x%x\n", ce_errors); in i5000_process_nonfatal_error_info()
654 edac_dbg(0, "\t\tCSROW= %d Channel= %d (Branch %d DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n", in i5000_process_nonfatal_error_info()
839 edac_dbg(1, "System Address, processor bus- PCI Bus ID: %s %x:%x\n", in i5000_get_devices()
842 edac_dbg(1, "Branchmap, control and errors - PCI Bus ID: %s %x:%x\n", in i5000_get_devices()
846 edac_dbg(1, "FSB Error Regs - PCI Bus ID: %s %x:%x\n", in i5000_get_devices()
971 edac_dbg(2, "\tMTR%d=0x%x: DIMMs are %sPresent\n", in decode_mtr()
976 edac_dbg( in decode_mtr()
[all...]
H A Die31200_edac.c225 edac_dbg(0, "In single channel mode\n"); in how_many_channels()
228 edac_dbg(0, "In dual channel mode\n"); in how_many_channels()
234 edac_dbg(0, "2 DIMMS per channel disabled\n"); in how_many_channels()
236 edac_dbg(0, "2 DIMMS per channel enabled\n"); in how_many_channels()
420 edac_dbg(0, "MC:\n"); in ie31200_probe1()
445 edac_dbg(3, "MC: init mci\n"); in ie31200_probe1()
474 edac_dbg(0, "addr_decode: 0x%x\n", addr_decode); in ie31200_probe1()
478 edac_dbg(0, "size: 0x%x, rank: %d, width: %d\n", in ie31200_probe1()
504 edac_dbg(0, "set nr pages: 0x%lx\n", nr_pages); in ie31200_probe1()
515 edac_dbg( in ie31200_probe1()
[all...]
H A Dedac_pci.c33 edac_dbg(1, "\n"); in edac_pci_alloc_ctl_info()
59 edac_dbg(1, "\n"); in edac_pci_free_ctl_info()
76 edac_dbg(1, "\n"); in find_edac_pci_by_dev()
101 edac_dbg(1, "\n"); in add_edac_pci_to_global_list()
170 edac_dbg(3, "checking\n"); in edac_pci_workq_function()
202 edac_dbg(0, "\n"); in edac_pci_add_device()
249 edac_dbg(0, "\n"); in edac_pci_del_device()
286 edac_dbg(4, "\n"); in edac_pci_generic_check()
321 edac_dbg(3, "failed edac_pci_add_device()\n"); in edac_pci_create_generic_ctl()
332 edac_dbg( in edac_pci_release_generic_ctl()
[all...]
H A Damd64_edac.c362 edac_dbg(2, "sys_addr 0x%lx doesn't match any node\n", in find_mc_by_sys_addr()
461 edac_dbg(2, "InputAddr 0x%lx matches csrow %d (node %d)\n", in input_addr_to_csrow()
468 edac_dbg(2, "no matching csrow for InputAddr 0x%lx (MC node %d)\n", in input_addr_to_csrow()
497 edac_dbg(1, " revision %d for node %d does not support DHAR\n", in get_dram_hole_info()
504 edac_dbg(1, " Dram Memory Hoisting is DISABLED on this system\n"); in get_dram_hole_info()
509 edac_dbg(1, " Dram Memory Hoisting is DISABLED on this node %d\n", in get_dram_hole_info()
538 edac_dbg(1, " DHAR info for node %d base 0x%lx offset 0x%lx size 0x%lx\n", in get_dram_hole_info()
734 edac_dbg(0, "section=0x%x word_bits=0x%x\n", section, word_bits); in inject_read_store()
783 edac_dbg(0, "section=0x%x word_bits=0x%x\n", section, word_bits); in inject_write_store()
870 edac_dbg( in sys_addr_to_dram_addr()
[all...]
H A Di82443bxgx_edac.c201 edac_dbg(1, "MC%d: Row=%d DRB = %#0x\n", in i82443bxgx_init_csrows()
205 edac_dbg(1, "MC%d: Row=%d, Boundary Address=%#0x, Last = %#0x\n", in i82443bxgx_init_csrows()
240 edac_dbg(0, "MC:\n"); in i82443bxgx_edacmc_probe1()
258 edac_dbg(0, "MC: mci = %p\n", mci); in i82443bxgx_edacmc_probe1()
274 edac_dbg(0, "Unknown/reserved DRAM type value in DRAMC register!\n"); in i82443bxgx_edacmc_probe1()
303 edac_dbg(0, "Unknown/reserved ECC state in NBXCFG register!\n"); in i82443bxgx_edacmc_probe1()
326 edac_dbg(3, "failed edac_mc_add_mc()\n"); in i82443bxgx_edacmc_probe1()
341 edac_dbg(3, "MC: success\n"); in i82443bxgx_edacmc_probe1()
355 edac_dbg(0, "MC:\n"); in i82443bxgx_edacmc_init_one()
370 edac_dbg( in i82443bxgx_edacmc_remove_one()
[all...]
H A Dr82600_edac.c237 edac_dbg(1, "Row=%d DRBA = %#0x\n", index, drbar); in r82600_init_csrows()
242 edac_dbg(1, "Row=%d, Boundary Address=%#0x, Last = %#0x\n", in r82600_init_csrows()
278 edac_dbg(0, "\n"); in r82600_probe1()
283 edac_dbg(2, "sdram refresh rate = %#0x\n", sdram_refresh_rate); in r82600_probe1()
284 edac_dbg(2, "DRAMC register = %#0x\n", dramcr); in r82600_probe1()
295 edac_dbg(0, "mci = %p\n", mci); in r82600_probe1()
311 edac_dbg(3, "mci = %p - Scrubbing disabled! EAP: %#0x\n", in r82600_probe1()
328 edac_dbg(3, "failed edac_mc_add_mc()\n"); in r82600_probe1()
335 edac_dbg(3, "Disabling Hardware Scrub (scrub on error)\n"); in r82600_probe1()
350 edac_dbg( in r82600_probe1()
[all...]

Completed in 25 milliseconds

1234