Lines Matching refs:edac_dbg
597 edac_dbg(2, "\tMTR%d CH%d: DIMMs are %sPresent (mtr)\n",
620 edac_dbg(2, "\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr));
622 edac_dbg(2, "\t\tELECTRICAL THROTTLING is %s\n",
625 edac_dbg(2, "\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr));
626 edac_dbg(2, "\t\tNUMRANK: %s\n",
628 edac_dbg(2, "\t\tNUMROW: %s\n",
633 edac_dbg(2, "\t\tNUMCOL: %s\n",
638 edac_dbg(2, "\t\tSIZE: %d MB\n", dinfo->megabytes);
654 edac_dbg(2, "\t\tECC code is 8-byte-over-32-byte SECDED+ code\n");
656 edac_dbg(2, "\t\tECC code is on Lockstep mode\n");
665 edac_dbg(2, "\t\tScrub algorithm for x8 is on %s mode\n",
701 edac_dbg(2, "%s\n", pvt->tmp_prt_buffer);
708 edac_dbg(2, "%s\n", pvt->tmp_prt_buffer);
724 edac_dbg(2, "%s\n", pvt->tmp_prt_buffer);
733 edac_dbg(2, "%s\n", pvt->tmp_prt_buffer);
756 edac_dbg(2, "Memory Technology Registers:\n");
773 edac_dbg(2, "\t\tAMB-present CH%d = 0x%x:\n",
783 edac_dbg(2, "\t\tAMB-present CH%d = 0x%x:\n",
825 edac_dbg(2, "MIR%d: limit= 0x%x Branch(es) that participate: %s %s\n",
849 edac_dbg(2, "AMBASE= 0x%lx\n", (long unsigned int)pvt->ambase);
854 edac_dbg(2, "TOLM (number of 256M regions) =%u (0x%x)\n",
858 edac_dbg(2, "Actual TOLM byte addr=%u.%03u GB (0x%x)\n",
868 edac_dbg(0, "Memory controller operating on single mode\n");
870 edac_dbg(0, "Memory controller operating on %smirrored mode\n",
873 edac_dbg(0, "Error detection is %s\n",
875 edac_dbg(0, "Retry is %s\n",
972 edac_dbg(1, "System Address, processor bus- PCI Bus ID: %s %x:%x\n",
976 edac_dbg(1, "Branchmap, control and errors - PCI Bus ID: %s %x:%x\n",
980 edac_dbg(1, "FSB Error Regs - PCI Bus ID: %s %x:%x\n",
1033 edac_dbg(0, "MC: pdev bus %u dev=0x%x fn=0x%x\n",
1055 edac_dbg(0, "MC: mci = %p\n", mci);
1087 edac_dbg(0, "MC: Setting mci->edac_cap to EDAC_FLAG_NONE because i7300_init_csrows() returned nonzero value\n");
1090 edac_dbg(1, "MC: Enable error reporting now\n");
1096 edac_dbg(0, "MC: failed edac_mc_add_mc()\n");
1138 edac_dbg(0, "\n");
1185 edac_dbg(2, "\n");
1200 edac_dbg(2, "\n");