| /kernel/linux/linux-6.6/drivers/gpu/drm/bridge/imx/ |
| H A D | imx8qm-ldb.c | 52 struct clk *clk_bypass; member
151 clk_set_rate(imx8qm_ldb->clk_bypass, di_clk); in imx8qm_ldb_bridge_mode_set()
217 clk_prepare_enable(imx8qm_ldb->clk_bypass); in imx8qm_ldb_bridge_atomic_enable()
282 clk_disable_unprepare(imx8qm_ldb->clk_bypass); in imx8qm_ldb_bridge_atomic_disable()
462 imx8qm_ldb->clk_bypass = devm_clk_get(dev, "bypass"); in imx8qm_ldb_probe()
463 if (IS_ERR(imx8qm_ldb->clk_bypass)) { in imx8qm_ldb_probe()
464 ret = PTR_ERR(imx8qm_ldb->clk_bypass); in imx8qm_ldb_probe()
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| H A D | imx8qxp-ldb.c | 49 struct clk *clk_bypass; member
162 clk_set_rate(imx8qxp_ldb->clk_bypass, di_clk); in imx8qxp_ldb_bridge_mode_set()
217 clk_prepare_enable(imx8qxp_ldb->clk_bypass); in imx8qxp_ldb_bridge_atomic_pre_enable()
282 clk_disable_unprepare(imx8qxp_ldb->clk_bypass); in imx8qxp_ldb_bridge_atomic_disable()
601 imx8qxp_ldb->clk_bypass = devm_clk_get(dev, "bypass"); in imx8qxp_ldb_probe()
602 if (IS_ERR(imx8qxp_ldb->clk_bypass)) { in imx8qxp_ldb_probe()
603 ret = PTR_ERR(imx8qxp_ldb->clk_bypass); in imx8qxp_ldb_probe()
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| /kernel/linux/linux-5.10/drivers/clk/ti/ |
| H A D | dpll44xx.c | 212 if (clk_hw_get_rate(dd->clk_bypass) == req->rate && in omap4_dpll_regm4xen_determine_rate()
214 req->best_parent_hw = dd->clk_bypass; in omap4_dpll_regm4xen_determine_rate()
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| H A D | fapll.c | 73 struct clk *clk_bypass; member
583 fd->clk_bypass = of_clk_get(node, 1); in ti_fapll_setup()
584 if (IS_ERR(fd->clk_bypass)) { in ti_fapll_setup()
585 pr_err("%pOFn could not get clk_bypass\n", node); in ti_fapll_setup()
666 if (fd->clk_bypass) in ti_fapll_setup()
667 clk_put(fd->clk_bypass); in ti_fapll_setup()
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| H A D | dpll3xxx.c | 460 if (clk_hw_get_rate(hw) == clk_hw_get_rate(dd->clk_bypass)) { in omap3_noncore_dpll_enable()
461 WARN_ON(parent != dd->clk_bypass); in omap3_noncore_dpll_enable()
512 if (clk_hw_get_rate(dd->clk_bypass) == req->rate && in omap3_noncore_dpll_determine_rate()
514 req->best_parent_hw = dd->clk_bypass; in omap3_noncore_dpll_determine_rate()
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| H A D | clkt_dpll.c | 254 return clk_hw_get_rate(dd->clk_bypass); in omap2_get_dpll_rate()
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| H A D | dpll.c | 194 dd->clk_bypass = __clk_get_hw(clk); in _register_dpll()
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| H A D | apll.c | 168 ad->clk_bypass = __clk_get_hw(clk); in omap_clk_register_apll()
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| /kernel/linux/linux-6.6/drivers/clk/ti/ |
| H A D | dpll44xx.c | 214 if (clk_hw_get_rate(dd->clk_bypass) == req->rate && in omap4_dpll_regm4xen_determine_rate()
216 req->best_parent_hw = dd->clk_bypass; in omap4_dpll_regm4xen_determine_rate()
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| H A D | fapll.c | 64 struct clk *clk_bypass; member
574 fd->clk_bypass = of_clk_get(node, 1); in ti_fapll_setup()
575 if (IS_ERR(fd->clk_bypass)) { in ti_fapll_setup()
576 pr_err("%pOFn could not get clk_bypass\n", node); in ti_fapll_setup()
657 if (fd->clk_bypass) in ti_fapll_setup()
658 clk_put(fd->clk_bypass); in ti_fapll_setup()
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| H A D | dpll3xxx.c | 546 if (clk_hw_get_rate(hw) == clk_hw_get_rate(dd->clk_bypass)) { in omap3_noncore_dpll_enable()
547 WARN_ON(parent != dd->clk_bypass); in omap3_noncore_dpll_enable()
598 if (clk_hw_get_rate(dd->clk_bypass) == req->rate && in omap3_noncore_dpll_determine_rate()
600 req->best_parent_hw = dd->clk_bypass; in omap3_noncore_dpll_determine_rate()
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| H A D | clkt_dpll.c | 254 return clk_hw_get_rate(dd->clk_bypass); in omap2_get_dpll_rate()
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| H A D | apll.c | 160 ad->clk_bypass = __clk_get_hw(clk); in omap_clk_register_apll()
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| H A D | dpll.c | 186 dd->clk_bypass = __clk_get_hw(clk); in _register_dpll()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
| H A D | rv1_clk_mgr_clk.c | 52 void rv1_dump_clk_registers(struct clk_state_registers *regs, struct clk_bypass *bypass, struct clk_mgr *clk_mgr_base) in rv1_dump_clk_registers()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
| H A D | rv1_clk_mgr_clk.c | 52 void rv1_dump_clk_registers(struct clk_state_registers *regs, struct clk_bypass *bypass, struct clk_mgr *clk_mgr_base) in rv1_dump_clk_registers()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | clk_mgr.h | 179 struct clk_bypass { struct
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| /kernel/linux/linux-5.10/include/linux/clk/ |
| H A D | ti.h | 38 * @clk_bypass: struct clk_hw pointer to the clock's bypass clock input
74 * correct to only have one @clk_bypass pointer.
85 struct clk_hw *clk_bypass; member
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | clk_mgr.h | 204 struct clk_bypass { struct
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| /kernel/linux/linux-6.6/include/linux/clk/ |
| H A D | ti.h | 30 * @clk_bypass: struct clk_hw pointer to the clock's bypass clock input
77 * correct to only have one @clk_bypass pointer.
88 struct clk_hw *clk_bypass; member
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