| /kernel/linux/linux-5.10/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | s5pv210.h | 191 #define SCLK_PWM 169 macro
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| H A D | exynos7-clk.h | 88 #define SCLK_PWM 11 macro
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| H A D | rv1108-cru.h | 71 #define SCLK_PWM 121 macro
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| H A D | rk3328-cru.h | 49 #define SCLK_PWM 60 macro
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| /kernel/linux/linux-5.10/include/dt-bindings/clock/ |
| H A D | exynos7-clk.h | 88 #define SCLK_PWM 11 macro
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| H A D | s5pv210.h | 191 #define SCLK_PWM 169 macro
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| H A D | rv1108-cru.h | 71 #define SCLK_PWM 121 macro
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| H A D | rk3328-cru.h | 49 #define SCLK_PWM 60 macro
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| /kernel/linux/linux-6.6/include/dt-bindings/clock/ |
| H A D | s5pv210.h | 191 #define SCLK_PWM 169 macro
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| H A D | exynos7-clk.h | 88 #define SCLK_PWM 11 macro
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| H A D | rv1108-cru.h | 71 #define SCLK_PWM 121 macro
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| H A D | rk3328-cru.h | 49 #define SCLK_PWM 60 macro
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| /kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | exynos7-clk.h | 88 #define SCLK_PWM 11 macro
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| H A D | s5pv210.h | 191 #define SCLK_PWM 169 macro
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| H A D | rv1108-cru.h | 71 #define SCLK_PWM 121 macro
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| H A D | rk3328-cru.h | 49 #define SCLK_PWM 60 macro
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| /kernel/linux/linux-5.10/drivers/clk/samsung/ |
| H A D | clk-s5pv210.c | 592 GATE(SCLK_PWM, "sclk_pwm", "dout_pwm", CLK_SRC_MASK0, 19,
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| H A D | clk-exynos7.c | 675 GATE(SCLK_PWM, "sclk_pwm", "fin_pll", ENABLE_SCLK_PERIC0, 21, 0, 0),
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| /kernel/linux/linux-6.6/drivers/clk/samsung/ |
| H A D | clk-s5pv210.c | 592 GATE(SCLK_PWM, "sclk_pwm", "dout_pwm", CLK_SRC_MASK0, 19,
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| H A D | clk-exynos7.c | 675 GATE(SCLK_PWM, "sclk_pwm", "fin_pll", ENABLE_SCLK_PERIC0, 21, 0, 0),
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| /kernel/linux/linux-5.10/drivers/clk/rockchip/ |
| H A D | clk-rk3328.c | 464 COMPOSITE(SCLK_PWM, "clk_pwm", mux_2plls_p, 0,
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| H A D | clk-rv1108.c | 626 COMPOSITE(SCLK_PWM, "clk_pwm", mux_pll_src_2plls_p, 0,
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| /kernel/linux/linux-6.6/drivers/clk/rockchip/ |
| H A D | clk-rv1108.c | 627 COMPOSITE(SCLK_PWM, "clk_pwm", mux_pll_src_2plls_p, 0,
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| H A D | clk-rk3328.c | 465 COMPOSITE(SCLK_PWM, "clk_pwm", mux_2plls_p, 0,
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