/kernel/linux/linux-5.10/drivers/clk/samsung/ |
H A D | clk-exynos5260.c | 88 PNAME(mout_aud_pll_user_p) = {"fin_pll", "fout_aud_pll"}; 89 PNAME(mout_sclk_aud_i2s_p) = {"mout_aud_pll_user", "ioclk_i2s_cdclk"}; 90 PNAME(mout_sclk_aud_pcm_p) = {"mout_aud_pll_user", "ioclk_pcm_extclk"}; 169 PNAME(mout_phyclk_dptx_phy_ch3_txd_clk_user_p) = {"fin_pll", 171 PNAME(mout_phyclk_dptx_phy_ch2_txd_clk_user_p) = {"fin_pll", 173 PNAME(mout_phyclk_dptx_phy_ch1_txd_clk_user_p) = {"fin_pll", 175 PNAME(mout_phyclk_dptx_phy_ch0_txd_clk_user_p) = {"fin_pll", 177 PNAME(mout_aclk_disp_222_user_p) = {"fin_pll", "dout_aclk_disp_222"}; 178 PNAME(mout_sclk_disp_pixel_user_p) = {"fin_pll", "dout_sclk_disp_pixel"}; 179 PNAME(mout_aclk_disp_333_user_ [all...] |
H A D | clk-exynos7.c | 45 PNAME(mout_topc_aud_pll_ctrl_p) = { "fin_pll", "fout_aud_pll" }; 46 PNAME(mout_topc_bus0_pll_ctrl_p) = { "fin_pll", "fout_bus0_pll" }; 47 PNAME(mout_topc_bus1_pll_ctrl_p) = { "fin_pll", "fout_bus1_pll" }; 48 PNAME(mout_topc_cc_pll_ctrl_p) = { "fin_pll", "fout_cc_pll" }; 49 PNAME(mout_topc_mfc_pll_ctrl_p) = { "fin_pll", "fout_mfc_pll" }; 51 PNAME(mout_topc_group2) = { "mout_topc_bus0_pll_half", 55 PNAME(mout_topc_bus0_pll_half_p) = { "mout_topc_bus0_pll", 57 PNAME(mout_topc_bus1_pll_half_p) = { "mout_topc_bus1_pll", 59 PNAME(mout_topc_cc_pll_half_p) = { "mout_topc_cc_pll", 61 PNAME(mout_topc_mfc_pll_half_ [all...] |
H A D | clk-exynos5420.c | 293 PNAME(mout_mspll_cpu_p) = {"mout_sclk_cpll", "mout_sclk_dpll", 295 PNAME(mout_cpu_p) = {"mout_apll" , "mout_mspll_cpu"}; 296 PNAME(mout_kfc_p) = {"mout_kpll" , "mout_mspll_kfc"}; 297 PNAME(mout_apll_p) = {"fin_pll", "fout_apll"}; 298 PNAME(mout_bpll_p) = {"fin_pll", "fout_bpll"}; 299 PNAME(mout_cpll_p) = {"fin_pll", "fout_cpll"}; 300 PNAME(mout_dpll_p) = {"fin_pll", "fout_dpll"}; 301 PNAME(mout_epll_p) = {"fin_pll", "fout_epll"}; 302 PNAME(mout_ipll_p) = {"fin_pll", "fout_ipll"}; 303 PNAME(mout_kpll_ [all...] |
H A D | clk-exynos4.c | 279 PNAME(mout_apll_p) = { "fin_pll", "fout_apll", }; 280 PNAME(mout_mpll_p) = { "fin_pll", "fout_mpll", }; 281 PNAME(mout_epll_p) = { "fin_pll", "fout_epll", }; 282 PNAME(mout_vpllsrc_p) = { "fin_pll", "sclk_hdmi24m", }; 283 PNAME(mout_vpll_p) = { "fin_pll", "fout_vpll", }; 284 PNAME(sclk_evpll_p) = { "sclk_epll", "sclk_vpll", }; 285 PNAME(mout_mfc_p) = { "mout_mfc0", "mout_mfc1", }; 286 PNAME(mout_g3d_p) = { "mout_g3d0", "mout_g3d1", }; 287 PNAME(mout_g2d_p) = { "mout_g2d0", "mout_g2d1", }; 288 PNAME(mout_hdmi_ [all...] |
H A D | clk-exynos5433.c | 190 PNAME(mout_aud_pll_p) = { "oscclk", "fout_aud_pll", }; 191 PNAME(mout_isp_pll_p) = { "oscclk", "fout_isp_pll", }; 192 PNAME(mout_aud_pll_user_p) = { "oscclk", "mout_aud_pll", }; 193 PNAME(mout_mphy_pll_user_p) = { "oscclk", "sclk_mphy_pll", }; 194 PNAME(mout_mfc_pll_user_p) = { "oscclk", "sclk_mfc_pll", }; 195 PNAME(mout_bus_pll_user_p) = { "oscclk", "sclk_bus_pll", }; 196 PNAME(mout_bus_pll_user_t_p) = { "oscclk", "mout_bus_pll_user", }; 197 PNAME(mout_mphy_pll_user_t_p) = { "oscclk", "mout_mphy_pll_user", }; 199 PNAME(mout_bus_mfc_pll_user_p) = { "mout_bus_pll_user", "mout_mfc_pll_user",}; 200 PNAME(mout_mfc_bus_pll_user_ [all...] |
/kernel/linux/linux-6.6/drivers/clk/samsung/ |
H A D | clk-exynos5260.c | 103 PNAME(mout_aud_pll_user_p) = {"fin_pll", "fout_aud_pll"}; 104 PNAME(mout_sclk_aud_i2s_p) = {"mout_aud_pll_user", "ioclk_i2s_cdclk"}; 105 PNAME(mout_sclk_aud_pcm_p) = {"mout_aud_pll_user", "ioclk_pcm_extclk"}; 184 PNAME(mout_phyclk_dptx_phy_ch3_txd_clk_user_p) = {"fin_pll", 186 PNAME(mout_phyclk_dptx_phy_ch2_txd_clk_user_p) = {"fin_pll", 188 PNAME(mout_phyclk_dptx_phy_ch1_txd_clk_user_p) = {"fin_pll", 190 PNAME(mout_phyclk_dptx_phy_ch0_txd_clk_user_p) = {"fin_pll", 192 PNAME(mout_aclk_disp_222_user_p) = {"fin_pll", "dout_aclk_disp_222"}; 193 PNAME(mout_sclk_disp_pixel_user_p) = {"fin_pll", "dout_sclk_disp_pixel"}; 194 PNAME(mout_aclk_disp_333_user_ [all...] |
H A D | clk-exynos7.c | 45 PNAME(mout_topc_aud_pll_ctrl_p) = { "fin_pll", "fout_aud_pll" }; 46 PNAME(mout_topc_bus0_pll_ctrl_p) = { "fin_pll", "fout_bus0_pll" }; 47 PNAME(mout_topc_bus1_pll_ctrl_p) = { "fin_pll", "fout_bus1_pll" }; 48 PNAME(mout_topc_cc_pll_ctrl_p) = { "fin_pll", "fout_cc_pll" }; 49 PNAME(mout_topc_mfc_pll_ctrl_p) = { "fin_pll", "fout_mfc_pll" }; 51 PNAME(mout_topc_group2) = { "mout_topc_bus0_pll_half", 55 PNAME(mout_topc_bus0_pll_half_p) = { "mout_topc_bus0_pll", 57 PNAME(mout_topc_bus1_pll_half_p) = { "mout_topc_bus1_pll", 59 PNAME(mout_topc_cc_pll_half_p) = { "mout_topc_cc_pll", 61 PNAME(mout_topc_mfc_pll_half_ [all...] |
H A D | clk-exynos7885.c | 166 PNAME(mout_core_bus_p) = { "dout_shared0_div2", "dout_shared1_div2", 168 PNAME(mout_core_cci_p) = { "dout_shared0_div2", "dout_shared1_div2", 170 PNAME(mout_core_g3d_p) = { "dout_shared0_div2", "dout_shared1_div2", 174 PNAME(mout_peri_bus_p) = { "dout_shared0_div4", "dout_shared1_div4" }; 175 PNAME(mout_peri_spi0_p) = { "oscclk", "dout_shared0_div4" }; 176 PNAME(mout_peri_spi1_p) = { "oscclk", "dout_shared0_div4" }; 177 PNAME(mout_peri_uart0_p) = { "oscclk", "dout_shared0_div4" }; 178 PNAME(mout_peri_uart1_p) = { "oscclk", "dout_shared0_div4" }; 179 PNAME(mout_peri_uart2_p) = { "oscclk", "dout_shared0_div4" }; 180 PNAME(mout_peri_usi0_ [all...] |
H A D | clk-exynos5420.c | 296 PNAME(mout_mspll_cpu_p) = {"mout_sclk_cpll", "mout_sclk_dpll", 298 PNAME(mout_cpu_p) = {"mout_apll" , "mout_mspll_cpu"}; 299 PNAME(mout_kfc_p) = {"mout_kpll" , "mout_mspll_kfc"}; 300 PNAME(mout_apll_p) = {"fin_pll", "fout_apll"}; 301 PNAME(mout_bpll_p) = {"fin_pll", "fout_bpll"}; 302 PNAME(mout_cpll_p) = {"fin_pll", "fout_cpll"}; 303 PNAME(mout_dpll_p) = {"fin_pll", "fout_dpll"}; 304 PNAME(mout_epll_p) = {"fin_pll", "fout_epll"}; 305 PNAME(mout_ipll_p) = {"fin_pll", "fout_ipll"}; 306 PNAME(mout_kpll_ [all...] |
H A D | clk-exynosautov9.c | 366 PNAME(mout_shared0_pll_p) = { "oscclk", "fout_shared0_pll" }; 367 PNAME(mout_shared1_pll_p) = { "oscclk", "fout_shared1_pll" }; 368 PNAME(mout_shared2_pll_p) = { "oscclk", "fout_shared2_pll" }; 369 PNAME(mout_shared3_pll_p) = { "oscclk", "fout_shared3_pll" }; 370 PNAME(mout_shared4_pll_p) = { "oscclk", "fout_shared4_pll" }; 372 PNAME(mout_clkcmu_cmu_boost_p) = { "dout_shared2_div3", "dout_shared1_div4", 374 PNAME(mout_clkcmu_cmu_cmuref_p) = { "oscclk", "dout_cmu_boost" }; 375 PNAME(mout_clkcmu_acc_bus_p) = { "dout_shared1_div3", "dout_shared2_div3", 377 PNAME(mout_clkcmu_apm_bus_p) = { "dout_shared2_div3", "dout_shared1_div4", 379 PNAME(mout_clkcmu_aud_cpu_ [all...] |
H A D | clk-exynos850.c | 218 PNAME(mout_shared0_pll_p) = { "oscclk", "fout_shared0_pll" }; 219 PNAME(mout_shared1_pll_p) = { "oscclk", "fout_shared1_pll" }; 220 PNAME(mout_mmc_pll_p) = { "oscclk", "fout_mmc_pll" }; 222 PNAME(mout_clkcmu_apm_bus_p) = { "dout_shared0_div4", "pll_shared1_div4" }; 224 PNAME(mout_aud_p) = { "fout_shared1_pll", "dout_shared0_div2", 227 PNAME(mout_core_bus_p) = { "dout_shared1_div2", "dout_shared0_div3", 229 PNAME(mout_core_cci_p) = { "dout_shared0_div2", "dout_shared1_div2", 231 PNAME(mout_core_mmc_embd_p) = { "oscclk", "dout_shared0_div2", 235 PNAME(mout_core_sss_p) = { "dout_shared0_div3", "dout_shared1_div3", 238 PNAME(mout_g3d_switch_ [all...] |
H A D | clk-exynos4.c | 283 PNAME(mout_apll_p) = { "fin_pll", "fout_apll", }; 284 PNAME(mout_mpll_p) = { "fin_pll", "fout_mpll", }; 285 PNAME(mout_epll_p) = { "fin_pll", "fout_epll", }; 286 PNAME(mout_vpllsrc_p) = { "fin_pll", "sclk_hdmi24m", }; 287 PNAME(mout_vpll_p) = { "fin_pll", "fout_vpll", }; 288 PNAME(sclk_evpll_p) = { "sclk_epll", "sclk_vpll", }; 289 PNAME(mout_mfc_p) = { "mout_mfc0", "mout_mfc1", }; 290 PNAME(mout_g3d_p) = { "mout_g3d0", "mout_g3d1", }; 291 PNAME(mout_g2d_p) = { "mout_g2d0", "mout_g2d1", }; 292 PNAME(mout_hdmi_ [all...] |
H A D | clk-exynos5433.c | 213 PNAME(mout_aud_pll_p) = { "oscclk", "fout_aud_pll", }; 214 PNAME(mout_isp_pll_p) = { "oscclk", "fout_isp_pll", }; 215 PNAME(mout_aud_pll_user_p) = { "oscclk", "mout_aud_pll", }; 216 PNAME(mout_mphy_pll_user_p) = { "oscclk", "sclk_mphy_pll", }; 217 PNAME(mout_mfc_pll_user_p) = { "oscclk", "sclk_mfc_pll", }; 218 PNAME(mout_bus_pll_user_p) = { "oscclk", "sclk_bus_pll", }; 219 PNAME(mout_bus_pll_user_t_p) = { "oscclk", "mout_bus_pll_user", }; 220 PNAME(mout_mphy_pll_user_t_p) = { "oscclk", "mout_mphy_pll_user", }; 222 PNAME(mout_bus_mfc_pll_user_p) = { "mout_bus_pll_user", "mout_mfc_pll_user",}; 223 PNAME(mout_mfc_bus_pll_user_ [all...] |
/kernel/linux/linux-6.6/drivers/clk/rockchip/ |
H A D | clk-rk3568.c | 213 PNAME(mux_pll_p) = { "xin24m" }; 214 PNAME(mux_usb480m_p) = { "xin24m", "usb480m_phy", "clk_rtc_32k" }; 215 PNAME(mux_armclk_p) = { "apll", "gpll" }; 216 PNAME(clk_i2s0_8ch_tx_p) = { "clk_i2s0_8ch_tx_src", "clk_i2s0_8ch_tx_frac", "i2s0_mclkin", "xin_osc0_half" }; 217 PNAME(clk_i2s0_8ch_rx_p) = { "clk_i2s0_8ch_rx_src", "clk_i2s0_8ch_rx_frac", "i2s0_mclkin", "xin_osc0_half" }; 218 PNAME(clk_i2s1_8ch_tx_p) = { "clk_i2s1_8ch_tx_src", "clk_i2s1_8ch_tx_frac", "i2s1_mclkin", "xin_osc0_half" }; 219 PNAME(clk_i2s1_8ch_rx_p) = { "clk_i2s1_8ch_rx_src", "clk_i2s1_8ch_rx_frac", "i2s1_mclkin", "xin_osc0_half" }; 220 PNAME(clk_i2s2_2ch_p) = { "clk_i2s2_2ch_src", "clk_i2s2_2ch_frac", "i2s2_mclkin", "xin_osc0_half "}; 221 PNAME(clk_i2s3_2ch_tx_p) = { "clk_i2s3_2ch_tx_src", "clk_i2s3_2ch_tx_frac", "i2s3_mclkin", "xin_osc0_half" }; 222 PNAME(clk_i2s3_2ch_rx_ [all...] |
H A D | clk-rk3308.c | 122 PNAME(mux_pll_p) = { "xin24m" }; 123 PNAME(mux_usb480m_p) = { "xin24m", "usb480m_phy", "clk_rtc32k" }; 124 PNAME(mux_armclk_p) = { "apll_core", "vpll0_core", "vpll1_core" }; 125 PNAME(mux_dpll_vpll0_p) = { "dpll", "vpll0" }; 126 PNAME(mux_dpll_vpll0_xin24m_p) = { "dpll", "vpll0", "xin24m" }; 127 PNAME(mux_dpll_vpll0_vpll1_p) = { "dpll", "vpll0", "vpll1" }; 128 PNAME(mux_dpll_vpll0_vpll1_xin24m_p) = { "dpll", "vpll0", "vpll1", "xin24m" }; 129 PNAME(mux_dpll_vpll0_vpll1_usb480m_xin24m_p) = { "dpll", "vpll0", "vpll1", "usb480m", "xin24m" }; 130 PNAME(mux_vpll0_vpll1_p) = { "vpll0", "vpll1" }; 131 PNAME(mux_vpll0_vpll1_xin24m_ [all...] |
H A D | clk-rk3228.c | 132 PNAME(mux_pll_p) = { "clk_24m", "xin24m" }; 134 PNAME(mux_ddrphy_p) = { "dpll_ddr", "gpll_ddr", "apll_ddr" }; 135 PNAME(mux_armclk_p) = { "apll_core", "gpll_core", "dpll_core" }; 136 PNAME(mux_usb480m_phy_p) = { "usb480m_phy0", "usb480m_phy1" }; 137 PNAME(mux_usb480m_p) = { "usb480m_phy", "xin24m" }; 138 PNAME(mux_hdmiphy_p) = { "hdmiphy_phy", "xin24m" }; 139 PNAME(mux_aclk_cpu_src_p) = { "cpll_aclk_cpu", "gpll_aclk_cpu", "hdmiphy_aclk_cpu" }; 141 PNAME(mux_pll_src_4plls_p) = { "cpll", "gpll", "hdmiphy", "usb480m" }; 142 PNAME(mux_pll_src_3plls_p) = { "cpll", "gpll", "hdmiphy" }; 143 PNAME(mux_pll_src_2plls_ [all...] |
H A D | clk-rk3588.c | 444 PNAME(mux_pll_p) = { "xin24m", "xin32k" }; 445 PNAME(mux_armclkl_p) = { "xin24m", "gpll", "lpll" }; 446 PNAME(mux_armclkb01_p) = { "xin24m", "gpll", "b0pll",}; 447 PNAME(mux_armclkb23_p) = { "xin24m", "gpll", "b1pll",}; 448 PNAME(b0pll_b1pll_lpll_gpll_p) = { "b0pll", "b1pll", "lpll", "gpll" }; 449 PNAME(gpll_24m_p) = { "gpll", "xin24m" }; 450 PNAME(gpll_aupll_p) = { "gpll", "aupll" }; 451 PNAME(gpll_lpll_p) = { "gpll", "lpll" }; 452 PNAME(gpll_cpll_p) = { "gpll", "cpll" }; 453 PNAME(gpll_spll_ [all...] |
H A D | clk-px30.c | 137 PNAME(mux_pll_p) = { "xin24m"}; 138 PNAME(mux_usb480m_p) = { "xin24m", "usb480m_phy", "clk_rtc32k_pmu" }; 139 PNAME(mux_armclk_p) = { "apll_core", "gpll_core" }; 140 PNAME(mux_ddrphy_p) = { "dpll_ddr", "gpll_ddr" }; 141 PNAME(mux_ddrstdby_p) = { "clk_ddrphy1x", "clk_stdby_2wrap" }; 142 PNAME(mux_4plls_p) = { "gpll", "dummy_cpll", "usb480m", "npll" }; 143 PNAME(mux_cpll_npll_p) = { "cpll", "npll" }; 144 PNAME(mux_npll_cpll_p) = { "npll", "cpll" }; 145 PNAME(mux_gpll_cpll_p) = { "gpll", "dummy_cpll" }; 146 PNAME(mux_gpll_npll_ [all...] |
H A D | clk-rv1108.c | 119 PNAME(mux_pll_p) = { "xin24m", "xin24m"}; 120 PNAME(mux_ddrphy_p) = { "dpll_ddr", "gpll_ddr", "apll_ddr" }; 121 PNAME(mux_armclk_p) = { "apll_core", "gpll_core", "dpll_core" }; 122 PNAME(mux_usb480m_pre_p) = { "usbphy", "xin24m" }; 123 PNAME(mux_hdmiphy_phy_p) = { "hdmiphy", "xin24m" }; 124 PNAME(mux_dclk_hdmiphy_pre_p) = { "dclk_hdmiphy_src_gpll", "dclk_hdmiphy_src_dpll" }; 125 PNAME(mux_pll_src_4plls_p) = { "dpll", "gpll", "hdmiphy", "usb480m" }; 126 PNAME(mux_pll_src_2plls_p) = { "dpll", "gpll" }; 127 PNAME(mux_pll_src_apll_gpll_p) = { "apll", "gpll" }; 128 PNAME(mux_aclk_peri_src_ [all...] |
H A D | clk-rv1126.c | 145 PNAME(mux_pll_p) = { "xin24m" }; 146 PNAME(mux_rtc32k_p) = { "clk_pmupvtm_divout", "xin32k", "clk_osc0_div32k" }; 147 PNAME(mux_wifi_p) = { "clk_wifi_osc0", "clk_wifi_div" }; 148 PNAME(mux_gpll_usb480m_cpll_xin24m_p) = { "gpll", "usb480m", "cpll", "xin24m" }; 149 PNAME(mux_uart1_p) = { "sclk_uart1_div", "sclk_uart1_fracdiv", "xin24m" }; 150 PNAME(mux_xin24m_gpll_p) = { "xin24m", "gpll" }; 151 PNAME(mux_gpll_xin24m_p) = { "gpll", "xin24m" }; 152 PNAME(mux_xin24m_32k_p) = { "xin24m", "clk_rtc32k" }; 153 PNAME(mux_usbphy_otg_ref_p) = { "clk_ref12m", "xin_osc0_div2_usbphyref_otg" }; 154 PNAME(mux_usbphy_host_ref_ [all...] |
/kernel/linux/linux-5.10/drivers/clk/rockchip/ |
H A D | clk-rk3308.c | 121 PNAME(mux_pll_p) = { "xin24m" }; 122 PNAME(mux_usb480m_p) = { "xin24m", "usb480m_phy", "clk_rtc32k" }; 123 PNAME(mux_armclk_p) = { "apll_core", "vpll0_core", "vpll1_core" }; 124 PNAME(mux_dpll_vpll0_p) = { "dpll", "vpll0" }; 125 PNAME(mux_dpll_vpll0_xin24m_p) = { "dpll", "vpll0", "xin24m" }; 126 PNAME(mux_dpll_vpll0_vpll1_p) = { "dpll", "vpll0", "vpll1" }; 127 PNAME(mux_dpll_vpll0_vpll1_xin24m_p) = { "dpll", "vpll0", "vpll1", "xin24m" }; 128 PNAME(mux_dpll_vpll0_vpll1_usb480m_xin24m_p) = { "dpll", "vpll0", "vpll1", "usb480m", "xin24m" }; 129 PNAME(mux_vpll0_vpll1_p) = { "vpll0", "vpll1" }; 130 PNAME(mux_vpll0_vpll1_xin24m_ [all...] |
H A D | clk-rk3228.c | 131 PNAME(mux_pll_p) = { "clk_24m", "xin24m" }; 133 PNAME(mux_ddrphy_p) = { "dpll_ddr", "gpll_ddr", "apll_ddr" }; 134 PNAME(mux_armclk_p) = { "apll_core", "gpll_core", "dpll_core" }; 135 PNAME(mux_usb480m_phy_p) = { "usb480m_phy0", "usb480m_phy1" }; 136 PNAME(mux_usb480m_p) = { "usb480m_phy", "xin24m" }; 137 PNAME(mux_hdmiphy_p) = { "hdmiphy_phy", "xin24m" }; 138 PNAME(mux_aclk_cpu_src_p) = { "cpll_aclk_cpu", "gpll_aclk_cpu", "hdmiphy_aclk_cpu" }; 140 PNAME(mux_pll_src_4plls_p) = { "cpll", "gpll", "hdmiphy", "usb480m" }; 141 PNAME(mux_pll_src_3plls_p) = { "cpll", "gpll", "hdmiphy" }; 142 PNAME(mux_pll_src_2plls_ [all...] |
H A D | clk-px30.c | 136 PNAME(mux_pll_p) = { "xin24m"}; 137 PNAME(mux_usb480m_p) = { "xin24m", "usb480m_phy", "clk_rtc32k_pmu" }; 138 PNAME(mux_armclk_p) = { "apll_core", "gpll_core" }; 139 PNAME(mux_ddrphy_p) = { "dpll_ddr", "gpll_ddr" }; 140 PNAME(mux_ddrstdby_p) = { "clk_ddrphy1x", "clk_stdby_2wrap" }; 141 PNAME(mux_4plls_p) = { "gpll", "dummy_cpll", "usb480m", "npll" }; 142 PNAME(mux_cpll_npll_p) = { "cpll", "npll" }; 143 PNAME(mux_npll_cpll_p) = { "npll", "cpll" }; 144 PNAME(mux_gpll_cpll_p) = { "gpll", "dummy_cpll" }; 145 PNAME(mux_gpll_npll_ [all...] |
H A D | clk-rv1108.c | 118 PNAME(mux_pll_p) = { "xin24m", "xin24m"}; 119 PNAME(mux_ddrphy_p) = { "dpll_ddr", "gpll_ddr", "apll_ddr" }; 120 PNAME(mux_armclk_p) = { "apll_core", "gpll_core", "dpll_core" }; 121 PNAME(mux_usb480m_pre_p) = { "usbphy", "xin24m" }; 122 PNAME(mux_hdmiphy_phy_p) = { "hdmiphy", "xin24m" }; 123 PNAME(mux_dclk_hdmiphy_pre_p) = { "dclk_hdmiphy_src_gpll", "dclk_hdmiphy_src_dpll" }; 124 PNAME(mux_pll_src_4plls_p) = { "dpll", "gpll", "hdmiphy", "usb480m" }; 125 PNAME(mux_pll_src_2plls_p) = { "dpll", "gpll" }; 126 PNAME(mux_pll_src_apll_gpll_p) = { "apll", "gpll" }; 127 PNAME(mux_aclk_peri_src_ [all...] |
/kernel/linux/linux-5.10/drivers/clk/zte/ |
H A D | clk-zx296718.c | 124 PNAME(osc) = { 129 PNAME(dbg_wclk_p) = { 136 PNAME(a72_coreclk_p) = { 147 PNAME(cpu_periclk_p) = { 158 PNAME(a53_coreclk_p) = { 169 PNAME(sec_wclk_p) = { 180 PNAME(sd_nand_wclk_p) = { 191 PNAME(emmc_wclk_p) = { 202 PNAME(clk32_p) = { 207 PNAME(usb_ref24m_ [all...] |