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Searched refs:IH_RB_WPTR (Results 1 - 25 of 33) sorted by relevance

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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A Diceland_ih.c134 /* Ring Buffer write pointer writeback. If enabled, IH_RB_WPTR register value is written to memory */ in iceland_ih_irq_init()
196 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in iceland_ih_get_wptr()
202 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in iceland_ih_get_wptr()
205 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in iceland_ih_get_wptr()
H A Dcz_ih.c134 /* Ring Buffer write pointer writeback. If enabled, IH_RB_WPTR register value is written to memory */ in cz_ih_irq_init()
196 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in cz_ih_get_wptr()
202 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in cz_ih_get_wptr()
205 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in cz_ih_get_wptr()
H A Dtonga_ih.c128 /* Ring Buffer write pointer writeback. If enabled, IH_RB_WPTR register value is written to memory */ in tonga_ih_irq_init()
198 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in tonga_ih_get_wptr()
204 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in tonga_ih_get_wptr()
207 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in tonga_ih_get_wptr()
H A Dsi_ih.c57 WREG32(IH_RB_WPTR, 0); in si_ih_disable_interrupts()
88 WREG32(IH_RB_WPTR, 0); in si_ih_irq_init()
H A Dvega10_ih.c177 /* Ring Buffer write pointer writeback. If enabled, IH_RB_WPTR register in vega10_ih_rb_cntl()
382 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in vega10_ih_get_wptr()
397 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in vega10_ih_get_wptr()
400 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in vega10_ih_get_wptr()
H A Dnavi10_ih.c222 /* Ring Buffer write pointer writeback. If enabled, IH_RB_WPTR register in navi10_ih_rb_cntl()
456 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in navi10_ih_get_wptr()
469 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in navi10_ih_get_wptr()
471 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in navi10_ih_get_wptr()
H A Dsid.h664 #define IH_RB_WPTR 0xF83 macro
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A Diceland_ih.c134 /* Ring Buffer write pointer writeback. If enabled, IH_RB_WPTR register value is written to memory */ in iceland_ih_irq_init()
197 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in iceland_ih_get_wptr()
203 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in iceland_ih_get_wptr()
206 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in iceland_ih_get_wptr()
H A Dcz_ih.c134 /* Ring Buffer write pointer writeback. If enabled, IH_RB_WPTR register value is written to memory */ in cz_ih_irq_init()
197 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in cz_ih_get_wptr()
203 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in cz_ih_get_wptr()
206 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in cz_ih_get_wptr()
H A Dtonga_ih.c128 /* Ring Buffer write pointer writeback. If enabled, IH_RB_WPTR register value is written to memory */ in tonga_ih_irq_init()
199 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in tonga_ih_get_wptr()
205 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in tonga_ih_get_wptr()
208 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in tonga_ih_get_wptr()
H A Dvega10_ih.c169 /* Ring Buffer write pointer writeback. If enabled, IH_RB_WPTR register in vega10_ih_rb_cntl()
349 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in vega10_ih_get_wptr()
357 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in vega10_ih_get_wptr()
360 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in vega10_ih_get_wptr()
H A Dsi_ih.c57 WREG32(IH_RB_WPTR, 0); in si_ih_disable_interrupts()
88 WREG32(IH_RB_WPTR, 0); in si_ih_irq_init()
H A Dih_v6_0.c198 /* Ring Buffer write pointer writeback. If enabled, IH_RB_WPTR register in ih_v6_0_rb_cntl()
400 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in ih_v6_0_get_wptr()
404 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in ih_v6_0_get_wptr()
406 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in ih_v6_0_get_wptr()
H A Dih_v6_1.c198 /* Ring Buffer write pointer writeback. If enabled, IH_RB_WPTR register in ih_v6_1_rb_cntl()
400 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in ih_v6_1_get_wptr()
404 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in ih_v6_1_get_wptr()
406 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in ih_v6_1_get_wptr()
H A Dnavi10_ih.c224 /* Ring Buffer write pointer writeback. If enabled, IH_RB_WPTR register in navi10_ih_rb_cntl()
420 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in navi10_ih_get_wptr()
428 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in navi10_ih_get_wptr()
430 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in navi10_ih_get_wptr()
H A Dvega20_ih.c178 /* Ring Buffer write pointer writeback. If enabled, IH_RB_WPTR register in vega20_ih_rb_cntl()
397 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in vega20_ih_get_wptr()
405 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in vega20_ih_get_wptr()
408 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in vega20_ih_get_wptr()
H A Dsid.h664 #define IH_RB_WPTR 0xF83 macro
/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
H A Dr600.c3616 WREG32(IH_RB_WPTR, 0); in r600_disable_interrupts()
3728 WREG32(IH_RB_WPTR, 0); in r600_irq_init()
4047 wptr = RREG32(IH_RB_WPTR); in r600_get_ih_wptr()
4110 RREG32(IH_RB_WPTR); in r600_irq_process()
H A Dcikd.h811 #define IH_RB_WPTR 0x3e0c macro
H A Dsid.h661 #define IH_RB_WPTR 0x3e0c macro
H A Dsi.c5947 WREG32(IH_RB_WPTR, 0); in si_disable_interrupts()
6033 WREG32(IH_RB_WPTR, 0); in si_irq_init()
6221 wptr = RREG32(IH_RB_WPTR); in si_get_ih_wptr()
/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/
H A Dr600.c3613 WREG32(IH_RB_WPTR, 0); in r600_disable_interrupts()
3725 WREG32(IH_RB_WPTR, 0); in r600_irq_init()
4044 wptr = RREG32(IH_RB_WPTR); in r600_get_ih_wptr()
4107 RREG32(IH_RB_WPTR); in r600_irq_process()
H A Dcikd.h811 #define IH_RB_WPTR 0x3e0c macro
H A Dsid.h661 #define IH_RB_WPTR 0x3e0c macro
H A Dsi.c5942 WREG32(IH_RB_WPTR, 0); in si_disable_interrupts()
6028 WREG32(IH_RB_WPTR, 0); in si_irq_init()
6216 wptr = RREG32(IH_RB_WPTR); in si_get_ih_wptr()

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