Home
last modified time | relevance | path

Searched refs:HDA_DSP_HDA_BAR (Results 1 - 23 of 23) sorted by relevance

/kernel/linux/linux-6.6/sound/soc/sof/intel/
H A Dhda-ctrl.c40 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_GCTL, in hda_dsp_ctrl_link_reset()
46 gctl = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_GCTL); in hda_dsp_ctrl_link_reset()
76 offset = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_LLCH); in hda_dsp_ctrl_get_caps()
82 cap = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, offset); in hda_dsp_ctrl_get_caps()
172 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, HDA_VS_INTEL_EM2, in hda_dsp_ctrl_clock_power_gating()
217 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, in hda_dsp_ctrl_init_chip()
223 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, SOF_HDA_WAKESTS, in hda_dsp_ctrl_init_chip()
229 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS, in hda_dsp_ctrl_init_chip()
235 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL, in hda_dsp_ctrl_init_chip()
241 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, SOF_HDA_ADSP_DPLBAS in hda_dsp_ctrl_init_chip()
[all...]
H A Dhda-stream.c228 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, in hda_dsp_stream_get()
274 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, HDA_VS_INTEL_EM2, in hda_dsp_stream_put()
295 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, sd_offset, SOF_STREAM_SD_OFFSET_CRST, in hda_dsp_stream_reset()
298 val = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, sd_offset); in hda_dsp_stream_reset()
310 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, sd_offset, SOF_STREAM_SD_OFFSET_CRST, 0x0); in hda_dsp_stream_reset()
315 val = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, sd_offset); in hda_dsp_stream_reset()
346 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL, in hda_dsp_stream_trigger()
350 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, in hda_dsp_stream_trigger()
358 HDA_DSP_HDA_BAR, in hda_dsp_stream_trigger()
374 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, in hda_dsp_stream_trigger()
[all...]
H A Dhda-loader.c231 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL, in cl_trigger()
235 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, in cl_trigger()
259 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, sd_offset, in hda_cl_cleanup()
267 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, in hda_cl_cleanup()
269 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, in hda_cl_cleanup()
272 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, sd_offset, 0); in hda_cl_cleanup()
329 original_gb = snd_sof_dsp_read8(sdev, HDA_DSP_HDA_BAR, HDA_VS_INTEL_LTRP) & in hda_dsp_cl_boot_firmware_iccmax()
359 snd_sof_dsp_update8(sdev, HDA_DSP_HDA_BAR, HDA_VS_INTEL_LTRP, in hda_dsp_cl_boot_firmware_iccmax()
H A Dhda-dsp.c362 while (snd_sof_dsp_read8(sdev, HDA_DSP_HDA_BAR, chip->d0i3_offset) & in hda_dsp_wait_d0i3c_done()
399 snd_sof_dsp_update8(sdev, HDA_DSP_HDA_BAR, chip->d0i3_offset, in hda_dsp_update_d0i3c_register()
415 reg = snd_sof_dsp_read8(sdev, HDA_DSP_HDA_BAR, chip->d0i3_offset); in hda_dsp_update_d0i3c_register()
821 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, in hda_dsp_resume()
917 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, HDA_VS_INTEL_EM2, in hda_dsp_suspend()
958 val = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, in hda_dsp_check_for_dma_streams()
H A Dhda.c221 res.mmio_base = sdev->bar[HDA_DSP_HDA_BAR]; in hda_sdw_probe()
755 intsts = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS); in hda_ipc_irq_dump()
756 intctl = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL); in hda_ipc_irq_dump()
758 rirbsts = snd_sof_dsp_read8(sdev, HDA_DSP_HDA_BAR, AZX_REG_RIRBSTS); in hda_ipc_irq_dump()
847 sdev->bar[HDA_DSP_HDA_BAR] = bus->remap_addr; in hda_init()
1069 if (snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS) & in hda_dsp_interrupt_handler()
1073 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, in hda_dsp_interrupt_handler()
1113 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, in hda_dsp_interrupt_thread()
1335 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL, in hda_dsp_remove()
H A Dapl.c25 {"hda", HDA_DSP_HDA_BAR, 0, 0x4000, SOF_DEBUGFS_ACCESS_ALWAYS},
H A Dskl.c36 {"hda", HDA_DSP_HDA_BAR, 0, 0x4000},
H A Dlnl.c26 {"hda", HDA_DSP_HDA_BAR, 0, 0x4000, SOF_DEBUGFS_ACCESS_ALWAYS},
H A Dmtl.c23 {"hda", HDA_DSP_HDA_BAR, 0, 0x4000, SOF_DEBUGFS_ACCESS_ALWAYS},
622 llp_l = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, MTL_PPLCLLPL(hstream->index)); in mtl_dsp_get_stream_hda_link_position()
623 llp_u = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, MTL_PPLCLLPU(hstream->index)); in mtl_dsp_get_stream_hda_link_position()
H A Dicl.c25 {"hda", HDA_DSP_HDA_BAR, 0, 0x4000, SOF_DEBUGFS_ACCESS_ALWAYS},
H A Dtgl.c20 {"hda", HDA_DSP_HDA_BAR, 0, 0x4000, SOF_DEBUGFS_ACCESS_ALWAYS},
H A Dcnl.c28 {"hda", HDA_DSP_HDA_BAR, 0, 0x4000, SOF_DEBUGFS_ACCESS_ALWAYS},
H A Dhda.h152 #define HDA_DSP_HDA_BAR 0 macro
/kernel/linux/linux-5.10/sound/soc/sof/intel/
H A Dhda-ctrl.c45 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_GCTL, in hda_dsp_ctrl_link_reset()
51 gctl = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_GCTL); in hda_dsp_ctrl_link_reset()
81 offset = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_LLCH); in hda_dsp_ctrl_get_caps()
87 cap = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, offset); in hda_dsp_ctrl_get_caps()
175 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, HDA_VS_INTEL_EM2, in hda_dsp_ctrl_clock_power_gating()
249 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, in hda_dsp_ctrl_init_chip()
255 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, SOF_HDA_WAKESTS, in hda_dsp_ctrl_init_chip()
264 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS, in hda_dsp_ctrl_init_chip()
273 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL, in hda_dsp_ctrl_init_chip()
279 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, SOF_HDA_ADSP_DPLBAS in hda_dsp_ctrl_init_chip()
[all...]
H A Dhda-stream.c198 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, in hda_dsp_stream_get()
236 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, in hda_dsp_stream_put()
263 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL, in hda_dsp_stream_trigger()
267 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, in hda_dsp_stream_trigger()
275 HDA_DSP_HDA_BAR, in hda_dsp_stream_trigger()
293 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, in hda_dsp_stream_trigger()
298 ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_HDA_BAR, in hda_dsp_stream_trigger()
311 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, sd_offset + in hda_dsp_stream_trigger()
316 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL, in hda_dsp_stream_trigger()
347 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, in hda_dsp_iccmax_stream_hw_params()
[all...]
H A Dhda-loader.c193 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL, in cl_trigger()
197 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, in cl_trigger()
221 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, sd_offset, in cl_cleanup()
229 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, in cl_cleanup()
231 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, in cl_cleanup()
234 snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, sd_offset, 0); in cl_cleanup()
H A Dhda-pcm.c179 pos = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, in hda_dsp_pcm_pointer()
197 snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, in hda_dsp_pcm_pointer()
H A Dhda.c490 intsts = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS); in hda_ipc_irq_dump()
491 intctl = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL); in hda_ipc_irq_dump()
556 sdev->bar[HDA_DSP_HDA_BAR] = bus->remap_addr; in hda_init()
696 if (snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS) & in hda_dsp_interrupt_handler()
700 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, in hda_dsp_interrupt_handler()
730 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, in hda_dsp_interrupt_thread()
933 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL, in hda_dsp_remove()
H A Dapl.c23 {"hda", HDA_DSP_HDA_BAR, 0, 0x4000, SOF_DEBUGFS_ACCESS_ALWAYS},
H A Dtgl.c18 {"hda", HDA_DSP_HDA_BAR, 0, 0x4000, SOF_DEBUGFS_ACCESS_ALWAYS},
H A Dhda-dsp.c763 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, in hda_dsp_resume()
858 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, in hda_dsp_suspend()
H A Dcnl.c24 {"hda", HDA_DSP_HDA_BAR, 0, 0x4000, SOF_DEBUGFS_ACCESS_ALWAYS},
H A Dhda.h150 #define HDA_DSP_HDA_BAR 0 macro

Completed in 17 milliseconds