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Searched refs:CRTC (Results 1 - 25 of 47) sorted by relevance

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/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/dispnv04/
H A Dcrtc.c60 crtcstate->CRTC[index]); in crtc_wr_cio_state()
69 regp->CRTC[NV_CIO_CRE_CSB] = nv_crtc->saturation = level; in nv_crtc_set_digital_vibrance()
71 regp->CRTC[NV_CIO_CRE_CSB] = 0x80; in nv_crtc_set_digital_vibrance()
72 regp->CRTC[NV_CIO_CRE_5B] = nv_crtc->saturation << 2; in nv_crtc_set_digital_vibrance()
183 NV_DEBUG(drm, "Setting dpms mode %d on CRTC %d\n", mode, in nv_crtc_dpms()
343 * CRTC in nv_crtc_mode_set_vga()
345 regp->CRTC[NV_CIO_CR_HDT_INDEX] = horizTotal; in nv_crtc_mode_set_vga()
346 regp->CRTC[NV_CIO_CR_HDE_INDEX] = horizDisplay; in nv_crtc_mode_set_vga()
347 regp->CRTC[NV_CIO_CR_HBS_INDEX] = horizBlankStart; in nv_crtc_mode_set_vga()
348 regp->CRTC[NV_CIO_CR_HBE_INDE in nv_crtc_mode_set_vga()
[all...]
H A Dcursor.c34 crtcstate->CRTC[index]); in crtc_wr_cio_state()
45 regp->CRTC[NV_CIO_CRE_HCUR_ADDR0_INDEX] = in nv04_cursor_set_offset()
48 regp->CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX] = in nv04_cursor_set_offset()
51 regp->CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX] |= in nv04_cursor_set_offset()
53 regp->CRTC[NV_CIO_CRE_HCUR_ADDR2_INDEX] = offset >> 24; in nv04_cursor_set_offset()
H A Dtvnv04.c112 state->CRTC[NV_CIO_CRE_49] |= 0x10; in nv04_tv_bind()
114 state->CRTC[NV_CIO_CRE_49] &= ~0x10; in nv04_tv_bind()
117 state->CRTC[NV_CIO_CRE_LCD__INDEX]); in nv04_tv_bind()
119 state->CRTC[NV_CIO_CRE_49]); in nv04_tv_bind()
152 * they might be useful if we ever allow a CRTC to drive in nv04_tv_mode_set()
174 NV_DEBUG(drm, "Output %s is running on CRTC %d using output %c\n", in nv04_tv_commit()
H A Ddisp.h23 uint8_t CRTC[0xa0]; member
H A Dtvnv17.c403 uint8_t *cr_lcd = &nv04_display(dev)->mode_reg.crtc_reg[head].CRTC[ in nv17_tv_prepare()
469 regs->CRTC[NV_CIO_CRE_53] = 0x40; /* FP_HTIMING */ in nv17_tv_mode_set()
470 regs->CRTC[NV_CIO_CRE_54] = 0; /* FP_VTIMING */ in nv17_tv_mode_set()
601 NV_INFO(drm, "Output %s is running on CRTC %d using output %c\n", in nv17_tv_commit()
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/dispnv04/
H A Dcrtc.c60 crtcstate->CRTC[index]); in crtc_wr_cio_state()
69 regp->CRTC[NV_CIO_CRE_CSB] = nv_crtc->saturation = level; in nv_crtc_set_digital_vibrance()
71 regp->CRTC[NV_CIO_CRE_CSB] = 0x80; in nv_crtc_set_digital_vibrance()
72 regp->CRTC[NV_CIO_CRE_5B] = nv_crtc->saturation << 2; in nv_crtc_set_digital_vibrance()
183 NV_DEBUG(drm, "Setting dpms mode %d on CRTC %d\n", mode, in nv_crtc_dpms()
343 * CRTC in nv_crtc_mode_set_vga()
345 regp->CRTC[NV_CIO_CR_HDT_INDEX] = horizTotal; in nv_crtc_mode_set_vga()
346 regp->CRTC[NV_CIO_CR_HDE_INDEX] = horizDisplay; in nv_crtc_mode_set_vga()
347 regp->CRTC[NV_CIO_CR_HBS_INDEX] = horizBlankStart; in nv_crtc_mode_set_vga()
348 regp->CRTC[NV_CIO_CR_HBE_INDE in nv_crtc_mode_set_vga()
[all...]
H A Dcursor.c34 crtcstate->CRTC[index]); in crtc_wr_cio_state()
45 regp->CRTC[NV_CIO_CRE_HCUR_ADDR0_INDEX] = in nv04_cursor_set_offset()
48 regp->CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX] = in nv04_cursor_set_offset()
51 regp->CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX] |= in nv04_cursor_set_offset()
53 regp->CRTC[NV_CIO_CRE_HCUR_ADDR2_INDEX] = offset >> 24; in nv04_cursor_set_offset()
H A Dtvnv04.c112 state->CRTC[NV_CIO_CRE_49] |= 0x10; in nv04_tv_bind()
114 state->CRTC[NV_CIO_CRE_49] &= ~0x10; in nv04_tv_bind()
117 state->CRTC[NV_CIO_CRE_LCD__INDEX]); in nv04_tv_bind()
119 state->CRTC[NV_CIO_CRE_49]); in nv04_tv_bind()
152 * they might be useful if we ever allow a CRTC to drive in nv04_tv_mode_set()
174 NV_DEBUG(drm, "Output %s is running on CRTC %d using output %c\n", in nv04_tv_commit()
H A Ddisp.h25 uint8_t CRTC[0xa0]; member
/kernel/linux/linux-5.10/drivers/video/fbdev/matrox/
H A Dmatroxfb_misc.c206 /* CRTC 0..7, 9, 16..19, 21, 22 are reprogrammed by Matrox Millennium code... Hope that by MGA1064 too */ in matroxfb_vgaHWinit()
304 hw->CRTC[0] = ht-4; in matroxfb_vgaHWinit()
305 hw->CRTC[1] = hd; in matroxfb_vgaHWinit()
306 hw->CRTC[2] = hd; in matroxfb_vgaHWinit()
307 hw->CRTC[3] = (hbe & 0x1F) | 0x80; in matroxfb_vgaHWinit()
308 hw->CRTC[4] = hs; in matroxfb_vgaHWinit()
309 hw->CRTC[5] = ((hbe & 0x20) << 2) | (he & 0x1F); in matroxfb_vgaHWinit()
310 hw->CRTC[6] = vt & 0xFF; in matroxfb_vgaHWinit()
311 hw->CRTC[7] = ((vt & 0x100) >> 8) | in matroxfb_vgaHWinit()
319 hw->CRTC[ in matroxfb_vgaHWinit()
[all...]
/kernel/linux/linux-6.6/drivers/video/fbdev/matrox/
H A Dmatroxfb_misc.c206 /* CRTC 0..7, 9, 16..19, 21, 22 are reprogrammed by Matrox Millennium code... Hope that by MGA1064 too */ in matroxfb_vgaHWinit()
304 hw->CRTC[0] = ht-4; in matroxfb_vgaHWinit()
305 hw->CRTC[1] = hd; in matroxfb_vgaHWinit()
306 hw->CRTC[2] = hd; in matroxfb_vgaHWinit()
307 hw->CRTC[3] = (hbe & 0x1F) | 0x80; in matroxfb_vgaHWinit()
308 hw->CRTC[4] = hs; in matroxfb_vgaHWinit()
309 hw->CRTC[5] = ((hbe & 0x20) << 2) | (he & 0x1F); in matroxfb_vgaHWinit()
310 hw->CRTC[6] = vt & 0xFF; in matroxfb_vgaHWinit()
311 hw->CRTC[7] = ((vt & 0x100) >> 8) | in matroxfb_vgaHWinit()
319 hw->CRTC[ in matroxfb_vgaHWinit()
[all...]
/kernel/linux/linux-5.10/drivers/video/fbdev/
H A Dneofb.c281 * CRTC Controller in vgaHWInit()
283 par->CRTC[0] = htotal - 5; in vgaHWInit()
284 par->CRTC[1] = (var->xres >> 3) - 1; in vgaHWInit()
285 par->CRTC[2] = (var->xres >> 3) - 1; in vgaHWInit()
286 par->CRTC[3] = ((htotal - 1) & 0x1F) | 0x80; in vgaHWInit()
287 par->CRTC[4] = ((var->xres + var->right_margin) >> 3); in vgaHWInit()
288 par->CRTC[5] = (((htotal - 1) & 0x20) << 2) in vgaHWInit()
290 par->CRTC[6] = (vtotal - 2) & 0xFF; in vgaHWInit()
291 par->CRTC[7] = (((vtotal - 2) & 0x100) >> 8) in vgaHWInit()
298 par->CRTC[ in vgaHWInit()
[all...]
/kernel/linux/linux-6.6/drivers/video/fbdev/
H A Dneofb.c282 * CRTC Controller in vgaHWInit()
284 par->CRTC[0] = htotal - 5; in vgaHWInit()
285 par->CRTC[1] = (var->xres >> 3) - 1; in vgaHWInit()
286 par->CRTC[2] = (var->xres >> 3) - 1; in vgaHWInit()
287 par->CRTC[3] = ((htotal - 1) & 0x1F) | 0x80; in vgaHWInit()
288 par->CRTC[4] = ((var->xres + var->right_margin) >> 3); in vgaHWInit()
289 par->CRTC[5] = (((htotal - 1) & 0x20) << 2) in vgaHWInit()
291 par->CRTC[6] = (vtotal - 2) & 0xFF; in vgaHWInit()
292 par->CRTC[7] = (((vtotal - 2) & 0x100) >> 8) in vgaHWInit()
299 par->CRTC[ in vgaHWInit()
[all...]
/kernel/linux/linux-5.10/drivers/video/fbdev/savage/
H A Dsavagefb_driver.c125 /* Ensure CRTC registers 0-7 are unlocked by clearing bit 7 or in vgaHWRestore()
126 CRTC[17] */ in vgaHWRestore()
127 VGAwCR(17, reg->CRTC[17] & ~0x80, par); in vgaHWRestore()
130 VGAwCR(i, reg->CRTC[i], par); in vgaHWRestore()
166 * CRTC Controller in vgaHWInit()
168 reg->CRTC[0x00] = (timings->HTotal >> 3) - 5; in vgaHWInit()
169 reg->CRTC[0x01] = (timings->HDisplay >> 3) - 1; in vgaHWInit()
170 reg->CRTC[0x02] = (timings->HSyncStart >> 3) - 1; in vgaHWInit()
171 reg->CRTC[0x03] = (((timings->HSyncEnd >> 3) - 1) & 0x1f) | 0x80; in vgaHWInit()
172 reg->CRTC[ in vgaHWInit()
[all...]
/kernel/linux/linux-6.6/drivers/video/fbdev/savage/
H A Dsavagefb_driver.c126 /* Ensure CRTC registers 0-7 are unlocked by clearing bit 7 or in vgaHWRestore()
127 CRTC[17] */ in vgaHWRestore()
128 VGAwCR(17, reg->CRTC[17] & ~0x80, par); in vgaHWRestore()
131 VGAwCR(i, reg->CRTC[i], par); in vgaHWRestore()
167 * CRTC Controller in vgaHWInit()
169 reg->CRTC[0x00] = (timings->HTotal >> 3) - 5; in vgaHWInit()
170 reg->CRTC[0x01] = (timings->HDisplay >> 3) - 1; in vgaHWInit()
171 reg->CRTC[0x02] = (timings->HSyncStart >> 3) - 1; in vgaHWInit()
172 reg->CRTC[0x03] = (((timings->HSyncEnd >> 3) - 1) & 0x1f) | 0x80; in vgaHWInit()
173 reg->CRTC[ in vgaHWInit()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_hwseq.h104 SRII(CRTC_H_BLANK_START_END, CRTC, 0),\
105 SRII(CRTC_H_BLANK_START_END, CRTC, 1),\
111 HWSEQ_PIXEL_RATE_REG_LIST(CRTC)
116 HWSEQ_PIXEL_RATE_REG_LIST(CRTC)
122 HWSEQ_PIXEL_RATE_REG_LIST(CRTC)
127 HWSEQ_PIXEL_RATE_REG_LIST(CRTC)
139 SRII(CRTC_H_BLANK_START_END, CRTC, 2), \
149 HWSEQ_PIXEL_RATE_REG_LIST(CRTC), \
150 HWSEQ_PHYPLL_REG_LIST(CRTC), \
162 HWSEQ_PIXEL_RATE_REG_LIST(CRTC), \
[all...]
H A Ddce_transform.h99 SRI(DCFE_MEM_LIGHT_SLEEP_CNTL, CRTC, id)
103 SRI(DCFE_MEM_PWR_CTRL, CRTC, id), \
104 SRI(DCFE_MEM_PWR_STATUS, CRTC, id)
164 SRI(DCFE_MEM_LIGHT_SLEEP_CNTL, CRTC, id), \
170 SRI(DCFE_MEM_LIGHT_SLEEP_CNTL, CRTC, id)
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/irq/dce120/
H A Dirq_service_dce120.c147 IRQ_REG_ENTRY(CRTC, reg_num,\
155 IRQ_REG_ENTRY(CRTC, reg_num,\
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/irq/dce120/
H A Dirq_service_dce120.c145 IRQ_REG_ENTRY(CRTC, reg_num,\
153 IRQ_REG_ENTRY(CRTC, reg_num,\
/kernel/linux/linux-5.10/drivers/usb/misc/sisusbvga/
H A Dsisusb_struct.h74 unsigned char CRTC[0x19]; member
/kernel/linux/linux-6.6/drivers/usb/misc/sisusbvga/
H A Dsisusb_struct.h74 unsigned char CRTC[0x19]; member
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_hwseq.h133 SRII(CRTC_H_BLANK_START_END, CRTC, 0),\
134 SRII(CRTC_H_BLANK_START_END, CRTC, 1),\
140 HWSEQ_PIXEL_RATE_REG_LIST(CRTC)
145 HWSEQ_PIXEL_RATE_REG_LIST(CRTC)
151 HWSEQ_PIXEL_RATE_REG_LIST(CRTC)
156 HWSEQ_PIXEL_RATE_REG_LIST(CRTC)
168 SRII(CRTC_H_BLANK_START_END, CRTC, 2), \
178 HWSEQ_PIXEL_RATE_REG_LIST(CRTC), \
179 HWSEQ_PHYPLL_REG_LIST(CRTC), \
191 HWSEQ_PIXEL_RATE_REG_LIST(CRTC), \
[all...]
H A Ddce_transform.h99 SRI(DCFE_MEM_LIGHT_SLEEP_CNTL, CRTC, id)
103 SRI(DCFE_MEM_PWR_CTRL, CRTC, id), \
104 SRI(DCFE_MEM_PWR_STATUS, CRTC, id)
164 SRI(DCFE_MEM_LIGHT_SLEEP_CNTL, CRTC, id), \
170 SRI(DCFE_MEM_LIGHT_SLEEP_CNTL, CRTC, id)
/kernel/linux/linux-5.10/include/video/
H A Dneomagic.h129 unsigned char CRTC[25]; /* Crtc Controller */ member
/kernel/linux/linux-6.6/include/video/
H A Dneomagic.h129 unsigned char CRTC[25]; /* Crtc Controller */ member

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