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Searched refs:ref_div (Results 1 - 25 of 75) sorted by relevance

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/kernel/linux/linux-5.10/arch/mips/ath79/
H A Dclock.c148 u32 ref_div; in ar933x_clocks_init() local
167 ref_div = 1; in ar933x_clocks_init()
182 ref_div = t; in ar933x_clocks_init()
205 ref_div * out_div * cpu_div); in ar933x_clocks_init()
207 ref_div * out_div * ddr_div); in ar933x_clocks_init()
209 ref_div * out_div * ahb_div); in ar933x_clocks_init()
212 static u32 __init ar934x_get_pll_freq(u32 ref, u32 ref_div, u32 nint, u32 nfrac, in ar934x_get_pll_freq() argument
220 do_div(t, ref_div); in ar934x_get_pll_freq()
225 do_div(t, ref_div * frac); in ar934x_get_pll_freq()
238 u32 pll, out_div, ref_div, nin in ar934x_clocks_init() local
356 u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv; qca953x_clocks_init() local
439 u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv; qca955x_clocks_init() local
522 u32 pll, out_div, ref_div, nint, hfrac, lfrac, clk_ctrl, postdiv; qca956x_clocks_init() local
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/kernel/linux/linux-6.6/arch/mips/ath79/
H A Dclock.c148 u32 ref_div; in ar933x_clocks_init() local
167 ref_div = 1; in ar933x_clocks_init()
182 ref_div = t; in ar933x_clocks_init()
205 ref_div * out_div * cpu_div); in ar933x_clocks_init()
207 ref_div * out_div * ddr_div); in ar933x_clocks_init()
209 ref_div * out_div * ahb_div); in ar933x_clocks_init()
212 static u32 __init ar934x_get_pll_freq(u32 ref, u32 ref_div, u32 nint, u32 nfrac, in ar934x_get_pll_freq() argument
220 do_div(t, ref_div); in ar934x_get_pll_freq()
225 do_div(t, ref_div * frac); in ar934x_get_pll_freq()
238 u32 pll, out_div, ref_div, nin in ar934x_clocks_init() local
356 u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv; qca953x_clocks_init() local
439 u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv; qca955x_clocks_init() local
522 u32 pll, out_div, ref_div, nint, hfrac, lfrac, clk_ctrl, postdiv; qca956x_clocks_init() local
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_pll.c78 * @ref_div: resulting reference divider
85 unsigned *fb_div, unsigned *ref_div) in amdgpu_pll_get_fb_ref_div()
91 *ref_div = min(max(DIV_ROUND_CLOSEST(den, post_div), 1u), ref_div_max); in amdgpu_pll_get_fb_ref_div()
92 *fb_div = DIV_ROUND_CLOSEST(nom * *ref_div * post_div, den); in amdgpu_pll_get_fb_ref_div()
96 *ref_div = DIV_ROUND_CLOSEST(*ref_div * fb_div_max, *fb_div); in amdgpu_pll_get_fb_ref_div()
112 * dot_clock = (ref_freq * feedback_div) / (ref_div * post_div)
127 unsigned ref_div_min, ref_div_max, ref_div; in amdgpu_pll_compute() local
202 ref_div_max, &fb_div, &ref_div); in amdgpu_pll_compute()
204 (ref_div * post_di in amdgpu_pll_compute()
83 amdgpu_pll_get_fb_ref_div(unsigned nom, unsigned den, unsigned post_div, unsigned fb_div_max, unsigned ref_div_max, unsigned *fb_div, unsigned *ref_div) amdgpu_pll_get_fb_ref_div() argument
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H A Datombios_crtc.c337 /* use recommended ref_div for ss */ in amdgpu_atombios_crtc_adjust_pll()
582 u32 ref_div, in amdgpu_atombios_crtc_program_pll()
609 args.v1.usRefDiv = cpu_to_le16(ref_div); in amdgpu_atombios_crtc_program_pll()
619 args.v2.usRefDiv = cpu_to_le16(ref_div); in amdgpu_atombios_crtc_program_pll()
629 args.v3.usRefDiv = cpu_to_le16(ref_div); in amdgpu_atombios_crtc_program_pll()
646 args.v5.ucRefDiv = ref_div; in amdgpu_atombios_crtc_program_pll()
676 args.v6.ucRefDiv = ref_div; in amdgpu_atombios_crtc_program_pll()
826 u32 ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0; in amdgpu_atombios_crtc_set_pll() local
855 &fb_div, &frac_fb_div, &ref_div, &post_div); in amdgpu_atombios_crtc_set_pll()
862 ref_div, fb_di in amdgpu_atombios_crtc_set_pll()
576 amdgpu_atombios_crtc_program_pll(struct drm_crtc *crtc, u32 crtc_id, int pll_id, u32 encoder_mode, u32 encoder_id, u32 clock, u32 ref_div, u32 fb_div, u32 frac_fb_div, u32 post_div, int bpc, bool ss_enabled, struct amdgpu_atom_ss *ss) amdgpu_atombios_crtc_program_pll() argument
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H A Datombios_crtc.h48 u32 ref_div,
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_pll.c79 * @ref_div: resulting reference divider
87 unsigned int *fb_div, unsigned int *ref_div) in amdgpu_pll_get_fb_ref_div()
97 *ref_div = min(max(DIV_ROUND_CLOSEST(den, post_div), 1u), ref_div_max); in amdgpu_pll_get_fb_ref_div()
98 *fb_div = DIV_ROUND_CLOSEST(nom * *ref_div * post_div, den); in amdgpu_pll_get_fb_ref_div()
102 *ref_div = DIV_ROUND_CLOSEST(*ref_div * fb_div_max, *fb_div); in amdgpu_pll_get_fb_ref_div()
120 * dot_clock = (ref_freq * feedback_div) / (ref_div * post_div)
136 unsigned ref_div_min, ref_div_max, ref_div; in amdgpu_pll_compute() local
211 ref_div_max, &fb_div, &ref_div); in amdgpu_pll_compute()
213 (ref_div * post_di in amdgpu_pll_compute()
84 amdgpu_pll_get_fb_ref_div(struct amdgpu_device *adev, unsigned int nom, unsigned int den, unsigned int post_div, unsigned int fb_div_max, unsigned int ref_div_max, unsigned int *fb_div, unsigned int *ref_div) amdgpu_pll_get_fb_ref_div() argument
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H A Datombios_crtc.c336 /* use recommended ref_div for ss */ in amdgpu_atombios_crtc_adjust_pll()
581 u32 ref_div, in amdgpu_atombios_crtc_program_pll()
608 args.v1.usRefDiv = cpu_to_le16(ref_div); in amdgpu_atombios_crtc_program_pll()
618 args.v2.usRefDiv = cpu_to_le16(ref_div); in amdgpu_atombios_crtc_program_pll()
628 args.v3.usRefDiv = cpu_to_le16(ref_div); in amdgpu_atombios_crtc_program_pll()
645 args.v5.ucRefDiv = ref_div; in amdgpu_atombios_crtc_program_pll()
675 args.v6.ucRefDiv = ref_div; in amdgpu_atombios_crtc_program_pll()
825 u32 ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0; in amdgpu_atombios_crtc_set_pll() local
854 &fb_div, &frac_fb_div, &ref_div, &post_div); in amdgpu_atombios_crtc_set_pll()
861 ref_div, fb_di in amdgpu_atombios_crtc_set_pll()
575 amdgpu_atombios_crtc_program_pll(struct drm_crtc *crtc, u32 crtc_id, int pll_id, u32 encoder_mode, u32 encoder_id, u32 clock, u32 ref_div, u32 fb_div, u32 frac_fb_div, u32 post_div, int bpc, bool ss_enabled, struct amdgpu_atom_ss *ss) amdgpu_atombios_crtc_program_pll() argument
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H A Datombios_crtc.h48 u32 ref_div,
/kernel/linux/linux-6.6/drivers/clk/microchip/
H A Dclk-mpfs.c102 u32 mult, ref_div, postdiv; in mpfs_clk_msspll_recalc_rate() local
106 ref_div = readl_relaxed(ref_div_addr) >> MSSPLL_REFDIV_SHIFT; in mpfs_clk_msspll_recalc_rate()
107 ref_div &= clk_div_mask(MSSPLL_REFDIV_WIDTH); in mpfs_clk_msspll_recalc_rate()
111 return prate * mult / (ref_div * MSSPLL_FIXED_DIV * postdiv); in mpfs_clk_msspll_recalc_rate()
119 u32 mult, ref_div; in mpfs_clk_msspll_round_rate() local
124 ref_div = readl_relaxed(ref_div_addr) >> MSSPLL_REFDIV_SHIFT; in mpfs_clk_msspll_round_rate()
125 ref_div &= clk_div_mask(MSSPLL_REFDIV_WIDTH); in mpfs_clk_msspll_round_rate()
127 rate_before_ctrl = rate * (ref_div * MSSPLL_FIXED_DIV) / mult; in mpfs_clk_msspll_round_rate()
139 u32 mult, ref_div, postdiv; in mpfs_clk_msspll_set_rate() local
145 ref_div in mpfs_clk_msspll_set_rate()
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H A Dclk-mpfs-ccc.c78 u32 mult, ref_div; in mpfs_ccc_pll_recalc_rate() local
82 ref_div = readl_relaxed(ref_div_addr) >> MPFS_CCC_REFDIV_SHIFT; in mpfs_ccc_pll_recalc_rate()
83 ref_div &= clk_div_mask(MPFS_CCC_REFDIV_WIDTH); in mpfs_ccc_pll_recalc_rate()
85 return prate * mult / (ref_div * MPFS_CCC_FIXED_DIV); in mpfs_ccc_pll_recalc_rate()
/kernel/linux/linux-5.10/arch/mips/netlogic/xlp/
H A Dnlm_hal.c311 u32 mdiv, fdiv, pll_out_freq_den, reg_select, ref_div, pic_div; in nlm_xlp2_get_pic_frequency() local
328 ref_div = 3; in nlm_xlp2_get_pic_frequency()
332 ref_div = 1; in nlm_xlp2_get_pic_frequency()
336 ref_div = 1; in nlm_xlp2_get_pic_frequency()
340 ref_div = 3; in nlm_xlp2_get_pic_frequency()
432 pll_out_freq_den = (1 << vco_post_div) * pll_post_div * ref_div; in nlm_xlp2_get_pic_frequency()
/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
H A Dradeon_clocks.c43 uint32_t fb_div, ref_div, post_div, sclk; in radeon_legacy_get_engine_clock() local
50 ref_div = in radeon_legacy_get_engine_clock()
53 if (ref_div == 0) in radeon_legacy_get_engine_clock()
56 sclk = fb_div / ref_div; in radeon_legacy_get_engine_clock()
73 uint32_t fb_div, ref_div, post_div, mclk; in radeon_legacy_get_memory_clock() local
80 ref_div = in radeon_legacy_get_memory_clock()
83 if (ref_div == 0) in radeon_legacy_get_memory_clock()
86 mclk = fb_div / ref_div; in radeon_legacy_get_memory_clock()
356 int ref_div = spll->reference_div; in calc_eng_mem_clock() local
358 if (!ref_div) in calc_eng_mem_clock()
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H A Dradeon_display.c927 * @ref_div: resulting reference divider
934 unsigned *fb_div, unsigned *ref_div) in avivo_get_fb_ref_div()
940 *ref_div = min(max(den/post_div, 1u), ref_div_max); in avivo_get_fb_ref_div()
941 *fb_div = DIV_ROUND_CLOSEST(nom * *ref_div * post_div, den); in avivo_get_fb_ref_div()
945 *ref_div = (*ref_div * fb_div_max)/(*fb_div); in avivo_get_fb_ref_div()
961 * dot_clock = (ref_freq * feedback_div) / (ref_div * post_div)
976 unsigned ref_div_min, ref_div_max, ref_div; in radeon_compute_pll_avivo() local
1054 ref_div_max, &fb_div, &ref_div); in radeon_compute_pll_avivo()
1056 (ref_div * post_di in radeon_compute_pll_avivo()
932 avivo_get_fb_ref_div(unsigned nom, unsigned den, unsigned post_div, unsigned fb_div_max, unsigned ref_div_max, unsigned *fb_div, unsigned *ref_div) avivo_get_fb_ref_div() argument
1179 uint32_t ref_div; radeon_compute_pll_legacy() local
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H A Drv740_dpm.c141 reference_divider = 1 + dividers.ref_div; in rv740_populate_sclk_value()
148 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in rv740_populate_sclk_value()
216 mpll_ad_func_cntl |= CLKR(dividers.ref_div); in rv740_populate_mclk_value()
233 mpll_dq_func_cntl |= CLKR(dividers.ref_div); in rv740_populate_mclk_value()
252 u32 decoded_ref = rv740_get_decoded_reference_divider(dividers.ref_div); in rv740_populate_mclk_value()
H A Drs780_dpm.c87 r600_engine_clock_entry_set_reference_divider(rdev, 0, dividers.ref_div); in rs780_initialize_dpm_power_state()
454 if ((min_dividers.ref_div != max_dividers.ref_div) || in rs780_set_engine_clock_scaling()
456 (max_dividers.ref_div != current_max_dividers.ref_div) || in rs780_set_engine_clock_scaling()
989 u32 ref_div = ((func_cntl & SPLL_REF_DIV_MASK) >> SPLL_REF_DIV_SHIFT) + 1; in rs780_dpm_debugfs_print_current_performance_level() local
993 (post_div * ref_div); in rs780_dpm_debugfs_print_current_performance_level()
1011 u32 ref_div = ((func_cntl & SPLL_REF_DIV_MASK) >> SPLL_REF_DIV_SHIFT) + 1; in rs780_dpm_get_current_sclk() local
1015 (post_div * ref_div); in rs780_dpm_get_current_sclk()
H A Drv730_dpm.c61 reference_divider = 1 + dividers.ref_div; in rv730_populate_sclk_value()
79 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in rv730_populate_sclk_value()
139 reference_divider = dividers.ref_div + 1; in rv730_populate_mclk_value()
154 mpll_func_cntl |= MPLL_REF_DIV(dividers.ref_div); in rv730_populate_mclk_value()
/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/
H A Dradeon_clocks.c43 uint32_t fb_div, ref_div, post_div, sclk; in radeon_legacy_get_engine_clock() local
50 ref_div = in radeon_legacy_get_engine_clock()
53 if (ref_div == 0) in radeon_legacy_get_engine_clock()
56 sclk = fb_div / ref_div; in radeon_legacy_get_engine_clock()
73 uint32_t fb_div, ref_div, post_div, mclk; in radeon_legacy_get_memory_clock() local
80 ref_div = in radeon_legacy_get_memory_clock()
83 if (ref_div == 0) in radeon_legacy_get_memory_clock()
86 mclk = fb_div / ref_div; in radeon_legacy_get_memory_clock()
356 int ref_div = spll->reference_div; in calc_eng_mem_clock() local
358 if (!ref_div) in calc_eng_mem_clock()
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H A Dradeon_display.c925 * @ref_div: resulting reference divider
932 unsigned *fb_div, unsigned *ref_div) in avivo_get_fb_ref_div()
938 *ref_div = min(max(den/post_div, 1u), ref_div_max); in avivo_get_fb_ref_div()
939 *fb_div = DIV_ROUND_CLOSEST(nom * *ref_div * post_div, den); in avivo_get_fb_ref_div()
943 *ref_div = (*ref_div * fb_div_max)/(*fb_div); in avivo_get_fb_ref_div()
960 * dot_clock = (ref_freq * feedback_div) / (ref_div * post_div)
975 unsigned ref_div_min, ref_div_max, ref_div; in radeon_compute_pll_avivo() local
1053 ref_div_max, &fb_div, &ref_div); in radeon_compute_pll_avivo()
1055 (ref_div * post_di in radeon_compute_pll_avivo()
930 avivo_get_fb_ref_div(unsigned nom, unsigned den, unsigned post_div, unsigned fb_div_max, unsigned ref_div_max, unsigned *fb_div, unsigned *ref_div) avivo_get_fb_ref_div() argument
1176 uint32_t ref_div; radeon_compute_pll_legacy() local
[all...]
H A Drv740_dpm.c140 reference_divider = 1 + dividers.ref_div; in rv740_populate_sclk_value()
147 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in rv740_populate_sclk_value()
215 mpll_ad_func_cntl |= CLKR(dividers.ref_div); in rv740_populate_mclk_value()
232 mpll_dq_func_cntl |= CLKR(dividers.ref_div); in rv740_populate_mclk_value()
251 u32 decoded_ref = rv740_get_decoded_reference_divider(dividers.ref_div); in rv740_populate_mclk_value()
H A Drs780_dpm.c87 r600_engine_clock_entry_set_reference_divider(rdev, 0, dividers.ref_div); in rs780_initialize_dpm_power_state()
453 if ((min_dividers.ref_div != max_dividers.ref_div) || in rs780_set_engine_clock_scaling()
455 (max_dividers.ref_div != current_max_dividers.ref_div) || in rs780_set_engine_clock_scaling()
988 u32 ref_div = ((func_cntl & SPLL_REF_DIV_MASK) >> SPLL_REF_DIV_SHIFT) + 1; in rs780_dpm_debugfs_print_current_performance_level() local
992 (post_div * ref_div); in rs780_dpm_debugfs_print_current_performance_level()
1010 u32 ref_div = ((func_cntl & SPLL_REF_DIV_MASK) >> SPLL_REF_DIV_SHIFT) + 1; in rs780_dpm_get_current_sclk() local
1014 (post_div * ref_div); in rs780_dpm_get_current_sclk()
H A Drv730_dpm.c59 reference_divider = 1 + dividers.ref_div; in rv730_populate_sclk_value()
77 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in rv730_populate_sclk_value()
137 reference_divider = dividers.ref_div + 1; in rv730_populate_mclk_value()
152 mpll_func_cntl |= MPLL_REF_DIV(dividers.ref_div); in rv730_populate_mclk_value()
/kernel/linux/linux-5.10/drivers/media/dvb-frontends/
H A Dtda8261.c72 static const u8 ref_div[] = { 0x00, 0x01, 0x02, 0x05, 0x07 }; variable
109 buf[2] = (0x01 << 7) | ((ref_div[config->step_size] & 0x07) << 1); in tda8261_set_params()
/kernel/linux/linux-6.6/drivers/media/dvb-frontends/
H A Dtda8261.c72 static const u8 ref_div[] = { 0x00, 0x01, 0x02, 0x05, 0x07 }; variable
109 buf[2] = (0x01 << 7) | ((ref_div[config->step_size] & 0x07) << 1); in tda8261_set_params()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_hubbub.c547 uint32_t ref_div = 0; in hubbub2_get_dchub_ref_freq() local
550 REG_GET_2(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, &ref_div, in hubbub2_get_dchub_ref_freq()
554 if (ref_div == 2) in hubbub2_get_dchub_ref_freq()
/kernel/linux/linux-5.10/drivers/net/wireless/ath/ath9k/
H A Dar9002_phy.c307 int ref_div = 5; in ar9002_hw_compute_pll_control() local
313 ref_div = 10; in ar9002_hw_compute_pll_control()
320 pll = SM(ref_div, AR_RTC_9160_PLL_REFDIV); in ar9002_hw_compute_pll_control()

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