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/third_party/backends/backend/
H A Ddell1600n_net.c212 struct ScannerState *pState);
215 static int ProcessTcpResponse (struct ScannerState *pState,
219 static int ProcessPageData (struct ScannerState *pState);
1345 struct ScannerState *pState) in ProcessUdpResponse()
1397 if (!(pState->m_tcpFd = socket (PF_INET, SOCK_STREAM, IPPROTO_TCP))) in ProcessUdpResponse()
1402 if (connect (pState->m_tcpFd, in ProcessUdpResponse()
1403 (struct sockaddr *) &pState->m_sockAddr, in ProcessUdpResponse()
1404 sizeof (pState->m_sockAddr))) in ProcessUdpResponse()
1420 nread = read (pState->m_tcpFd, sockBuf, sizeof (sockBuf)); in ProcessUdpResponse()
1441 if (ProcessTcpResponse (pState, in ProcessUdpResponse()
1344 ProcessUdpResponse(unsigned char *pData, size_t size, struct ScannerState *pState) ProcessUdpResponse() argument
1476 ProcessTcpResponse(struct ScannerState *pState, struct ComBuf *pTcpBuf) ProcessTcpResponse() argument
1789 ProcessPageData(struct ScannerState *pState) ProcessPageData() argument
2019 struct JpegDataDecompState *pState = (struct JpegDataDecompState *) cinfo; JpegDecompFillInputBuffer() local
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H A Du12-hw.c357 u_short *pState = (u_short*)dev->scanStates; local
360 pState[i] = 0x89ac;
364 u_long *pState = (u_long*)dev->scanStates; local
367 pState[i] = 0x888889ac;
479 SANE_Byte *pState; local
630 for( channel = _NUMBER_OF_SCANSTEPS, pState = dev->bufs.b1.pReadBuf;
632 *pState = state;
633 pState += dev->scan.dwInterval;
635 for( channel = 0, pState = dev->bufs.b1.pReadBuf;
637 dev->scanStates[channel] = pState[
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H A Dplustek-pp_p12.c210 pUChar pState = ps->Bufs.b1.pReadBuf; in p12SetupScanningCondition() local
370 *pState = bState; in p12SetupScanningCondition()
372 pState[ ps->Scan.dwInterlace] = _SS_STEP; in p12SetupScanningCondition()
373 pState += ps->Scan.dwInterval; in p12SetupScanningCondition()
375 for( channel = 0, pState = ps->Bufs.b1.pReadBuf; in p12SetupScanningCondition()
377 ps->a_nbNewAdrPointer[channel] = pState [0] | (pState [1] << 4); in p12SetupScanningCondition()
378 pState += 2; in p12SetupScanningCondition()
/third_party/libsnd/src/G72x/
H A Dg72x.c135 { G72x_STATE *pstate ; in g72x_reader_init() local
137 if ((pstate = g72x_state_new ()) == NULL) in g72x_reader_init()
140 private_init_state (pstate) ; in g72x_reader_init()
142 pstate->encoder = NULL ; in g72x_reader_init()
146 pstate->decoder = g723_16_decoder ; in g72x_reader_init()
149 pstate->codec_bits = 2 ; in g72x_reader_init()
150 pstate->blocksize = G723_16_BYTES_PER_BLOCK ; in g72x_reader_init()
151 pstate->samplesperblock = G723_16_SAMPLES_PER_BLOCK ; in g72x_reader_init()
155 pstate->decoder = g723_24_decoder ; in g72x_reader_init()
158 pstate in g72x_reader_init()
190 { G72x_STATE *pstate ; g72x_writer_init() local
243 g72x_decode_block(G72x_STATE *pstate, const unsigned char *block, short *samples) g72x_decode_block() argument
254 g72x_encode_block(G72x_STATE *pstate, short *samples, unsigned char *block) g72x_encode_block() argument
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H A Dg72x.h75 int g72x_decode_block (struct g72x_state *pstate, const unsigned char *block, short *samples) ;
83 int g72x_encode_block (struct g72x_state *pstate, short *samples, unsigned char *block) ;
/device/soc/rockchip/common/sdk_linux/arch/arm64/kernel/
H A Dprocess.c230 u64 pstate = regs->pstate; in print_pstate() local
233 printk("pstate: %08llx (%c%c%c%c %c %s %s %c%c%c)\n", pstate, pstate & PSR_AA32_N_BIT ? 'N' : 'n', in print_pstate()
234 pstate & PSR_AA32_Z_BIT ? 'Z' : 'z', pstate & PSR_AA32_C_BIT ? 'C' : 'c', in print_pstate()
235 pstate & PSR_AA32_V_BIT ? 'V' : 'v', pstate & PSR_AA32_Q_BIT ? 'Q' : 'q', in print_pstate()
236 pstate in print_pstate()
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/third_party/mesa3d/src/gallium/drivers/zink/
H A Dzink_render_pass.c63 create_render_pass2(struct zink_screen *screen, struct zink_render_pass_state *state, struct zink_render_pass_pipeline_state *pstate) in create_render_pass2() argument
75 pstate->num_attachments = state->num_cbufs; in create_render_pass2()
76 pstate->num_cresolves = state->num_cresolves; in create_render_pass2()
77 pstate->num_zsresolves = state->num_zsresolves; in create_render_pass2()
78 pstate->fbfetch = 0; in create_render_pass2()
84 pstate->attachments[i].format = attachments[i].format = rt->format; in create_render_pass2()
85 pstate->attachments[i].samples = attachments[i].samples = rt->samples; in create_render_pass2()
107 pstate->fbfetch = 1; in create_render_pass2()
132 pstate->attachments[num_attachments].format = attachments[num_attachments].format = rt->format; in create_render_pass2()
133 pstate in create_render_pass2()
234 zink_create_render_pass(struct zink_screen *screen, struct zink_render_pass_state *state, struct zink_render_pass_pipeline_state *pstate) zink_create_render_pass() argument
289 rp_state_size(const struct zink_render_pass_pipeline_state *pstate) rp_state_size() argument
433 struct zink_render_pass_pipeline_state pstate; get_render_pass() local
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/device/soc/rockchip/common/sdk_linux/drivers/gpu/drm/rockchip/
H A Drockchip_drm_vop.c880 struct drm_plane_state *pstate; in vop_hdr_atomic_check() local
897 pstate = drm_atomic_get_plane_state(state, plane); in vop_hdr_atomic_check()
898 if (IS_ERR(pstate)) { in vop_hdr_atomic_check()
899 return PTR_ERR(pstate); in vop_hdr_atomic_check()
901 vop_plane_state = to_vop_plane_state(pstate); in vop_hdr_atomic_check()
902 if (!pstate->fb) { in vop_hdr_atomic_check()
941 pstate = drm_atomic_get_plane_state(state, plane); in vop_hdr_atomic_check()
942 if (IS_ERR(pstate)) { in vop_hdr_atomic_check()
943 return PTR_ERR(pstate); in vop_hdr_atomic_check()
945 vop_plane_state = to_vop_plane_state(pstate); in vop_hdr_atomic_check()
1158 struct drm_plane_state *pstate; vop_csc_atomic_check() local
2367 struct vop_plane_state *pstate = to_vop_plane_state(state); vop_plane_info_dump() local
2585 vop_plane_line_bandwidth(struct drm_plane_state *pstate) vop_plane_line_bandwidth() argument
2650 struct drm_plane_state *pstate; vop_crtc_bandwidth() local
3160 struct drm_plane_state *pstate; vop_afbdc_atomic_check() local
3326 struct drm_plane_state *pstate; vop_crtc_atomic_check() local
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H A Drockchip_drm_vop2.c845 static inline bool vop2_plane_active(struct drm_plane_state *pstate) in vop2_plane_active() argument
847 if (!pstate || !pstate->fb) { in vop2_plane_active()
2339 struct drm_plane_state *pstate = &vpstate->base; in vop2_setup_csc_mode() local
2341 int is_input_yuv = is_yuv_support(pstate->fb->format->format); in vop2_setup_csc_mode()
3444 static int vop2_cluster_two_win_mode_check(struct drm_plane_state *pstate) in vop2_cluster_two_win_mode_check() argument
3446 struct drm_atomic_state *state = pstate->state; in vop2_cluster_two_win_mode_check()
3447 struct drm_plane *plane = pstate->plane; in vop2_cluster_two_win_mode_check()
3452 int actual_w = drm_rect_width(&pstate->src) >> 0x10; in vop2_cluster_two_win_mode_check()
3455 if (pstate in vop2_cluster_two_win_mode_check()
3487 vop2_cluter_splice_scale_check(struct vop2_win *win, struct drm_plane_state *pstate, u16 hdisplay) vop2_cluter_splice_scale_check() argument
3518 vop2_plane_splice_check(struct drm_plane *plane, struct drm_plane_state *pstate, struct drm_display_mode *mode) vop2_plane_splice_check() argument
3779 struct drm_plane_state *pstate = plane->state; vop2_plane_setup_color_key() local
3893 vop2_win_atomic_update(struct vop2_win *win, struct drm_rect *src, struct drm_rect *dst, struct drm_plane_state *pstate) vop2_win_atomic_update() argument
4121 struct drm_plane_state *pstate = plane->state; vop2_plane_atomic_update() local
4270 struct drm_plane_state *pstate; rockchip_atomic_helper_update_plane() local
4328 struct drm_plane_state *pstate; rockchip_atomic_helper_disable_plane() local
4645 struct drm_plane_state *pstate = plane->state; vop2_plane_info_dump() local
4926 vop2_plane_line_bandwidth(struct drm_plane_state *pstate) vop2_plane_line_bandwidth() argument
4990 struct drm_plane_state *pstate; vop2_crtc_bandwidth() local
6257 struct drm_plane_state *pstate; vop2_setup_hdr10() local
6572 struct drm_plane_state *pstate; vop2_setup_alpha() local
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/device/soc/rockchip/rk3588/kernel/drivers/gpu/drm/rockchip/
H A Drockchip_drm_vop2.c870 static inline bool vop2_plane_active(struct drm_plane_state *pstate) in vop2_plane_active() argument
872 if (!pstate || !pstate->fb) in vop2_plane_active()
2334 struct drm_plane_state *pstate = &vpstate->base; in vop2_setup_csc_mode() local
2336 int is_input_yuv = is_yuv_support(pstate->fb->format->format); in vop2_setup_csc_mode()
3445 static int vop2_cluster_two_win_mode_check(struct drm_plane_state *pstate) in vop2_cluster_two_win_mode_check() argument
3447 struct drm_atomic_state *state = pstate->state; in vop2_cluster_two_win_mode_check()
3448 struct drm_plane *plane = pstate->plane; in vop2_cluster_two_win_mode_check()
3453 int actual_w = drm_rect_width(&pstate->src) >> 16; in vop2_cluster_two_win_mode_check()
3456 if (pstate in vop2_cluster_two_win_mode_check()
3490 vop2_cluter_splice_scale_check(struct vop2_win *win, struct drm_plane_state *pstate, u16 hdisplay) vop2_cluter_splice_scale_check() argument
3525 vop2_plane_splice_check(struct drm_plane *plane, struct drm_plane_state *pstate, struct drm_display_mode *mode) vop2_plane_splice_check() argument
3786 struct drm_plane_state *pstate = plane->state; vop2_plane_setup_color_key() local
3896 vop2_win_atomic_update(struct vop2_win *win, struct drm_rect *src, struct drm_rect *dst, struct drm_plane_state *pstate) vop2_win_atomic_update() argument
4119 struct drm_plane_state *pstate = plane->state; vop2_plane_atomic_update() local
4272 struct drm_plane_state *pstate; rockchip_atomic_helper_update_plane() local
4328 struct drm_plane_state *pstate; rockchip_atomic_helper_disable_plane() local
4647 struct drm_plane_state *pstate = plane->state; vop2_plane_info_dump() local
4937 vop2_plane_line_bandwidth(struct drm_plane_state *pstate) vop2_plane_line_bandwidth() argument
4999 struct drm_plane_state *pstate; vop2_crtc_bandwidth() local
6310 struct drm_plane_state *pstate; vop2_setup_hdr10() local
6611 struct drm_plane_state *pstate; vop2_setup_alpha() local
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/third_party/skia/tools/skpbench/
H A D_hardware_pixel_c.py10 # If you run adb cat /sys/devices/57000000.gpu/pstate it shows all
45 chown root:root /sys/devices/57000000.gpu/pstate
46 echo %s > /sys/devices/57000000.gpu/pstate''' % GPU_EMC_PROFILE_ID]))
73 cat /sys/devices/57000000.gpu/pstate | grep \*$''')
/third_party/FreeBSD/sys/dev/usb/
H A Dusb_if.h21 /* pointer to the device request */ void **pptr, /* data pointer */ uint16_t *plen, /* maximum transfer length */ uint16_t offset, /* data offset */ uint8_t *pstate);
24 /* pointer to the device request */ void **pptr, /* data pointer */ uint16_t *plen, /* maximum transfer length */ uint16_t offset, /* data offset */ uint8_t *pstate) in USB_HANDLE_REQUEST()
28 return ((usb_handle_request_t *) _m)(dev, req, pptr, plen, offset, pstate); in USB_HANDLE_REQUEST()
23 USB_HANDLE_REQUEST(device_t dev, const void *req, void **pptr, uint16_t *plen, uint16_t offset, uint8_t *pstate) USB_HANDLE_REQUEST() argument
/device/soc/rockchip/common/vendor/drivers/staging/android/fiq_debugger/
H A Dfiq_debugger_arm64.c45 output->printf(output, " pc %016lx cpsr %08lx mode %s\n", regs->pc, regs->pstate, mode_name(regs)); in fiq_debugger_dump_pc()
60 output->printf(output, " cpsr %08x (%s)\n", regs->pstate, mode_name(regs)); in fiq_debugger_dump_regs_aarch32()
85 output->printf(output, " pc %016lx cpsr %08x (%s)\n", regs->pc, regs->pstate, mode_name(regs)); in fiq_debugger_dump_regs_aarch64()
106 u32 pstate = READ_SPECIAL_REG(CurrentEl); in fiq_debugger_dump_allregs() local
107 bool in_el2 = (pstate & PSR_MODE_MASK) >= PSR_MODE_EL2t; in fiq_debugger_dump_allregs()
/device/soc/rockchip/rk3588/kernel/drivers/staging/android/fiq_debugger/
H A Dfiq_debugger_arm64.c41 regs->pc, regs->pstate, mode_name(regs)); in fiq_debugger_dump_pc()
60 regs->pstate, mode_name(regs)); in fiq_debugger_dump_regs_aarch32()
100 regs->pc, regs->pstate, mode_name(regs)); in fiq_debugger_dump_regs_aarch64()
121 u32 pstate = READ_SPECIAL_REG(CurrentEl); in fiq_debugger_dump_allregs() local
122 bool in_el2 = (pstate & PSR_MODE_MASK) >= PSR_MODE_EL2t; in fiq_debugger_dump_allregs()
/third_party/astc-encoder/Source/
H A Dtinyexr.h2239 inflate_state *pState; in mz_inflate() local
2249 pState = (inflate_state *)pStream->state; in mz_inflate()
2250 if (pState->m_window_bits > 0) decomp_flags |= TINFL_FLAG_PARSE_ZLIB_HEADER; in mz_inflate()
2253 first_call = pState->m_first_call; in mz_inflate()
2254 pState->m_first_call = 0; in mz_inflate()
2255 if (pState->m_last_status < 0) return MZ_DATA_ERROR; in mz_inflate()
2257 if (pState->m_has_flushed && (flush != MZ_FINISH)) return MZ_STREAM_ERROR; in mz_inflate()
2258 pState->m_has_flushed |= (flush == MZ_FINISH); in mz_inflate()
2266 status = tinfl_decompress(&pState->m_decomp, pStream->next_in, &in_bytes, in mz_inflate()
2269 pState in mz_inflate()
4994 mz_zip_internal_state *pState = pZip->m_pState; mz_zip_reader_sort_central_dir_offsets_by_filename() local
5391 mz_zip_internal_state *pState = pZip->m_pState; mz_zip_reader_locate_file_binary_search() local
5894 mz_zip_internal_state *pState = pZip->m_pState; mz_zip_reader_end() local
5979 mz_zip_internal_state *pState = pZip->m_pState; mz_zip_heap_write_func() local
6065 mz_zip_internal_state *pState; mz_zip_writer_init_from_reader() local
6130 mz_zip_writer_add_state *pState = (mz_zip_writer_add_state *)pUser; mz_zip_writer_add_put_buf_callback() local
6193 mz_zip_internal_state *pState = pZip->m_pState; mz_zip_writer_add_to_central_dir() local
6279 mz_zip_internal_state *pState; mz_zip_writer_add_mem_ex() local
6643 mz_zip_internal_state *pState; mz_zip_writer_add_from_zip_reader() local
6780 mz_zip_internal_state *pState; mz_zip_writer_finalize_archive() local
6846 mz_zip_internal_state *pState; mz_zip_writer_end() local
[all...]
/device/soc/rockchip/common/sdk_linux/drivers/opp/
H A Dof.c798 new_opp->pstate = pm_genpd_opp_to_performance_state(dev, new_opp); in _opp_add_static_v2()
890 if (opp->pstate) { in _of_add_opp_table_v2()
1206 int pstate = -EINVAL; in of_get_required_opp_performance_state() local
1221 pstate = opp->pstate; in of_get_required_opp_performance_state()
1230 return pstate; in of_get_required_opp_performance_state()
/third_party/mesa3d/src/freedreno/ir3/
H A Dir3_legalize.c103 struct ir3_legalize_state *pstate = &pbd->state; in legalize_block() local
108 regmask_or(&state->needs_ss, &state->needs_ss, &pstate->needs_ss); in legalize_block()
110 &pstate->needs_ss_war); in legalize_block()
111 regmask_or(&state->needs_sy, &state->needs_sy, &pstate->needs_sy); in legalize_block()
120 struct ir3_legalize_state *pstate = &pbd->state; in legalize_block() local
122 regmask_or_shared(&state->needs_ss, &state->needs_ss, &pstate->needs_ss); in legalize_block()
/device/soc/rockchip/rk3588/kernel/drivers/soc/rockchip/
H A Dopp.h59 * @pstate: Device's power domain's performance state.
81 unsigned int pstate; member
/third_party/libunwind/libunwind/src/aarch64/
H A DGresume.c135 sc->pstate = uc->uc_mcontext.pstate; in aarch64_local_resume()
/third_party/mesa3d/include/drm-uapi/
H A Damdgpu_drm.h247 /* select a stable profiling pstate for perfmon tools */
283 } pstate; member
803 /* Subquery id: Query GPU stable pstate shader clock */
805 /* Subquery id: Query GPU stable pstate memory clock */
/third_party/libdrm/include/drm/
H A Damdgpu_drm.h243 /* select a stable profiling pstate for perfmon tools */
279 } pstate; member
795 /* Subquery id: Query GPU stable pstate shader clock */
797 /* Subquery id: Query GPU stable pstate memory clock */
/third_party/musl/arch/aarch64/bits/
H A Duser.h5 unsigned long long pstate; member
/third_party/rust/crates/libc/src/unix/nto/
H A Daarch64.rs22 pub pstate: u64,
/third_party/rust/crates/libc/src/unix/linux_like/android/b64/aarch64/
H A Dalign.rs24 pub pstate: ::c_ulonglong,
/third_party/rust/crates/libc/src/unix/linux_like/linux/musl/b64/aarch64/
H A Dalign.rs24 pub pstate: ::c_ulong,

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