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Searched refs:slots_valid (Results 1 - 12 of 12) sorted by relevance

/third_party/mesa3d/src/intel/compiler/
H A Dbrw_vue_map.c62 uint64_t slots_valid, in brw_compute_vue_map()
82 slots_valid |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0); in brw_compute_vue_map()
83 slots_valid |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1); in brw_compute_vue_map()
86 vue_map->slots_valid = slots_valid; in brw_compute_vue_map()
93 slots_valid &= ~(VARYING_BIT_LAYER | VARYING_BIT_VIEWPORT | VARYING_BIT_PRIMITIVE_SHADING_RATE); in brw_compute_vue_map()
149 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0)) in brw_compute_vue_map()
151 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1)) in brw_compute_vue_map()
163 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_COL0)) in brw_compute_vue_map()
165 if (slots_valid in brw_compute_vue_map()
60 brw_compute_vue_map(const struct intel_device_info *devinfo, struct brw_vue_map *vue_map, uint64_t slots_valid, bool separate, uint32_t pos_slots) brw_compute_vue_map() argument
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H A Dbrw_fs_visitor.cpp837 if ((vue_map->slots_valid & psiz_mask) == 0) { in emit_urb_writes()
846 if (vue_map->slots_valid & VARYING_BIT_PRIMITIVE_SHADING_RATE && in emit_urb_writes()
858 if (vue_map->slots_valid & VARYING_BIT_LAYER) in emit_urb_writes()
863 if (vue_map->slots_valid & VARYING_BIT_VIEWPORT) in emit_urb_writes()
868 if (vue_map->slots_valid & VARYING_BIT_PSIZ) in emit_urb_writes()
H A Dbrw_compiler.h1171 uint64_t slots_valid; member
1242 uint64_t slots_valid,
1247 uint64_t slots_valid,
H A Dbrw_vec4_visitor.cpp834 ((prog_data->vue_map.slots_valid & VARYING_BIT_PSIZ) || in emit_psiz_and_flags()
843 if (prog_data->vue_map.slots_valid & VARYING_BIT_PSIZ) { in emit_psiz_and_flags()
/third_party/mesa3d/src/intel/blorp/
H A Dblorp.c367 const uint64_t slots_valid = VARYING_BIT_POS | in blorp_ensure_sf_program() local
370 key.key.attrs = slots_valid; in blorp_ensure_sf_program()
389 brw_compute_vue_map(blorp->compiler->devinfo, &vue_map, slots_valid, false, 1); in blorp_ensure_sf_program()
/third_party/mesa3d/src/gallium/drivers/crocus/
H A Dcrocus_program.c1949 key.input_slots_valid = ice->shaders.last_vue_map->slots_valid; in crocus_update_compiled_fs()
1998 (old_map ? old_map->slots_valid : 0ull) ^ vue_map->slots_valid; in update_last_vue_map()
2002 (vue_map->slots_valid & VARYING_BIT_VIEWPORT) ? CROCUS_MAX_VIEWPORTS : 1; in update_last_vue_map()
2115 key.attrs = ice->shaders.last_vue_map->slots_valid; in crocus_update_compiled_clip()
2260 key.attrs = ice->shaders.last_vue_map->slots_valid; in crocus_update_compiled_sf()
2365 key.attrs = ice->shaders.last_vue_map->slots_valid; in crocus_update_compiled_ff_gs()
H A Dcrocus_state.c4478 if (!(vue_map->slots_valid & VARYING_BIT_LAYER)) in get_attr_override()
4480 if (!(vue_map->slots_valid & VARYING_BIT_VIEWPORT)) in get_attr_override()
/third_party/mesa3d/src/gallium/drivers/iris/
H A Diris_program.c2052 key.input_slots_valid = last_vue_map->slots_valid; in iris_update_compiled_fs()
2098 (old_map ? old_map->slots_valid : 0ull) ^ vue_map->slots_valid; in update_last_vue_map()
2102 (vue_map->slots_valid & VARYING_BIT_VIEWPORT) ? IRIS_MAX_VIEWPORTS : 1; in update_last_vue_map()
H A Diris_state.c4205 if (!(vue_map->slots_valid & VARYING_BIT_LAYER)) in iris_emit_sbe_swiz()
4207 if (!(vue_map->slots_valid & VARYING_BIT_VIEWPORT)) in iris_emit_sbe_swiz()
/third_party/mesa3d/src/intel/vulkan/
H A DgenX_pipeline.c785 point_from_shader = last_vue_prog_data->vue_map.slots_valid & VARYING_BIT_PSIZ; in emit_rs_state()
1212 if (vp && (last->vue_map.slots_valid & VARYING_BIT_VIEWPORT)) { in emit_3dstate_clip()
1226 !(last->vue_map.slots_valid & VARYING_BIT_LAYER); in emit_3dstate_clip()
H A Danv_pipeline.c1150 prev_stage->prog_data.vue.vue_map.slots_valid; in anv_pipeline_compile_fs()
H A DgenX_cmd_buffer.c3525 if (last->vue_map.slots_valid & VARYING_BIT_VIEWPORT) { in cmd_buffer_emit_clip()

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