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Searched refs:Is1S (Results 1 - 6 of 6) sorted by relevance

/third_party/node/deps/v8/src/codegen/arm64/
H A Dassembler-arm64.cc1436 DCHECK((vn.Is1H() && vd.Is1S()) || (vn.Is1S() && vd.Is1D()) || in NEON3DifferentL()
1499 V(sqdmlal, NEON_SQDMLAL, vn.Is1H() || vn.Is1S() || vn.Is4H() || vn.Is2S()) \
1500 V(sqdmlal2, NEON_SQDMLAL2, vn.Is1H() || vn.Is1S() || vn.Is8H() || vn.Is4S()) \
1501 V(sqdmlsl, NEON_SQDMLSL, vn.Is1H() || vn.Is1S() || vn.Is4H() || vn.Is2S()) \
1502 V(sqdmlsl2, NEON_SQDMLSL2, vn.Is1H() || vn.Is1S() || vn.Is8H() || vn.Is4S()) \
1503 V(sqdmull, NEON_SQDMULL, vn.Is1H() || vn.Is1S() || vn.Is4H() || vn.Is2S()) \
1504 V(sqdmull2, NEON_SQDMULL2, vn.Is1H() || vn.Is1S() || vn.Is8H() || vn.Is4S())
1622 DCHECK((vd.Is1B() && vn.Is1H()) || (vd.Is1H() && vn.Is1S()) || in NEONShiftImmediateN()
1623 (vd.Is1S() in NEONShiftImmediateN()
[all...]
H A Dregister-arm64.h391 bool Is1S() const { in Is1S() function in v8::internal::VRegister
H A Dmacro-assembler-arm64-inl.h665 if (vd.Is1S() || vd.Is2S() || vd.Is4S()) { in Fmov()
697 DCHECK(vd.Is1S() || vd.Is2S() || vd.Is4S()); in Fmov()
/third_party/vixl/src/aarch64/
H A Dassembler-aarch64.cc2922 VIXL_ASSERT((vn.Is1H() && vd.Is1S()) || (vn.Is1S() && vd.Is1D()) ||
2993 V(sqdmlal, NEON_SQDMLAL, vn.Is1H() || vn.Is1S() || vn.Is4H() || vn.Is2S()) \
2994 V(sqdmlal2, NEON_SQDMLAL2, vn.Is1H() || vn.Is1S() || vn.Is8H() || vn.Is4S()) \
2995 V(sqdmlsl, NEON_SQDMLSL, vn.Is1H() || vn.Is1S() || vn.Is4H() || vn.Is2S()) \
2996 V(sqdmlsl2, NEON_SQDMLSL2, vn.Is1H() || vn.Is1S() || vn.Is8H() || vn.Is4S()) \
2997 V(sqdmull, NEON_SQDMULL, vn.Is1H() || vn.Is1S() || vn.Is4H() || vn.Is2S()) \
2998 V(sqdmull2, NEON_SQDMULL2, vn.Is1H() || vn.Is1S() || vn.Is8H() || vn.Is4S()) \
3271 VIXL_ASSERT(vd.Is1S());
3303 VIXL_ASSERT(vn.Is1H() || vn.Is1S() || v
[all...]
H A Dregisters-aarch64.h212 bool IsFPRegister() const { return Is1H() || Is1S() || Is1D(); }
358 bool Is1S() const { return IsS() && IsScalar(); }
373 // The current CPURegister implementation cannot not tell this from Is1S(),
376 bool Is1S4B() const { return Is1S(); }
H A Dmacro-assembler-aarch64.cc1649 if (vd.Is1S() || vd.Is2S() || vd.Is4S()) { in Emit()
1694 VIXL_ASSERT(vd.Is1S() || vd.Is2S() || vd.Is4S()); in Emit()
1717 if (vd.Is1S() || vd.Is2S() || vd.Is4S()) { in Emit()

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