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/kernel/linux/linux-5.10/arch/x86/crypto/
H A Dglue_helper-asm-avx.S8 #define load_8way(src, x0, x1, x2, x3, x4, x5, x6, x7) \
16 vmovdqu (7*16)(src), x7;
18 #define store_8way(dst, x0, x1, x2, x3, x4, x5, x6, x7) \
26 vmovdqu x7, (7*16)(dst);
28 #define store_cbc_8way(src, dst, x0, x1, x2, x3, x4, x5, x6, x7) \
35 vpxor (6*16)(src), x7, x7; \
36 store_8way(dst, x0, x1, x2, x3, x4, x5, x6, x7);
44 #define load_ctr_8way(iv, bswap, x0, x1, x2, x3, x4, x5, x6, x7, t0, t1, t2) \
50 vmovdqu (iv), x7; \
[all...]
H A Dglue_helper-asm-avx2.S8 #define load_16way(src, x0, x1, x2, x3, x4, x5, x6, x7) \
16 vmovdqu (7*32)(src), x7;
18 #define store_16way(dst, x0, x1, x2, x3, x4, x5, x6, x7) \
26 vmovdqu x7, (7*32)(dst);
28 #define store_cbc_16way(src, dst, x0, x1, x2, x3, x4, x5, x6, x7, t0) \
38 vpxor (6*32+16)(src), x7, x7; \
39 store_16way(dst, x0, x1, x2, x3, x4, x5, x6, x7);
55 #define load_ctr_16way(iv, bswap, x0, x1, x2, x3, x4, x5, x6, x7, t0, t0x, t1, \
83 vpshufb t1, t2, x7; \
[all...]
/kernel/linux/linux-5.10/drivers/misc/habanalabs/include/goya/asic_reg/
H A Dmme1_rtr_masks.h24 #define MME1_RTR_HBW_RD_RQ_E_ARB_W_MASK 0x7
34 #define MME1_RTR_HBW_RD_RQ_W_ARB_E_MASK 0x7
44 #define MME1_RTR_HBW_RD_RQ_N_ARB_W_MASK 0x7
54 #define MME1_RTR_HBW_RD_RQ_S_ARB_W_MASK 0x7
64 #define MME1_RTR_HBW_RD_RQ_L_ARB_W_MASK 0x7
112 #define MME1_RTR_HBW_RD_RS_E_ARB_W_MASK 0x7
122 #define MME1_RTR_HBW_RD_RS_W_ARB_E_MASK 0x7
132 #define MME1_RTR_HBW_RD_RS_N_ARB_W_MASK 0x7
142 #define MME1_RTR_HBW_RD_RS_S_ARB_W_MASK 0x7
152 #define MME1_RTR_HBW_RD_RS_L_ARB_W_MASK 0x7
[all...]
/kernel/linux/linux-6.6/drivers/accel/habanalabs/include/goya/asic_reg/
H A Dmme1_rtr_masks.h24 #define MME1_RTR_HBW_RD_RQ_E_ARB_W_MASK 0x7
34 #define MME1_RTR_HBW_RD_RQ_W_ARB_E_MASK 0x7
44 #define MME1_RTR_HBW_RD_RQ_N_ARB_W_MASK 0x7
54 #define MME1_RTR_HBW_RD_RQ_S_ARB_W_MASK 0x7
64 #define MME1_RTR_HBW_RD_RQ_L_ARB_W_MASK 0x7
112 #define MME1_RTR_HBW_RD_RS_E_ARB_W_MASK 0x7
122 #define MME1_RTR_HBW_RD_RS_W_ARB_E_MASK 0x7
132 #define MME1_RTR_HBW_RD_RS_N_ARB_W_MASK 0x7
142 #define MME1_RTR_HBW_RD_RS_S_ARB_W_MASK 0x7
152 #define MME1_RTR_HBW_RD_RS_L_ARB_W_MASK 0x7
[all...]
/kernel/linux/linux-6.6/include/linux/usb/
H A Dpd_vdo.h42 #define VDO_OPOS_MASK VDO_OPOS(0x7)
80 #define PD_VDO_OPOS(vdo) (((vdo) >> 8) & 0x7)
144 ((usbh) << 31 | (usbd) << 30 | ((ufp_cable) & 0x7) << 27 \
145 | (is_modal) << 26 | ((dfp) & 0x7) << 23 | ((conn) & 0x3) << 21 \
148 #define PD_IDH_PTYPE(vdo) (((vdo) >> 27) & 0x7)
151 #define PD_IDH_DFP_PTYPE(vdo) (((vdo) >> 23) & 0x7)
230 (((ver) & 0x7) << 29 | ((cap) & 0xf) << 24 | ((conn) & 0x3) << 22 \
231 | ((vcpwr) & 0x7) << 8 | (vcr) << 7 | (vbr) << 6 | ((alt) & 0x7) << 3 \
232 | ((spd) & 0x7))
[all...]
/kernel/linux/linux-6.6/sound/soc/fsl/
H A Dfsl_asrc.c63 /* 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf */
64 0x0, 0x1, 0x2, 0x7, 0x4, 0x5, 0x6, 0x3, 0x8, 0x9, 0xa, 0xb, 0xc, 0xf, 0xe, 0xd,
65 0x7, 0x7, 0x7, 0x7, 0x7, 0x7, 0x7, 0x7,
[all...]
/kernel/linux/linux-5.10/drivers/net/ethernet/chelsio/cxgb/
H A Dvsc7326_reg.h14 #define CRA(blk,sub,adr) ((((blk) & 0x7) << 13) | (((sub) & 0xf) << 9) | (((adr) & 0xff) << 1))
17 #define REG_CHIP_ID CRA(0x7,0xf,0x00) /* Chip ID */
18 #define REG_BLADE_ID CRA(0x7,0xf,0x01) /* Blade ID */
19 #define REG_SW_RESET CRA(0x7,0xf,0x02) /* Global Soft Reset */
20 #define REG_MEM_BIST CRA(0x7,0xf,0x04) /* mem */
21 #define REG_IFACE_MODE CRA(0x7,0xf,0x07) /* Interface mode */
22 #define REG_MSCH CRA(0x7,0x2,0x06) /* CRC error count */
23 #define REG_CRC_CNT CRA(0x7,0x2,0x0a) /* CRC error count */
24 #define REG_CRC_CFG CRA(0x7,0x2,0x0b) /* CRC config */
25 #define REG_SI_TRANSFER_SEL CRA(0x7,
[all...]
/kernel/linux/linux-6.6/drivers/net/ethernet/chelsio/cxgb/
H A Dvsc7326_reg.h14 #define CRA(blk,sub,adr) ((((blk) & 0x7) << 13) | (((sub) & 0xf) << 9) | (((adr) & 0xff) << 1))
17 #define REG_CHIP_ID CRA(0x7,0xf,0x00) /* Chip ID */
18 #define REG_BLADE_ID CRA(0x7,0xf,0x01) /* Blade ID */
19 #define REG_SW_RESET CRA(0x7,0xf,0x02) /* Global Soft Reset */
20 #define REG_MEM_BIST CRA(0x7,0xf,0x04) /* mem */
21 #define REG_IFACE_MODE CRA(0x7,0xf,0x07) /* Interface mode */
22 #define REG_MSCH CRA(0x7,0x2,0x06) /* CRC error count */
23 #define REG_CRC_CNT CRA(0x7,0x2,0x0a) /* CRC error count */
24 #define REG_CRC_CFG CRA(0x7,0x2,0x0b) /* CRC config */
25 #define REG_SI_TRANSFER_SEL CRA(0x7,
[all...]
/kernel/linux/linux-5.10/sound/soc/fsl/
H A Dfsl_asrc.c59 /* 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf */
60 0x0, 0x1, 0x2, 0x7, 0x4, 0x5, 0x6, 0x3, 0x8, 0x9, 0xa, 0xb, 0xc, 0xf, 0xe, 0xd,
61 0x7, 0x7, 0x7, 0x7, 0x7, 0x7, 0x7, 0x7,
[all...]
/kernel/linux/linux-6.6/include/dt-bindings/usb/
H A Dpd.h133 ((usbh) << 31 | (usbd) << 30 | ((ufp_cable) & 0x7) << 27 \
134 | (is_modal) << 26 | ((dfp) & 0x7) << 23 | ((conn) & 0x3) << 21 \
209 (((ver) & 0x7) << 29 | ((cap) & 0xf) << 24 | ((conn) & 0x3) << 22 \
210 | ((vcpwr) & 0x7) << 8 | (vcr) << 7 | (vbr) << 6 | ((alt) & 0x7) << 3 \
211 | ((spd) & 0x7))
231 (((ver) & 0x7) << 29 | ((cap) & 0x7) << 24 | ((conn) & 0x3) << 22 \
342 (((hw) & 0x7) << 28 | ((fw) & 0x7) << 2
[all...]
/kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/usb/
H A Dpd.h133 ((usbh) << 31 | (usbd) << 30 | ((ufp_cable) & 0x7) << 27 \
134 | (is_modal) << 26 | ((dfp) & 0x7) << 23 | ((conn) & 0x3) << 21 \
209 (((ver) & 0x7) << 29 | ((cap) & 0xf) << 24 | ((conn) & 0x3) << 22 \
210 | ((vcpwr) & 0x7) << 8 | (vcr) << 7 | (vbr) << 6 | ((alt) & 0x7) << 3 \
211 | ((spd) & 0x7))
231 (((ver) & 0x7) << 29 | ((cap) & 0x7) << 24 | ((conn) & 0x3) << 22 \
342 (((hw) & 0x7) << 28 | ((fw) & 0x7) << 2
[all...]
/kernel/linux/linux-5.10/sound/soc/codecs/
H A Dmt6359.h288 #define C_DIGMIC_PHASE_SEL_CH1_CTL_MASK 0x7
289 #define C_DIGMIC_PHASE_SEL_CH1_CTL_MASK_SFT (0x7 << 11)
291 #define C_DIGMIC_PHASE_SEL_CH2_CTL_MASK 0x7
292 #define C_DIGMIC_PHASE_SEL_CH2_CTL_MASK_SFT (0x7 << 8)
319 #define ADDA6_C_DIGMIC_PHASE_SEL_CH1_CTL_MASK 0x7
320 #define ADDA6_C_DIGMIC_PHASE_SEL_CH1_CTL_MASK_SFT (0x7 << 11)
322 #define ADDA6_C_DIGMIC_PHASE_SEL_CH2_CTL_MASK 0x7
323 #define ADDA6_C_DIGMIC_PHASE_SEL_CH2_CTL_MASK_SFT (0x7 << 8)
407 #define CCI_AUDIO_FIFO_WPTR_MASK 0x7
408 #define CCI_AUDIO_FIFO_WPTR_MASK_SFT (0x7 << 1
[all...]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/
H A Dimx8mm-pinfunc.h18 #define MX8MM_IOMUXC_GPIO1_IO00_SJC_FAIL 0x028 0x290 0x000 0x7 0x0
23 #define MX8MM_IOMUXC_GPIO1_IO01_SJC_ACTIVE 0x02C 0x294 0x000 0x7 0x0
27 #define MX8MM_IOMUXC_GPIO1_IO02_SJC_DE_B 0x030 0x298 0x000 0x7 0x0
32 #define MX8MM_IOMUXC_GPIO1_IO03_SJC_DONE 0x034 0x29C 0x000 0x7 0x0
37 #define MX8MM_IOMUXC_GPIO1_IO04_USDHC1_TEST_TRIG 0x038 0x2A0 0x000 0x7 0x0
42 #define MX8MM_IOMUXC_GPIO1_IO05_USDHC2_TEST_TRIG 0x03C 0x2A4 0x000 0x7 0x0
47 #define MX8MM_IOMUXC_GPIO1_IO06_ECSPI1_TEST_TRIG 0x040 0x2A8 0x000 0x7 0x0
52 #define MX8MM_IOMUXC_GPIO1_IO07_ECSPI2_TEST_TRIG 0x044 0x2AC 0x000 0x7 0x0
57 #define MX8MM_IOMUXC_GPIO1_IO08_QSPI_TEST_TRIG 0x048 0x2B0 0x000 0x7 0x0
62 #define MX8MM_IOMUXC_GPIO1_IO09_RAWNAND_TEST_TRIG 0x04C 0x2B4 0x000 0x7
[all...]
H A Dimx8mq-pinfunc.h24 #define MX8MQ_IOMUXC_GPIO1_IO00_SJC_FAIL 0x028 0x290 0x000 0x7 0x0
29 #define MX8MQ_IOMUXC_GPIO1_IO01_SJC_ACTIVE 0x02C 0x294 0x000 0x7 0x0
33 #define MX8MQ_IOMUXC_GPIO1_IO02_SJC_DE_B 0x030 0x298 0x000 0x7 0x0
38 #define MX8MQ_IOMUXC_GPIO1_IO03_SJC_DONE 0x034 0x29C 0x000 0x7 0x0
43 #define MX8MQ_IOMUXC_GPIO1_IO04_USDHC1_TEST_TRIG 0x038 0x2A0 0x000 0x7 0x0
48 #define MX8MQ_IOMUXC_GPIO1_IO05_USDHC2_TEST_TRIG 0x03C 0x2A4 0x000 0x7 0x0
53 #define MX8MQ_IOMUXC_GPIO1_IO06_ECSPI1_TEST_TRIG 0x040 0x2A8 0x000 0x7 0x0
58 #define MX8MQ_IOMUXC_GPIO1_IO07_ECSPI2_TEST_TRIG 0x044 0x2AC 0x000 0x7 0x0
63 #define MX8MQ_IOMUXC_GPIO1_IO08_QSPI_TEST_TRIG 0x048 0x2B0 0x000 0x7 0x0
68 #define MX8MQ_IOMUXC_GPIO1_IO09_RAWNAND_TEST_TRIG 0x04C 0x2B4 0x000 0x7
[all...]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/
H A Dimx8mm-pinfunc.h18 #define MX8MM_IOMUXC_GPIO1_IO00_SJC_FAIL 0x028 0x290 0x000 0x7 0x0
23 #define MX8MM_IOMUXC_GPIO1_IO01_SJC_ACTIVE 0x02C 0x294 0x000 0x7 0x0
27 #define MX8MM_IOMUXC_GPIO1_IO02_SJC_DE_B 0x030 0x298 0x000 0x7 0x0
32 #define MX8MM_IOMUXC_GPIO1_IO03_SJC_DONE 0x034 0x29C 0x000 0x7 0x0
37 #define MX8MM_IOMUXC_GPIO1_IO04_USDHC1_TEST_TRIG 0x038 0x2A0 0x000 0x7 0x0
42 #define MX8MM_IOMUXC_GPIO1_IO05_USDHC2_TEST_TRIG 0x03C 0x2A4 0x000 0x7 0x0
47 #define MX8MM_IOMUXC_GPIO1_IO06_ECSPI1_TEST_TRIG 0x040 0x2A8 0x000 0x7 0x0
52 #define MX8MM_IOMUXC_GPIO1_IO07_ECSPI2_TEST_TRIG 0x044 0x2AC 0x000 0x7 0x0
57 #define MX8MM_IOMUXC_GPIO1_IO08_QSPI_TEST_TRIG 0x048 0x2B0 0x000 0x7 0x0
62 #define MX8MM_IOMUXC_GPIO1_IO09_RAWNAND_TEST_TRIG 0x04C 0x2B4 0x000 0x7
[all...]
H A Dimx8mq-pinfunc.h24 #define MX8MQ_IOMUXC_GPIO1_IO00_SJC_FAIL 0x028 0x290 0x000 0x7 0x0
29 #define MX8MQ_IOMUXC_GPIO1_IO01_SJC_ACTIVE 0x02C 0x294 0x000 0x7 0x0
33 #define MX8MQ_IOMUXC_GPIO1_IO02_SJC_DE_B 0x030 0x298 0x000 0x7 0x0
38 #define MX8MQ_IOMUXC_GPIO1_IO03_SJC_DONE 0x034 0x29C 0x000 0x7 0x0
43 #define MX8MQ_IOMUXC_GPIO1_IO04_USDHC1_TEST_TRIG 0x038 0x2A0 0x000 0x7 0x0
48 #define MX8MQ_IOMUXC_GPIO1_IO05_USDHC2_TEST_TRIG 0x03C 0x2A4 0x000 0x7 0x0
53 #define MX8MQ_IOMUXC_GPIO1_IO06_ECSPI1_TEST_TRIG 0x040 0x2A8 0x000 0x7 0x0
58 #define MX8MQ_IOMUXC_GPIO1_IO07_ECSPI2_TEST_TRIG 0x044 0x2AC 0x000 0x7 0x0
63 #define MX8MQ_IOMUXC_GPIO1_IO08_QSPI_TEST_TRIG 0x048 0x2B0 0x000 0x7 0x0
68 #define MX8MQ_IOMUXC_GPIO1_IO09_RAWNAND_TEST_TRIG 0x04C 0x2B4 0x000 0x7
[all...]
/kernel/linux/linux-5.10/scripts/dtc/include-prefixes/arm64/freescale/
H A Dimx8mm-pinfunc.h18 #define MX8MM_IOMUXC_GPIO1_IO00_SJC_FAIL 0x028 0x290 0x000 0x7 0x0
23 #define MX8MM_IOMUXC_GPIO1_IO01_SJC_ACTIVE 0x02C 0x294 0x000 0x7 0x0
27 #define MX8MM_IOMUXC_GPIO1_IO02_SJC_DE_B 0x030 0x298 0x000 0x7 0x0
32 #define MX8MM_IOMUXC_GPIO1_IO03_SJC_DONE 0x034 0x29C 0x000 0x7 0x0
37 #define MX8MM_IOMUXC_GPIO1_IO04_USDHC1_TEST_TRIG 0x038 0x2A0 0x000 0x7 0x0
42 #define MX8MM_IOMUXC_GPIO1_IO05_USDHC2_TEST_TRIG 0x03C 0x2A4 0x000 0x7 0x0
47 #define MX8MM_IOMUXC_GPIO1_IO06_ECSPI1_TEST_TRIG 0x040 0x2A8 0x000 0x7 0x0
52 #define MX8MM_IOMUXC_GPIO1_IO07_ECSPI2_TEST_TRIG 0x044 0x2AC 0x000 0x7 0x0
57 #define MX8MM_IOMUXC_GPIO1_IO08_QSPI_TEST_TRIG 0x048 0x2B0 0x000 0x7 0x0
62 #define MX8MM_IOMUXC_GPIO1_IO09_RAWNAND_TEST_TRIG 0x04C 0x2B4 0x000 0x7
[all...]
H A Dimx8mq-pinfunc.h24 #define MX8MQ_IOMUXC_GPIO1_IO00_SJC_FAIL 0x028 0x290 0x000 0x7 0x0
29 #define MX8MQ_IOMUXC_GPIO1_IO01_SJC_ACTIVE 0x02C 0x294 0x000 0x7 0x0
33 #define MX8MQ_IOMUXC_GPIO1_IO02_SJC_DE_B 0x030 0x298 0x000 0x7 0x0
38 #define MX8MQ_IOMUXC_GPIO1_IO03_SJC_DONE 0x034 0x29C 0x000 0x7 0x0
43 #define MX8MQ_IOMUXC_GPIO1_IO04_USDHC1_TEST_TRIG 0x038 0x2A0 0x000 0x7 0x0
48 #define MX8MQ_IOMUXC_GPIO1_IO05_USDHC2_TEST_TRIG 0x03C 0x2A4 0x000 0x7 0x0
53 #define MX8MQ_IOMUXC_GPIO1_IO06_ECSPI1_TEST_TRIG 0x040 0x2A8 0x000 0x7 0x0
58 #define MX8MQ_IOMUXC_GPIO1_IO07_ECSPI2_TEST_TRIG 0x044 0x2AC 0x000 0x7 0x0
63 #define MX8MQ_IOMUXC_GPIO1_IO08_QSPI_TEST_TRIG 0x048 0x2B0 0x000 0x7 0x0
68 #define MX8MQ_IOMUXC_GPIO1_IO09_RAWNAND_TEST_TRIG 0x04C 0x2B4 0x000 0x7
[all...]
/kernel/linux/linux-6.6/scripts/dtc/include-prefixes/arm64/freescale/
H A Dimx8mm-pinfunc.h18 #define MX8MM_IOMUXC_GPIO1_IO00_SJC_FAIL 0x028 0x290 0x000 0x7 0x0
23 #define MX8MM_IOMUXC_GPIO1_IO01_SJC_ACTIVE 0x02C 0x294 0x000 0x7 0x0
27 #define MX8MM_IOMUXC_GPIO1_IO02_SJC_DE_B 0x030 0x298 0x000 0x7 0x0
32 #define MX8MM_IOMUXC_GPIO1_IO03_SJC_DONE 0x034 0x29C 0x000 0x7 0x0
37 #define MX8MM_IOMUXC_GPIO1_IO04_USDHC1_TEST_TRIG 0x038 0x2A0 0x000 0x7 0x0
42 #define MX8MM_IOMUXC_GPIO1_IO05_USDHC2_TEST_TRIG 0x03C 0x2A4 0x000 0x7 0x0
47 #define MX8MM_IOMUXC_GPIO1_IO06_ECSPI1_TEST_TRIG 0x040 0x2A8 0x000 0x7 0x0
52 #define MX8MM_IOMUXC_GPIO1_IO07_ECSPI2_TEST_TRIG 0x044 0x2AC 0x000 0x7 0x0
57 #define MX8MM_IOMUXC_GPIO1_IO08_QSPI_TEST_TRIG 0x048 0x2B0 0x000 0x7 0x0
62 #define MX8MM_IOMUXC_GPIO1_IO09_RAWNAND_TEST_TRIG 0x04C 0x2B4 0x000 0x7
[all...]
H A Dimx8mq-pinfunc.h24 #define MX8MQ_IOMUXC_GPIO1_IO00_SJC_FAIL 0x028 0x290 0x000 0x7 0x0
29 #define MX8MQ_IOMUXC_GPIO1_IO01_SJC_ACTIVE 0x02C 0x294 0x000 0x7 0x0
33 #define MX8MQ_IOMUXC_GPIO1_IO02_SJC_DE_B 0x030 0x298 0x000 0x7 0x0
38 #define MX8MQ_IOMUXC_GPIO1_IO03_SJC_DONE 0x034 0x29C 0x000 0x7 0x0
43 #define MX8MQ_IOMUXC_GPIO1_IO04_USDHC1_TEST_TRIG 0x038 0x2A0 0x000 0x7 0x0
48 #define MX8MQ_IOMUXC_GPIO1_IO05_USDHC2_TEST_TRIG 0x03C 0x2A4 0x000 0x7 0x0
53 #define MX8MQ_IOMUXC_GPIO1_IO06_ECSPI1_TEST_TRIG 0x040 0x2A8 0x000 0x7 0x0
58 #define MX8MQ_IOMUXC_GPIO1_IO07_ECSPI2_TEST_TRIG 0x044 0x2AC 0x000 0x7 0x0
63 #define MX8MQ_IOMUXC_GPIO1_IO08_QSPI_TEST_TRIG 0x048 0x2B0 0x000 0x7 0x0
68 #define MX8MQ_IOMUXC_GPIO1_IO09_RAWNAND_TEST_TRIG 0x04C 0x2B4 0x000 0x7
[all...]
/kernel/linux/linux-6.6/arch/x86/crypto/
H A Daria-aesni-avx-asm_64.S172 x4, x5, x6, x7, \
183 vmovdqu (7 * 16)(rio), x7; \
195 x4, x5, x6, x7, \
200 x4, x5, x6, x7, \
212 vmovdqu x7, 7 * 16(mem_ab); \
223 x4, x5, x6, x7, \
234 vmovdqu x7, 7 * 16(mem); \
245 x4, x5, x6, x7, \
254 vmovdqu x7, ((idx + 7) * 16)(mem_tmp);
257 x4, x5, x6, x7, \
[all...]
/kernel/linux/linux-5.10/sound/ppc/
H A Dsnd_ps3_reg.h167 #define PS3_AUDIO_AX_ISBP_SPOBRN_MASK(n) (0x7 << 4 * (1 - (n))) /* R-IUF */
168 #define PS3_AUDIO_AX_ISBP_SPO1BRN_MASK (0x7 << 0) /* R-IUF */
169 #define PS3_AUDIO_AX_ISBP_SPO0BRN_MASK (0x7 << 4) /* R-IUF */
175 #define PS3_AUDIO_AX_ISBP_SPOBWN_MASK(n) (0x7 << 4 * (5 - (n))) /* R-IUF */
176 #define PS3_AUDIO_AX_ISBP_SPO1BWN_MASK (0x7 << 16) /* R-IUF */
177 #define PS3_AUDIO_AX_ISBP_SPO0BWN_MASK (0x7 << 20) /* R-IUF */
195 #define PS3_AUDIO_AX_AOBP_ASOBRN_MASK(n) (0x7 << 4 * (3 - (n))) /* R-IUF */
197 #define PS3_AUDIO_AX_AOBP_ASO3BRN_MASK (0x7 << 0) /* R-IUF */
198 #define PS3_AUDIO_AX_AOBP_ASO2BRN_MASK (0x7 << 4) /* R-IUF */
199 #define PS3_AUDIO_AX_AOBP_ASO1BRN_MASK (0x7 <<
[all...]
/kernel/linux/linux-6.6/sound/ppc/
H A Dsnd_ps3_reg.h167 #define PS3_AUDIO_AX_ISBP_SPOBRN_MASK(n) (0x7 << 4 * (1 - (n))) /* R-IUF */
168 #define PS3_AUDIO_AX_ISBP_SPO1BRN_MASK (0x7 << 0) /* R-IUF */
169 #define PS3_AUDIO_AX_ISBP_SPO0BRN_MASK (0x7 << 4) /* R-IUF */
175 #define PS3_AUDIO_AX_ISBP_SPOBWN_MASK(n) (0x7 << 4 * (5 - (n))) /* R-IUF */
176 #define PS3_AUDIO_AX_ISBP_SPO1BWN_MASK (0x7 << 16) /* R-IUF */
177 #define PS3_AUDIO_AX_ISBP_SPO0BWN_MASK (0x7 << 20) /* R-IUF */
195 #define PS3_AUDIO_AX_AOBP_ASOBRN_MASK(n) (0x7 << 4 * (3 - (n))) /* R-IUF */
197 #define PS3_AUDIO_AX_AOBP_ASO3BRN_MASK (0x7 << 0) /* R-IUF */
198 #define PS3_AUDIO_AX_AOBP_ASO2BRN_MASK (0x7 << 4) /* R-IUF */
199 #define PS3_AUDIO_AX_AOBP_ASO1BRN_MASK (0x7 <<
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/kernel/linux/linux-5.10/include/linux/usb/
H A Dpd_vdo.h40 #define VDO_OPOS_MASK VDO_OPOS(0x7)
77 #define PD_VDO_OPOS(vdo) (((vdo) >> 8) & 0x7)
119 ((usbh) << 31 | (usbd) << 30 | ((ptype) & 0x7) << 27 \
122 #define PD_IDH_PTYPE(vdo) (((vdo) >> 27) & 0x7)
206 (((hw) & 0x7) << 28 | ((fw) & 0x7) << 24 | ((cbl) & 0x3) << 18 \
207 | (gdr) << 17 | ((lat) & 0x7) << 13 | ((term) & 0x3) << 11 \
210 | ((usbss) & 0x7))
228 (((hw) & 0x7) << 28 | ((fw) & 0x7) << 2
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/kernel/linux/linux-6.6/sound/soc/codecs/
H A Drt5677.h375 #define RT5677_ST_HPF_SEL_MASK (0x7 << 13)
379 #define RT5677_ST_SEL_MASK (0x7 << 9)
397 #define RT5677_SEL_DAC4_L_SRC_MASK (0x7 << 12)
401 #define RT5677_SEL_DAC4_R_SRC_MASK (0x7 << 8)
405 #define RT5677_SEL_DAC3_L_SRC_MASK (0x7 << 4)
409 #define RT5677_SEL_DAC3_R_SRC_MASK (0x7 << 0)
439 #define RT5677_SEL_DAC2_L_SRC_MASK (0x7 << 4)
443 #define RT5677_SEL_DAC2_R_SRC_MASK (0x7 << 0)
607 #define RT5677_DAC1_L_SEL_MASK (0x7 << 8)
822 #define RT5677_IF1_ADC_CTRL_MASK (0x7 <<
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