| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
| H A D | smu_v13_0_10.c | 32 static bool smu_v13_0_10_is_mode2_default(struct amdgpu_reset_control *reset_ctl) in smu_v13_0_10_is_mode2_default() argument
34 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in smu_v13_0_10_is_mode2_default()
42 smu_v13_0_10_get_reset_handler(struct amdgpu_reset_control *reset_ctl, in smu_v13_0_10_get_reset_handler() argument
46 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in smu_v13_0_10_get_reset_handler()
49 list_for_each_entry(handler, &reset_ctl->reset_handlers, in smu_v13_0_10_get_reset_handler()
56 if (smu_v13_0_10_is_mode2_default(reset_ctl) && in smu_v13_0_10_get_reset_handler()
58 list_for_each_entry (handler, &reset_ctl->reset_handlers, in smu_v13_0_10_get_reset_handler()
99 smu_v13_0_10_mode2_prepare_hwcontext(struct amdgpu_reset_control *reset_ctl, in smu_v13_0_10_mode2_prepare_hwcontext() argument
103 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in smu_v13_0_10_mode2_prepare_hwcontext()
119 struct amdgpu_reset_control *reset_ctl in smu_v13_0_10_async_reset() local
133 smu_v13_0_10_mode2_perform_reset(struct amdgpu_reset_control *reset_ctl, struct amdgpu_reset_context *reset_context) smu_v13_0_10_mode2_perform_reset() argument
231 smu_v13_0_10_mode2_restore_hwcontext(struct amdgpu_reset_control *reset_ctl, struct amdgpu_reset_context *reset_context) smu_v13_0_10_mode2_restore_hwcontext() argument
277 struct amdgpu_reset_control *reset_ctl; smu_v13_0_10_reset_init() local
[all...] |
| H A D | sienna_cichlid.c | 34 static bool sienna_cichlid_is_mode2_default(struct amdgpu_reset_control *reset_ctl) in sienna_cichlid_is_mode2_default() argument
37 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in sienna_cichlid_is_mode2_default()
47 sienna_cichlid_get_reset_handler(struct amdgpu_reset_control *reset_ctl, in sienna_cichlid_get_reset_handler() argument
53 list_for_each_entry(handler, &reset_ctl->reset_handlers, in sienna_cichlid_get_reset_handler()
60 if (sienna_cichlid_is_mode2_default(reset_ctl)) { in sienna_cichlid_get_reset_handler()
61 list_for_each_entry (handler, &reset_ctl->reset_handlers, in sienna_cichlid_get_reset_handler()
100 sienna_cichlid_mode2_prepare_hwcontext(struct amdgpu_reset_control *reset_ctl, in sienna_cichlid_mode2_prepare_hwcontext() argument
104 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in sienna_cichlid_mode2_prepare_hwcontext()
120 struct amdgpu_reset_control *reset_ctl = in sienna_cichlid_async_reset() local
122 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl in sienna_cichlid_async_reset()
142 sienna_cichlid_mode2_perform_reset(struct amdgpu_reset_control *reset_ctl, struct amdgpu_reset_context *reset_context) sienna_cichlid_mode2_perform_reset() argument
236 sienna_cichlid_mode2_restore_hwcontext(struct amdgpu_reset_control *reset_ctl, struct amdgpu_reset_context *reset_context) sienna_cichlid_mode2_restore_hwcontext() argument
286 struct amdgpu_reset_control *reset_ctl; sienna_cichlid_reset_init() local
[all...] |
| H A D | aldebaran.c | 34 static bool aldebaran_is_mode2_default(struct amdgpu_reset_control *reset_ctl) in aldebaran_is_mode2_default() argument
36 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in aldebaran_is_mode2_default()
46 aldebaran_get_reset_handler(struct amdgpu_reset_control *reset_ctl, in aldebaran_get_reset_handler() argument
50 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in aldebaran_get_reset_handler()
55 list_for_each_entry(handler, &reset_ctl->reset_handlers, in aldebaran_get_reset_handler()
62 if (aldebaran_is_mode2_default(reset_ctl)) { in aldebaran_get_reset_handler()
63 list_for_each_entry(handler, &reset_ctl->reset_handlers, in aldebaran_get_reset_handler()
107 aldebaran_mode2_prepare_hwcontext(struct amdgpu_reset_control *reset_ctl, in aldebaran_mode2_prepare_hwcontext() argument
111 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in aldebaran_mode2_prepare_hwcontext()
124 struct amdgpu_reset_control *reset_ctl in aldebaran_async_reset() local
147 aldebaran_mode2_perform_reset(struct amdgpu_reset_control *reset_ctl, struct amdgpu_reset_context *reset_context) aldebaran_mode2_perform_reset() argument
331 aldebaran_mode2_restore_hwcontext(struct amdgpu_reset_control *reset_ctl, struct amdgpu_reset_context *reset_context) aldebaran_mode2_restore_hwcontext() argument
424 struct amdgpu_reset_control *reset_ctl; aldebaran_reset_init() local
[all...] |
| H A D | amdgpu_reset.h | 48 int (*prepare_env)(struct amdgpu_reset_control *reset_ctl,
50 int (*prepare_hwcontext)(struct amdgpu_reset_control *reset_ctl,
52 int (*perform_reset)(struct amdgpu_reset_control *reset_ctl,
54 int (*restore_hwcontext)(struct amdgpu_reset_control *reset_ctl,
56 int (*restore_env)(struct amdgpu_reset_control *reset_ctl,
70 struct amdgpu_reset_control *reset_ctl,
100 int amdgpu_reset_add_handler(struct amdgpu_reset_control *reset_ctl,
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| H A D | amdgpu_reset.c | 29 int amdgpu_reset_add_handler(struct amdgpu_reset_control *reset_ctl, in amdgpu_reset_add_handler() argument
33 list_add_tail(&handler->handler_list, &reset_ctl->reset_handlers); in amdgpu_reset_add_handler()
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/mediatek/ |
| H A D | mtk_disp_merge.c | 70 struct reset_control *reset_ctl; member
107 reset_control_reset(priv->reset_ctl); in mtk_merge_stop_cmdq()
272 priv->reset_ctl = devm_reset_control_get_optional_exclusive(dev, NULL); in mtk_disp_merge_probe()
273 if (IS_ERR(priv->reset_ctl)) in mtk_disp_merge_probe()
274 return PTR_ERR(priv->reset_ctl); in mtk_disp_merge_probe()
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| H A D | mtk_ethdr.c | 82 struct reset_control *reset_ctl; member
251 reset_control_reset(priv->reset_ctl); in mtk_ethdr_stop()
334 priv->reset_ctl = devm_reset_control_array_get_optional_exclusive(dev); in mtk_ethdr_probe()
335 if (IS_ERR(priv->reset_ctl)) { in mtk_ethdr_probe()
336 dev_err_probe(dev, PTR_ERR(priv->reset_ctl), "cannot get ethdr reset control\n"); in mtk_ethdr_probe()
337 return PTR_ERR(priv->reset_ctl); in mtk_ethdr_probe()
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