| /kernel/linux/linux-6.6/drivers/clk/imx/ |
| H A D | clk-imxrt1050.c | 21 static const char * const pll5_bypass_sels[] = {"pll5_video", "pll5_video_ref_sel", }; variable
92 pll5_bypass_sels, ARRAY_SIZE(pll5_bypass_sels), CLK_SET_RATE_PARENT); in imxrt1050_clocks_probe()
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| H A D | clk-imx6sll.c | 27 static const char *pll5_bypass_sels[] = { "pll5", "pll5_bypass_src", }; variable
135 hws[IMX6SLL_PLL5_BYPASS] = imx_clk_hw_mux_flags("pll5_bypass", base + 0xa0, 16, 1, pll5_bypass_sels, ARRAY_SIZE(pll5_bypass_sels), CLK_SET_RATE_PARENT); in imx6sll_clocks_init()
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| H A D | clk-vf610.c | 81 static const char *pll5_bypass_sels[] = { "pll5", "pll5_bypass_src", }; variable
231 clk[VF610_PLL5_BYPASS] = imx_clk_mux_flags("pll5_bypass", PLL5_CTRL, 16, 1, pll5_bypass_sels, ARRAY_SIZE(pll5_bypass_sels), CLK_SET_RATE_PARENT); in vf610_clocks_init()
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| H A D | clk-imx6sl.c | 68 static const char *pll5_bypass_sels[] = { "pll5", "pll5_bypass_src", }; variable
229 hws[IMX6SL_PLL5_BYPASS] = imx_clk_hw_mux_flags("pll5_bypass", base + 0xa0, 16, 1, pll5_bypass_sels, ARRAY_SIZE(pll5_bypass_sels), CLK_SET_RATE_PARENT); in imx6sl_clocks_init()
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| H A D | clk-imx6sx.c | 81 static const char *pll5_bypass_sels[] = { "pll5", "pll5_bypass_src", }; variable
172 hws[IMX6SX_PLL5_BYPASS] = imx_clk_hw_mux_flags("pll5_bypass", base + 0xa0, 16, 1, pll5_bypass_sels, ARRAY_SIZE(pll5_bypass_sels), CLK_SET_RATE_PARENT); in imx6sx_clocks_init()
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| H A D | clk-imx6ul.c | 26 static const char *pll5_bypass_sels[] = { "pll5", "pll5_bypass_src", }; variable
175 hws[IMX6UL_PLL5_BYPASS] = imx_clk_hw_mux_flags("pll5_bypass", base + 0xa0, 16, 1, pll5_bypass_sels, ARRAY_SIZE(pll5_bypass_sels), CLK_SET_RATE_PARENT); in imx6ul_clocks_init()
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| H A D | clk-imx6q.c | 89 static const char *pll5_bypass_sels[] = { "pll5", "pll5_bypass_src", }; variable
494 hws[IMX6QDL_PLL5_BYPASS] = imx_clk_hw_mux_flags("pll5_bypass", base + 0xa0, 16, 1, pll5_bypass_sels, ARRAY_SIZE(pll5_bypass_sels), CLK_SET_RATE_PARENT); in imx6q_clocks_init()
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| /kernel/linux/linux-5.10/drivers/clk/imx/ |
| H A D | clk-imx6sll.c | 27 static const char *pll5_bypass_sels[] = { "pll5", "pll5_bypass_src", }; variable
135 hws[IMX6SLL_PLL5_BYPASS] = imx_clk_hw_mux_flags("pll5_bypass", base + 0xa0, 16, 1, pll5_bypass_sels, ARRAY_SIZE(pll5_bypass_sels), CLK_SET_RATE_PARENT); in imx6sll_clocks_init()
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| H A D | clk-imx6sl.c | 67 static const char *pll5_bypass_sels[] = { "pll5", "pll5_bypass_src", }; variable
228 hws[IMX6SL_PLL5_BYPASS] = imx_clk_hw_mux_flags("pll5_bypass", base + 0xa0, 16, 1, pll5_bypass_sels, ARRAY_SIZE(pll5_bypass_sels), CLK_SET_RATE_PARENT); in imx6sl_clocks_init()
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| H A D | clk-vf610.c | 81 static const char *pll5_bypass_sels[] = { "pll5", "pll5_bypass_src", }; variable
231 clk[VF610_PLL5_BYPASS] = imx_clk_mux_flags("pll5_bypass", PLL5_CTRL, 16, 1, pll5_bypass_sels, ARRAY_SIZE(pll5_bypass_sels), CLK_SET_RATE_PARENT); in vf610_clocks_init()
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| H A D | clk-imx6ul.c | 25 static const char *pll5_bypass_sels[] = { "pll5", "pll5_bypass_src", }; variable
161 hws[IMX6UL_PLL5_BYPASS] = imx_clk_hw_mux_flags("pll5_bypass", base + 0xa0, 16, 1, pll5_bypass_sels, ARRAY_SIZE(pll5_bypass_sels), CLK_SET_RATE_PARENT); in imx6ul_clocks_init()
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| H A D | clk-imx6sx.c | 81 static const char *pll5_bypass_sels[] = { "pll5", "pll5_bypass_src", }; variable
172 hws[IMX6SX_PLL5_BYPASS] = imx_clk_hw_mux_flags("pll5_bypass", base + 0xa0, 16, 1, pll5_bypass_sels, ARRAY_SIZE(pll5_bypass_sels), CLK_SET_RATE_PARENT); in imx6sx_clocks_init()
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| H A D | clk-imx6q.c | 88 static const char *pll5_bypass_sels[] = { "pll5", "pll5_bypass_src", }; variable
489 hws[IMX6QDL_PLL5_BYPASS] = imx_clk_hw_mux_flags("pll5_bypass", base + 0xa0, 16, 1, pll5_bypass_sels, ARRAY_SIZE(pll5_bypass_sels), CLK_SET_RATE_PARENT); in imx6q_clocks_init()
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