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Searched refs:intid (Results 1 - 25 of 49) sorted by relevance

12

/kernel/linux/linux-6.6/tools/testing/selftests/kvm/include/aarch64/
H A Dgic.h20 #define INTID_IS_SGI(intid) (0 <= (intid) && (intid) < MIN_PPI)
21 #define INTID_IS_PPI(intid) (MIN_PPI <= (intid) && (intid) < MIN_SPI)
22 #define INTID_IS_SPI(intid) (MIN_SPI <= (intid) && (intid) <= MAX_SPI)
26 void gic_irq_enable(unsigned int intid);
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H A Dvgic.h24 void kvm_irq_set_level_info(int gic_fd, uint32_t intid, int level);
25 int _kvm_irq_set_level_info(int gic_fd, uint32_t intid, int level);
27 void kvm_arm_irq_line(struct kvm_vm *vm, uint32_t intid, int level);
28 int _kvm_arm_irq_line(struct kvm_vm *vm, uint32_t intid, int level);
31 void kvm_irq_write_ispendr(int gic_fd, uint32_t intid, struct kvm_vcpu *vcpu);
32 void kvm_irq_write_isactiver(int gic_fd, uint32_t intid, struct kvm_vcpu *vcpu);
/kernel/linux/linux-6.6/tools/testing/selftests/kvm/aarch64/
H A Dvgic_irq.c7 * host to inject a specific intid via a GUEST_SYNC call, and then checks that
86 #define _KVM_INJECT_MULTI(cmd, intid, num, expect_failure) \
87 kvm_inject_call(cmd, intid, num, -1 /* not used */, expect_failure)
89 #define KVM_INJECT_MULTI(cmd, intid, num) \
90 _KVM_INJECT_MULTI(cmd, intid, num, false)
92 #define _KVM_INJECT(cmd, intid, expect_failure) \
93 _KVM_INJECT_MULTI(cmd, intid, 1, expect_failure)
95 #define KVM_INJECT(cmd, intid) \
96 _KVM_INJECT_MULTI(cmd, intid, 1, false)
98 #define KVM_ACTIVATE(cmd, intid) \
171 uint32_t intid = gic_get_and_ack_irq(); guest_irq_generic_handler() local
245 guest_set_irq_line(uint32_t intid, uint32_t level) guest_set_irq_line() argument
250 test_inject_fail(struct test_args *args, uint32_t intid, kvm_inject_cmd cmd) test_inject_fail() argument
304 uint32_t prio, intid, ap1r; guest_restore_active() local
353 uint32_t intid; wait_for_and_activate_irq() local
372 uint32_t intid, prio, step = KVM_PRIO_STEPS; test_inject_preemption() local
516 kvm_irq_line_check(struct kvm_vm *vm, uint32_t intid, int level, struct test_args *test_args, bool expect_failure) kvm_irq_line_check() argument
535 kvm_irq_set_level_info_check(int gic_fd, uint32_t intid, int level, bool expect_failure) kvm_irq_set_level_info_check() argument
559 kvm_set_gsi_routing_irqchip_check(struct kvm_vm *vm, uint32_t intid, uint32_t num, uint32_t kvm_max_routes, bool expect_failure) kvm_set_gsi_routing_irqchip_check() argument
589 kvm_irq_write_ispendr_check(int gic_fd, uint32_t intid, struct kvm_vcpu *vcpu, bool expect_failure) kvm_irq_write_ispendr_check() argument
604 kvm_routing_and_irqfd_check(struct kvm_vm *vm, uint32_t intid, uint32_t num, uint32_t kvm_max_routes, bool expect_failure) kvm_routing_and_irqfd_check() argument
666 uint32_t intid = inject_args->first_intid; run_guest_cmd() local
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H A Darch_timer.c118 static void guest_validate_irq(unsigned int intid, in guest_validate_irq() argument
127 if (intid == IAR_SPURIOUS) in guest_validate_irq()
157 GUEST_ASSERT_EQ(intid, timer_irq); in guest_validate_irq()
170 unsigned int intid = gic_get_and_ack_irq(); in guest_irq_handler() local
174 guest_validate_irq(intid, shared_data); in guest_irq_handler()
176 gic_set_eoi(intid); in guest_irq_handler()
/kernel/linux/linux-6.6/tools/testing/selftests/kvm/lib/aarch64/
H A Dgic.c66 void gic_irq_enable(unsigned int intid) in gic_irq_enable() argument
69 gic_common_ops->gic_irq_enable(intid); in gic_irq_enable()
72 void gic_irq_disable(unsigned int intid) in gic_irq_disable() argument
75 gic_common_ops->gic_irq_disable(intid); in gic_irq_disable()
81 unsigned int intid; in gic_get_and_ack_irq() local
86 intid = irqstat & GENMASK(23, 0); in gic_get_and_ack_irq()
88 return intid; in gic_get_and_ack_irq()
91 void gic_set_eoi(unsigned int intid) in gic_set_eoi() argument
94 gic_common_ops->gic_write_eoir(intid); in gic_set_eoi()
97 void gic_set_dir(unsigned int intid) in gic_set_dir() argument
115 gic_set_priority(unsigned int intid, unsigned int prio) gic_set_priority() argument
121 gic_irq_set_active(unsigned int intid) gic_irq_set_active() argument
127 gic_irq_clear_active(unsigned int intid) gic_irq_clear_active() argument
133 gic_irq_get_active(unsigned int intid) gic_irq_get_active() argument
139 gic_irq_set_pending(unsigned int intid) gic_irq_set_pending() argument
145 gic_irq_clear_pending(unsigned int intid) gic_irq_clear_pending() argument
151 gic_irq_get_pending(unsigned int intid) gic_irq_get_pending() argument
157 gic_irq_set_config(unsigned int intid, bool is_edge) gic_irq_set_config() argument
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H A Dgic_v3.c62 static enum gicv3_intid_range get_intid_range(unsigned int intid) in get_intid_range() argument
64 switch (intid) { in get_intid_range()
153 static void gicv3_access_reg(uint32_t intid, uint64_t offset, in gicv3_access_reg() argument
158 enum gicv3_intid_range intid_range = get_intid_range(intid); in gicv3_access_reg()
171 index = intid % fields_per_reg; in gicv3_access_reg()
175 /* Set offset to the actual register holding intid's config. */ in gicv3_access_reg()
176 offset += (intid / fields_per_reg) * (reg_bits / 8); in gicv3_access_reg()
185 static void gicv3_write_reg(uint32_t intid, uint64_t offset, in gicv3_write_reg() argument
188 gicv3_access_reg(intid, offset, reg_bits, in gicv3_write_reg()
192 static uint32_t gicv3_read_reg(uint32_t intid, uint64_ argument
202 gicv3_set_priority(uint32_t intid, uint32_t prio) gicv3_set_priority() argument
208 gicv3_irq_set_config(uint32_t intid, bool is_edge) gicv3_irq_set_config() argument
218 gicv3_irq_enable(uint32_t intid) gicv3_irq_enable() argument
227 gicv3_irq_disable(uint32_t intid) gicv3_irq_disable() argument
236 gicv3_irq_set_active(uint32_t intid) gicv3_irq_set_active() argument
241 gicv3_irq_clear_active(uint32_t intid) gicv3_irq_clear_active() argument
246 gicv3_irq_get_active(uint32_t intid) gicv3_irq_get_active() argument
251 gicv3_irq_set_pending(uint32_t intid) gicv3_irq_set_pending() argument
256 gicv3_irq_clear_pending(uint32_t intid) gicv3_irq_clear_pending() argument
261 gicv3_irq_get_pending(uint32_t intid) gicv3_irq_get_pending() argument
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H A Dvgic.c83 int _kvm_irq_set_level_info(int gic_fd, uint32_t intid, int level) in _kvm_irq_set_level_info() argument
85 uint64_t attr = 32 * (intid / 32); in _kvm_irq_set_level_info()
86 uint64_t index = intid % 32; in _kvm_irq_set_level_info()
101 void kvm_irq_set_level_info(int gic_fd, uint32_t intid, int level) in kvm_irq_set_level_info() argument
103 int ret = _kvm_irq_set_level_info(gic_fd, intid, level); in kvm_irq_set_level_info()
108 int _kvm_arm_irq_line(struct kvm_vm *vm, uint32_t intid, int level) in _kvm_arm_irq_line() argument
110 uint32_t irq = intid & KVM_ARM_IRQ_NUM_MASK; in _kvm_arm_irq_line()
112 TEST_ASSERT(!INTID_IS_SGI(intid), "KVM_IRQ_LINE's interface itself " in _kvm_arm_irq_line()
115 if (INTID_IS_PPI(intid)) in _kvm_arm_irq_line()
123 void kvm_arm_irq_line(struct kvm_vm *vm, uint32_t intid, in argument
130 vgic_poke_irq(int gic_fd, uint32_t intid, struct kvm_vcpu *vcpu, uint64_t reg_off) vgic_poke_irq() argument
162 kvm_irq_write_ispendr(int gic_fd, uint32_t intid, struct kvm_vcpu *vcpu) kvm_irq_write_ispendr() argument
167 kvm_irq_write_isactiver(int gic_fd, uint32_t intid, struct kvm_vcpu *vcpu) kvm_irq_write_isactiver() argument
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H A Dgic_private.h13 void (*gic_irq_enable)(unsigned int intid);
14 void (*gic_irq_disable)(unsigned int intid);
20 void (*gic_set_priority)(uint32_t intid, uint32_t prio);
21 void (*gic_irq_set_active)(uint32_t intid);
22 void (*gic_irq_clear_active)(uint32_t intid);
23 bool (*gic_irq_get_active)(uint32_t intid);
24 void (*gic_irq_set_pending)(uint32_t intid);
25 void (*gic_irq_clear_pending)(uint32_t intid);
26 bool (*gic_irq_get_pending)(uint32_t intid);
27 void (*gic_irq_set_config)(uint32_t intid, boo
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/kernel/linux/linux-5.10/arch/arm64/kvm/vgic/
H A Dvgic-mmio.c47 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); in vgic_mmio_read_group() local
53 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_mmio_read_group()
72 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); in vgic_mmio_write_group() local
77 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_mmio_write_group()
81 if (irq->hw && vgic_irq_is_sgi(irq->intid)) { in vgic_mmio_write_group()
99 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); in vgic_mmio_read_enable() local
105 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_mmio_read_enable()
120 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); in vgic_mmio_write_senable() local
125 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_mmio_write_senable()
128 if (irq->hw && vgic_irq_is_sgi(irq->intid)) { in vgic_mmio_write_senable()
169 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); vgic_mmio_write_cenable() local
191 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); vgic_uaccess_write_senable() local
212 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); vgic_uaccess_write_cenable() local
233 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); __read_pending() local
289 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); vgic_mmio_write_spending() local
331 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); vgic_uaccess_write_spending() local
382 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); vgic_mmio_write_cpending() local
425 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); vgic_uaccess_write_cpending() local
466 vgic_access_active_prepare(struct kvm_vcpu *vcpu, u32 intid) vgic_access_active_prepare() argument
474 vgic_access_active_finish(struct kvm_vcpu *vcpu, u32 intid) vgic_access_active_finish() argument
484 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); __vgic_mmio_read_active() local
508 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); vgic_mmio_read_active() local
590 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); __vgic_mmio_write_cactive() local
604 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); vgic_mmio_write_cactive() local
627 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); __vgic_mmio_write_sactive() local
641 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); vgic_mmio_write_sactive() local
663 u32 intid = VGIC_ADDR_TO_INTID(addr, 8); vgic_mmio_read_priority() local
689 u32 intid = VGIC_ADDR_TO_INTID(addr, 8); vgic_mmio_write_priority() local
710 u32 intid = VGIC_ADDR_TO_INTID(addr, 2); vgic_mmio_read_config() local
730 u32 intid = VGIC_ADDR_TO_INTID(addr, 2); vgic_mmio_write_config() local
759 vgic_read_irq_line_level_info(struct kvm_vcpu *vcpu, u32 intid) vgic_read_irq_line_level_info() argument
781 vgic_write_irq_line_level_info(struct kvm_vcpu *vcpu, u32 intid, const u64 val) vgic_write_irq_line_level_info() argument
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H A Dvgic-debug.c31 int intid; member
43 iter->intid++; in iter_next()
44 if (iter->intid == VGIC_NR_PRIVATE_IRQS && in iter_next()
46 iter->intid = 0; in iter_next()
48 if (iter->intid >= (iter->nr_spis + VGIC_NR_PRIVATE_IRQS)) { in iter_next()
50 iter->intid = iter->lpi_array[iter->lpi_idx]; in iter_next()
79 iter->intid >= (iter->nr_spis + VGIC_NR_PRIVATE_IRQS) && in end_of_vgic()
183 if (irq->intid < VGIC_NR_SGIS) in print_irq_state()
185 else if (irq->intid < VGIC_NR_PRIVATE_IRQS) in print_irq_state()
187 else if (irq->intid < VGIC_MAX_SP in print_irq_state()
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H A Dvgic.c58 static struct vgic_irq *vgic_get_lpi(struct kvm *kvm, u32 intid) in vgic_get_lpi() argument
67 if (irq->intid != intid) in vgic_get_lpi()
91 u32 intid) in vgic_get_irq()
94 if (intid <= VGIC_MAX_PRIVATE) { in vgic_get_irq()
95 intid = array_index_nospec(intid, VGIC_MAX_PRIVATE + 1); in vgic_get_irq()
96 return &vcpu->arch.vgic_cpu.private_irqs[intid]; in vgic_get_irq()
100 if (intid < (kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS)) { in vgic_get_irq()
101 intid in vgic_get_irq()
90 vgic_get_irq(struct kvm *kvm, struct kvm_vcpu *vcpu, u32 intid) vgic_get_irq() argument
438 kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int intid, bool level, void *owner) kvm_vgic_inject_irq() argument
587 kvm_vgic_set_owner(struct kvm_vcpu *vcpu, unsigned int intid, void *owner) kvm_vgic_set_owner() argument
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H A Dvgic-mmio-v2.c113 int intid = val & 0xf; in vgic_mmio_write_sgir() local
140 irq = vgic_get_irq(source_vcpu->kvm, vcpu, intid); in vgic_mmio_write_sgir()
154 u32 intid = VGIC_ADDR_TO_INTID(addr, 8); in vgic_mmio_read_target() local
159 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_mmio_read_target()
173 u32 intid = VGIC_ADDR_TO_INTID(addr, 8); in vgic_mmio_write_target() local
179 if (intid < VGIC_NR_PRIVATE_IRQS) in vgic_mmio_write_target()
183 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, NULL, intid + i); in vgic_mmio_write_target()
200 u32 intid = addr & 0x0f; in vgic_mmio_read_sgipend() local
205 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_mmio_read_sgipend()
218 u32 intid in vgic_mmio_write_sgipendc() local
240 u32 intid = addr & 0x0f; vgic_mmio_write_sgipends() local
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H A Dvgic-v3.c44 u32 intid, cpuid; in vgic_v3_fold_lr_state() local
52 intid = val & ICH_LR_VIRTUAL_ID_MASK; in vgic_v3_fold_lr_state()
54 intid = val & GICH_LR_VIRTUALID; in vgic_v3_fold_lr_state()
55 is_v2_sgi = vgic_irq_is_sgi(intid); in vgic_v3_fold_lr_state()
59 if (lr_signals_eoi_mi(val) && vgic_valid_spi(vcpu->kvm, intid)) in vgic_v3_fold_lr_state()
61 intid - VGIC_NR_PRIVATE_IRQS); in vgic_v3_fold_lr_state()
63 irq = vgic_get_irq(vcpu->kvm, vcpu, intid); in vgic_v3_fold_lr_state()
121 u64 val = irq->intid; in vgic_v3_populate_lr()
124 is_v2_sgi = (vgic_irq_is_sgi(irq->intid) && in vgic_v3_populate_lr()
166 if (vgic_irq_is_sgi(irq->intid) in vgic_v3_populate_lr()
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H A Dvgic-v2.c61 u32 cpuid, intid = val & GICH_LR_VIRTUALID; in vgic_v2_fold_lr_state() local
70 if (lr_signals_eoi_mi(val) && vgic_valid_spi(vcpu->kvm, intid)) in vgic_v2_fold_lr_state()
72 intid - VGIC_NR_PRIVATE_IRQS); in vgic_v2_fold_lr_state()
74 irq = vgic_get_irq(vcpu->kvm, vcpu, intid); in vgic_v2_fold_lr_state()
81 if (irq->active && vgic_irq_is_sgi(intid)) in vgic_v2_fold_lr_state()
89 if (vgic_irq_is_sgi(intid)) in vgic_v2_fold_lr_state()
139 u32 val = irq->intid; in vgic_v2_populate_lr()
144 if (vgic_irq_is_sgi(irq->intid)) in vgic_v2_populate_lr()
184 if (vgic_irq_is_sgi(irq->intid)) { in vgic_v2_populate_lr()
188 irq->intid)) in vgic_v2_populate_lr()
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H A Dvgic-mmio-v3.c182 int intid = VGIC_ADDR_TO_INTID(addr, 64); in vgic_mmio_read_irouter() local
183 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, NULL, intid); in vgic_mmio_read_irouter()
201 int intid = VGIC_ADDR_TO_INTID(addr, 64); in vgic_mmio_write_irouter() local
209 irq = vgic_get_irq(vcpu->kvm, NULL, intid); in vgic_mmio_write_irouter()
314 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); in vgic_v3_uaccess_read_pending() local
326 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_v3_uaccess_read_pending()
329 if (irq->hw && vgic_irq_is_sgi(irq->intid)) { in vgic_v3_uaccess_read_pending()
351 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); in vgic_v3_uaccess_write_pending() local
356 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_v3_uaccess_write_pending()
367 if (irq->hw && vgic_irq_is_sgi(irq->intid)) { in vgic_v3_uaccess_write_pending()
1076 vgic_v3_line_level_info_uaccess(struct kvm_vcpu *vcpu, bool is_write, u32 intid, u64 *val) vgic_v3_line_level_info_uaccess() argument
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H A Dvgic.h20 #define vgic_irq_is_sgi(intid) ((intid) < VGIC_NR_SGIS)
118 if (vgic_irq_is_sgi(irq->intid) && irq->source) in vgic_irq_get_lr_count()
163 u32 intid);
204 if (irq->intid < VGIC_MIN_LPI) in vgic_get_irq_kref()
245 u32 intid, u64 *val);
/kernel/linux/linux-6.6/arch/arm64/kvm/vgic/
H A Dvgic-mmio.c47 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); in vgic_mmio_read_group() local
53 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_mmio_read_group()
72 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); in vgic_mmio_write_group() local
77 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_mmio_write_group()
81 if (irq->hw && vgic_irq_is_sgi(irq->intid)) { in vgic_mmio_write_group()
99 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); in vgic_mmio_read_enable() local
105 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_mmio_read_enable()
120 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); in vgic_mmio_write_senable() local
125 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_mmio_write_senable()
128 if (irq->hw && vgic_irq_is_sgi(irq->intid)) { in vgic_mmio_write_senable()
169 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); vgic_mmio_write_cenable() local
191 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); vgic_uaccess_write_senable() local
212 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); vgic_uaccess_write_cenable() local
233 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); __read_pending() local
308 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); vgic_mmio_write_spending() local
350 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); vgic_uaccess_write_spending() local
401 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); vgic_mmio_write_cpending() local
444 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); vgic_uaccess_write_cpending() local
486 vgic_access_active_prepare(struct kvm_vcpu *vcpu, u32 intid) vgic_access_active_prepare() argument
495 vgic_access_active_finish(struct kvm_vcpu *vcpu, u32 intid) vgic_access_active_finish() argument
506 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); __vgic_mmio_read_active() local
530 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); vgic_mmio_read_active() local
612 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); __vgic_mmio_write_cactive() local
626 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); vgic_mmio_write_cactive() local
649 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); __vgic_mmio_write_sactive() local
663 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); vgic_mmio_write_sactive() local
685 u32 intid = VGIC_ADDR_TO_INTID(addr, 8); vgic_mmio_read_priority() local
711 u32 intid = VGIC_ADDR_TO_INTID(addr, 8); vgic_mmio_write_priority() local
732 u32 intid = VGIC_ADDR_TO_INTID(addr, 2); vgic_mmio_read_config() local
752 u32 intid = VGIC_ADDR_TO_INTID(addr, 2); vgic_mmio_write_config() local
781 vgic_read_irq_line_level_info(struct kvm_vcpu *vcpu, u32 intid) vgic_read_irq_line_level_info() argument
803 vgic_write_irq_line_level_info(struct kvm_vcpu *vcpu, u32 intid, const u32 val) vgic_write_irq_line_level_info() argument
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H A Dvgic-debug.c31 int intid; member
43 iter->intid++; in iter_next()
44 if (iter->intid == VGIC_NR_PRIVATE_IRQS && in iter_next()
46 iter->intid = 0; in iter_next()
48 if (iter->intid >= (iter->nr_spis + VGIC_NR_PRIVATE_IRQS)) { in iter_next()
50 iter->intid = iter->lpi_array[iter->lpi_idx]; in iter_next()
79 iter->intid >= (iter->nr_spis + VGIC_NR_PRIVATE_IRQS) && in end_of_vgic()
183 if (irq->intid < VGIC_NR_SGIS) in print_irq_state()
185 else if (irq->intid < VGIC_NR_PRIVATE_IRQS) in print_irq_state()
187 else if (irq->intid < VGIC_MAX_SP in print_irq_state()
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H A Dvgic.c60 static struct vgic_irq *vgic_get_lpi(struct kvm *kvm, u32 intid) in vgic_get_lpi() argument
69 if (irq->intid != intid) in vgic_get_lpi()
93 u32 intid) in vgic_get_irq()
96 if (intid <= VGIC_MAX_PRIVATE) { in vgic_get_irq()
97 intid = array_index_nospec(intid, VGIC_MAX_PRIVATE + 1); in vgic_get_irq()
98 return &vcpu->arch.vgic_cpu.private_irqs[intid]; in vgic_get_irq()
102 if (intid < (kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS)) { in vgic_get_irq()
103 intid in vgic_get_irq()
92 vgic_get_irq(struct kvm *kvm, struct kvm_vcpu *vcpu, u32 intid) vgic_get_irq() argument
439 kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int intid, bool level, void *owner) kvm_vgic_inject_irq() argument
603 kvm_vgic_set_owner(struct kvm_vcpu *vcpu, unsigned int intid, void *owner) kvm_vgic_set_owner() argument
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H A Dvgic-mmio-v2.c125 int intid = val & 0xf; in vgic_mmio_write_sgir() local
151 irq = vgic_get_irq(source_vcpu->kvm, vcpu, intid); in vgic_mmio_write_sgir()
165 u32 intid = VGIC_ADDR_TO_INTID(addr, 8); in vgic_mmio_read_target() local
170 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_mmio_read_target()
184 u32 intid = VGIC_ADDR_TO_INTID(addr, 8); in vgic_mmio_write_target() local
190 if (intid < VGIC_NR_PRIVATE_IRQS) in vgic_mmio_write_target()
194 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, NULL, intid + i); in vgic_mmio_write_target()
211 u32 intid = addr & 0x0f; in vgic_mmio_read_sgipend() local
216 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_mmio_read_sgipend()
229 u32 intid in vgic_mmio_write_sgipendc() local
251 u32 intid = addr & 0x0f; vgic_mmio_write_sgipends() local
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H A Dvgic-v3.c48 u32 intid, cpuid; in vgic_v3_fold_lr_state() local
57 intid = val & ICH_LR_VIRTUAL_ID_MASK; in vgic_v3_fold_lr_state()
59 intid = val & GICH_LR_VIRTUALID; in vgic_v3_fold_lr_state()
60 is_v2_sgi = vgic_irq_is_sgi(intid); in vgic_v3_fold_lr_state()
64 if (lr_signals_eoi_mi(val) && vgic_valid_spi(vcpu->kvm, intid)) in vgic_v3_fold_lr_state()
66 intid - VGIC_NR_PRIVATE_IRQS); in vgic_v3_fold_lr_state()
68 irq = vgic_get_irq(vcpu->kvm, vcpu, intid); in vgic_v3_fold_lr_state()
110 u64 val = irq->intid; in vgic_v3_populate_lr()
113 is_v2_sgi = (vgic_irq_is_sgi(irq->intid) && in vgic_v3_populate_lr()
155 if (vgic_irq_is_sgi(irq->intid) in vgic_v3_populate_lr()
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H A Dvgic-v2.c61 u32 cpuid, intid = val & GICH_LR_VIRTUALID; in vgic_v2_fold_lr_state() local
71 if (lr_signals_eoi_mi(val) && vgic_valid_spi(vcpu->kvm, intid)) in vgic_v2_fold_lr_state()
73 intid - VGIC_NR_PRIVATE_IRQS); in vgic_v2_fold_lr_state()
75 irq = vgic_get_irq(vcpu->kvm, vcpu, intid); in vgic_v2_fold_lr_state()
83 if (irq->active && vgic_irq_is_sgi(intid)) in vgic_v2_fold_lr_state()
91 if (vgic_irq_is_sgi(intid)) in vgic_v2_fold_lr_state()
124 u32 val = irq->intid; in vgic_v2_populate_lr()
129 if (vgic_irq_is_sgi(irq->intid)) in vgic_v2_populate_lr()
169 if (vgic_irq_is_sgi(irq->intid)) { in vgic_v2_populate_lr()
173 irq->intid)) in vgic_v2_populate_lr()
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H A Dvgic-mmio-v3.c196 int intid = VGIC_ADDR_TO_INTID(addr, 64); in vgic_mmio_read_irouter() local
197 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, NULL, intid); in vgic_mmio_read_irouter()
215 int intid = VGIC_ADDR_TO_INTID(addr, 64); in vgic_mmio_write_irouter() local
223 irq = vgic_get_irq(vcpu->kvm, NULL, intid); in vgic_mmio_write_irouter()
360 u32 intid = VGIC_ADDR_TO_INTID(addr, 1); in vgic_v3_uaccess_write_pending() local
365 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_v3_uaccess_write_pending()
376 if (irq->hw && vgic_irq_is_sgi(irq->intid)) { in vgic_v3_uaccess_write_pending()
1175 u32 intid, u32 *val) in vgic_v3_line_level_info_uaccess()
1177 if (intid % 32) in vgic_v3_line_level_info_uaccess()
1181 vgic_write_irq_line_level_info(vcpu, intid, *va in vgic_v3_line_level_info_uaccess()
1174 vgic_v3_line_level_info_uaccess(struct kvm_vcpu *vcpu, bool is_write, u32 intid, u32 *val) vgic_v3_line_level_info_uaccess() argument
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H A Dvgic.h21 #define vgic_irq_is_sgi(intid) ((intid) < VGIC_NR_SGIS)
124 if (vgic_irq_is_sgi(irq->intid) && irq->source) in vgic_irq_get_lr_count()
182 u32 intid);
225 if (irq->intid < VGIC_MIN_LPI) in vgic_get_irq_kref()
265 u32 intid, u32 *val);
H A Dvgic-v4.c110 vpe->sgi_config[irq->intid].enabled = irq->enabled; in vgic_v4_sync_sgi_config()
111 vpe->sgi_config[irq->intid].group = irq->group; in vgic_v4_sync_sgi_config()
112 vpe->sgi_config[irq->intid].priority = irq->priority; in vgic_v4_sync_sgi_config()
216 int mask = BIT(irq->intid % BITS_PER_BYTE); in vgic_v4_get_vlpi_state()
221 ptr = va + irq->intid / BITS_PER_BYTE; in vgic_v4_get_vlpi_state()
448 .vintid = irq->intid, in kvm_vgic_v4_set_forwarding()

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