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Searched refs:dpm (Results 1 - 25 of 72) sorted by relevance

123

/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dlegacy_dpm.c127 if (rps == adev->pm.dpm.current_ps) in amdgpu_dpm_print_ps_status()
129 if (rps == adev->pm.dpm.requested_ps) in amdgpu_dpm_print_ps_status()
131 if (rps == adev->pm.dpm.boot_ps) in amdgpu_dpm_print_ps_status()
143 for (i = 0; i < adev->pm.dpm.num_ps; i++) in amdgpu_pm_print_power_states()
144 amdgpu_dpm_print_power_state(adev, &adev->pm.dpm.ps[i]); in amdgpu_pm_print_power_states()
172 adev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); in amdgpu_get_platform_caps()
173 adev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); in amdgpu_get_platform_caps()
174 adev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); in amdgpu_get_platform_caps()
242 adev->pm.dpm.fan.t_hyst = fan_info->fan.ucTHyst; in amdgpu_parse_extended_power_table()
243 adev->pm.dpm in amdgpu_parse_extended_power_table()
[all...]
H A Dkv_dpm.c77 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_convert_vid2_to_vid7()
99 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_convert_vid7_to_vid2()
367 struct kv_power_info *pi = adev->pm.dpm.priv; in kv_get_pi()
791 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_program_bootup_state()
893 &adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; in kv_populate_uvd_table()
966 &adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; in kv_populate_vce_table()
1027 &adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table; in kv_populate_samu_table()
1093 &adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table; in kv_populate_acp_table()
1152 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_calculate_dfs_bypass_settings()
1219 adev->pm.dpm in kv_update_current_ps()
[all...]
H A Dsi_dpm.c1854 struct si_power_info *pi = adev->pm.dpm.priv; in si_get_pi()
1927 u32 p_limit1 = adev->pm.dpm.tdp_limit; in si_update_dte_from_pl2()
1928 u32 p_limit2 = adev->pm.dpm.near_tdp_limit; in si_update_dte_from_pl2()
1956 struct rv7xx_power_info *pi = adev->pm.dpm.priv; in rv770_get_pi()
1963 struct ni_power_info *pi = adev->pm.dpm.priv; in ni_get_pi()
2217 if (tdp_adjustment > (u32)adev->pm.dpm.tdp_od_limit) in si_calculate_adjusted_tdp_limits()
2220 max_tdp_limit = ((100 + 100) * adev->pm.dpm.tdp_limit) / 100; in si_calculate_adjusted_tdp_limits()
2223 *tdp_limit = ((100 + tdp_adjustment) * adev->pm.dpm.tdp_limit) / 100; in si_calculate_adjusted_tdp_limits()
2224 *near_tdp_limit = adev->pm.dpm.near_tdp_limit_adjusted + (*tdp_limit - adev->pm.dpm in si_calculate_adjusted_tdp_limits()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/
H A Damdgpu_dpm.c114 if (rps == adev->pm.dpm.current_ps) in amdgpu_dpm_print_ps_status()
116 if (rps == adev->pm.dpm.requested_ps) in amdgpu_dpm_print_ps_status()
118 if (rps == adev->pm.dpm.boot_ps) in amdgpu_dpm_print_ps_status()
129 adev->pm.dpm.new_active_crtcs = 0; in amdgpu_dpm_get_active_displays()
130 adev->pm.dpm.new_active_crtc_count = 0; in amdgpu_dpm_get_active_displays()
136 adev->pm.dpm.new_active_crtcs |= (1 << amdgpu_crtc->crtc_id); in amdgpu_dpm_get_active_displays()
137 adev->pm.dpm.new_active_crtc_count++; in amdgpu_dpm_get_active_displays()
269 adev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); in amdgpu_get_platform_caps()
270 adev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); in amdgpu_get_platform_caps()
271 adev->pm.dpm in amdgpu_get_platform_caps()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/
H A Dradeon_pm.c79 rdev->pm.dpm.ac_power = true; in radeon_pm_acpi_event_handler()
81 rdev->pm.dpm.ac_power = false; in radeon_pm_acpi_event_handler()
83 if (rdev->asic->dpm.enable_bapm) in radeon_pm_acpi_event_handler()
84 radeon_dpm_enable_bapm(rdev, rdev->pm.dpm.ac_power); in radeon_pm_acpi_event_handler()
418 (pm == PM_METHOD_PROFILE) ? "profile" : "dpm"); in radeon_get_pm_method()
436 /* we don't support the legacy modes with dpm */ in radeon_set_pm_method()
471 enum radeon_pm_state_type pm = rdev->pm.dpm.user_state; in radeon_get_dpm_state()
488 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BATTERY; in radeon_set_dpm_state()
490 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; in radeon_set_dpm_state()
492 rdev->pm.dpm in radeon_set_dpm_state()
[all...]
H A Dr600_dpm.c147 if (rps == rdev->pm.dpm.current_ps) in r600_dpm_print_ps_status()
149 if (rps == rdev->pm.dpm.requested_ps) in r600_dpm_print_ps_status()
151 if (rps == rdev->pm.dpm.boot_ps) in r600_dpm_print_ps_status()
758 rdev->pm.dpm.thermal.min_temp = low_temp; in r600_set_thermal_temperature_range()
759 rdev->pm.dpm.thermal.max_temp = high_temp; in r600_set_thermal_temperature_range()
858 rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); in r600_get_platform_caps()
859 rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); in r600_get_platform_caps()
860 rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); in r600_get_platform_caps()
895 rdev->pm.dpm.fan.t_hyst = fan_info->fan.ucTHyst; in r600_parse_extended_power_table()
896 rdev->pm.dpm in r600_parse_extended_power_table()
[all...]
H A Dci_dpm.c174 struct ci_power_info *pi = rdev->pm.dpm.priv; in ci_get_pi()
259 if (rdev->pm.dpm.dyn_state.cac_leakage_table.entries == NULL) in ci_populate_bapm_vddc_vid_sidd()
261 if (rdev->pm.dpm.dyn_state.cac_leakage_table.count > 8) in ci_populate_bapm_vddc_vid_sidd()
263 if (rdev->pm.dpm.dyn_state.cac_leakage_table.count != in ci_populate_bapm_vddc_vid_sidd()
264 rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count) in ci_populate_bapm_vddc_vid_sidd()
267 for (i = 0; i < rdev->pm.dpm.dyn_state.cac_leakage_table.count; i++) { in ci_populate_bapm_vddc_vid_sidd()
268 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_EVV) { in ci_populate_bapm_vddc_vid_sidd()
269 lo_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc1); in ci_populate_bapm_vddc_vid_sidd()
270 hi_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc2); in ci_populate_bapm_vddc_vid_sidd()
271 hi2_vid[i] = ci_convert_to_vid(rdev->pm.dpm in ci_populate_bapm_vddc_vid_sidd()
[all...]
H A Dkv_dpm.c153 struct kv_power_info *pi = rdev->pm.dpm.priv; in kv_get_pi()
399 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_convert_vid2_to_vid7()
421 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_convert_vid7_to_vid2()
562 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_program_bootup_state()
664 &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; in kv_populate_uvd_table()
737 &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; in kv_populate_vce_table()
798 &rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table; in kv_populate_samu_table()
864 &rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table; in kv_populate_acp_table()
923 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_calculate_dfs_bypass_settings()
1121 kv_update_current_ps(rdev, rdev->pm.dpm in kv_dpm_enable()
[all...]
H A Drv6xx_dpm.c45 struct rv6xx_power_info *pi = rdev->pm.dpm.priv; in rv6xx_get_pi()
921 rdev->pm.dpm.voltage_response_time, in rv6xx_program_voltage_timing_parameters()
925 rdev->pm.dpm.backbias_response_time, in rv6xx_program_voltage_timing_parameters()
1185 if (rdev->pm.dpm.new_active_crtcs & 1) { in rv6xx_program_display_gap()
1188 } else if (rdev->pm.dpm.new_active_crtcs & 2) { in rv6xx_program_display_gap()
1298 msleep((rdev->pm.dpm.voltage_response_time + 999) / 1000); in rv6xx_step_sw_voltage()
1548 struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; in rv6xx_dpm_enable()
1553 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_BACKBIAS) in rv6xx_dpm_enable()
1615 struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; in rv6xx_dpm_disable()
1633 if (rdev->pm.dpm in rv6xx_dpm_disable()
[all...]
H A Dsi_dpm.c1745 struct si_power_info *pi = rdev->pm.dpm.priv; in si_get_pi()
1819 u32 p_limit1 = rdev->pm.dpm.tdp_limit; in si_update_dte_from_pl2()
1820 u32 p_limit2 = rdev->pm.dpm.near_tdp_limit; in si_update_dte_from_pl2()
2110 if (tdp_adjustment > (u32)rdev->pm.dpm.tdp_od_limit) in si_calculate_adjusted_tdp_limits()
2113 max_tdp_limit = ((100 + 100) * rdev->pm.dpm.tdp_limit) / 100; in si_calculate_adjusted_tdp_limits()
2116 *tdp_limit = ((100 + tdp_adjustment) * rdev->pm.dpm.tdp_limit) / 100; in si_calculate_adjusted_tdp_limits()
2117 *near_tdp_limit = rdev->pm.dpm.near_tdp_limit_adjusted + (*tdp_limit - rdev->pm.dpm.tdp_limit); in si_calculate_adjusted_tdp_limits()
2119 *tdp_limit = ((100 - tdp_adjustment) * rdev->pm.dpm.tdp_limit) / 100; in si_calculate_adjusted_tdp_limits()
2120 adjustment_delta = rdev->pm.dpm in si_calculate_adjusted_tdp_limits()
[all...]
H A Dbtc_dpm.c1229 return btc_find_valid_clock(&rdev->pm.dpm.dyn_state.valid_mclk_values, in btc_get_valid_mclk()
1236 return btc_find_valid_clock(&rdev->pm.dpm.dyn_state.valid_sclk_values, in btc_get_valid_sclk()
1279 if (((pl->mclk + (pl->sclk - 1)) / pl->sclk) > rdev->pm.dpm.dyn_state.mclk_sclk_ratio) in btc_adjust_clock_combinations()
1283 (rdev->pm.dpm.dyn_state.mclk_sclk_ratio - 1)) / in btc_adjust_clock_combinations()
1284 rdev->pm.dpm.dyn_state.mclk_sclk_ratio); in btc_adjust_clock_combinations()
1286 if ((pl->sclk - pl->mclk) > rdev->pm.dpm.dyn_state.sclk_mclk_delta) in btc_adjust_clock_combinations()
1290 rdev->pm.dpm.dyn_state.sclk_mclk_delta); in btc_adjust_clock_combinations()
1317 if ((*vddc - *vddci) > rdev->pm.dpm.dyn_state.vddc_vddci_delta) { in btc_apply_voltage_delta_rules()
1319 (*vddc - rdev->pm.dpm.dyn_state.vddc_vddci_delta)); in btc_apply_voltage_delta_rules()
1323 if ((*vddci - *vddc) > rdev->pm.dpm in btc_apply_voltage_delta_rules()
[all...]
H A Drv770_dpm.c58 struct rv7xx_power_info *pi = rdev->pm.dpm.priv; in rv770_get_pi()
65 struct evergreen_power_info *pi = rdev->pm.dpm.priv; in evergreen_get_pi()
1192 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_HARDWAREDC) { in rv770_init_smc_table()
1195 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_DONT_WAIT_FOR_VBLANK_ON_ALERT) in rv770_init_smc_table()
1198 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_GOTO_BOOT_ON_ALERT) in rv770_init_smc_table()
1202 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC) in rv770_init_smc_table()
1348 if (rdev->pm.dpm.new_active_crtcs & 1) { in rv770_program_display_gap()
1351 } else if (rdev->pm.dpm.new_active_crtcs & 2) { in rv770_program_display_gap()
1500 rdev->pm.dpm.forced_level = level; in rv770_dpm_force_performance_level()
1709 voltage_response_time = (u32)rdev->pm.dpm in rv770_program_response_times()
[all...]
H A Drs780_dpm.c44 struct igp_power_info *pi = rdev->pm.dpm.priv; in rs780_get_pi()
380 struct igp_ps *current_state = rs780_get_ps(rdev->pm.dpm.current_ps); in rs780_force_voltage()
407 struct igp_ps *current_state = rs780_get_ps(rdev->pm.dpm.current_ps); in rs780_force_fbdiv()
600 struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; in rs780_dpm_enable()
652 struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps; in rs780_dpm_set_power_state()
653 struct radeon_ps *old_ps = rdev->pm.dpm.current_ps; in rs780_dpm_set_power_state()
742 rdev->pm.dpm.boot_ps = rps; in rs780_parse_pplib_non_clock_info()
744 rdev->pm.dpm.uvd_ps = rps; in rs780_parse_pplib_non_clock_info()
807 rdev->pm.dpm.ps = kcalloc(power_info->pplib.ucNumStates, in rs780_parse_power_table()
810 if (!rdev->pm.dpm in rs780_parse_power_table()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
H A Dradeon_pm.c79 rdev->pm.dpm.ac_power = true; in radeon_pm_acpi_event_handler()
81 rdev->pm.dpm.ac_power = false; in radeon_pm_acpi_event_handler()
83 if (rdev->asic->dpm.enable_bapm) in radeon_pm_acpi_event_handler()
84 radeon_dpm_enable_bapm(rdev, rdev->pm.dpm.ac_power); in radeon_pm_acpi_event_handler()
420 (pm == PM_METHOD_PROFILE) ? "profile" : "dpm"); in radeon_get_pm_method()
438 /* we don't support the legacy modes with dpm */ in radeon_set_pm_method()
473 enum radeon_pm_state_type pm = rdev->pm.dpm.user_state; in radeon_get_dpm_state()
490 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BATTERY; in radeon_set_dpm_state()
492 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; in radeon_set_dpm_state()
494 rdev->pm.dpm in radeon_set_dpm_state()
[all...]
H A Dr600_dpm.c147 if (rps == rdev->pm.dpm.current_ps) in r600_dpm_print_ps_status()
149 if (rps == rdev->pm.dpm.requested_ps) in r600_dpm_print_ps_status()
151 if (rps == rdev->pm.dpm.boot_ps) in r600_dpm_print_ps_status()
758 rdev->pm.dpm.thermal.min_temp = low_temp; in r600_set_thermal_temperature_range()
759 rdev->pm.dpm.thermal.max_temp = high_temp; in r600_set_thermal_temperature_range()
858 rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); in r600_get_platform_caps()
859 rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); in r600_get_platform_caps()
860 rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); in r600_get_platform_caps()
895 rdev->pm.dpm.fan.t_hyst = fan_info->fan.ucTHyst; in r600_parse_extended_power_table()
896 rdev->pm.dpm in r600_parse_extended_power_table()
[all...]
H A Dci_dpm.c183 struct ci_power_info *pi = rdev->pm.dpm.priv; in ci_get_pi()
268 if (rdev->pm.dpm.dyn_state.cac_leakage_table.entries == NULL) in ci_populate_bapm_vddc_vid_sidd()
270 if (rdev->pm.dpm.dyn_state.cac_leakage_table.count > 8) in ci_populate_bapm_vddc_vid_sidd()
272 if (rdev->pm.dpm.dyn_state.cac_leakage_table.count != in ci_populate_bapm_vddc_vid_sidd()
273 rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count) in ci_populate_bapm_vddc_vid_sidd()
276 for (i = 0; i < rdev->pm.dpm.dyn_state.cac_leakage_table.count; i++) { in ci_populate_bapm_vddc_vid_sidd()
277 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_EVV) { in ci_populate_bapm_vddc_vid_sidd()
278 lo_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc1); in ci_populate_bapm_vddc_vid_sidd()
279 hi_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc2); in ci_populate_bapm_vddc_vid_sidd()
280 hi2_vid[i] = ci_convert_to_vid(rdev->pm.dpm in ci_populate_bapm_vddc_vid_sidd()
[all...]
H A Drv6xx_dpm.c45 struct rv6xx_power_info *pi = rdev->pm.dpm.priv; in rv6xx_get_pi()
921 rdev->pm.dpm.voltage_response_time, in rv6xx_program_voltage_timing_parameters()
925 rdev->pm.dpm.backbias_response_time, in rv6xx_program_voltage_timing_parameters()
1185 if (rdev->pm.dpm.new_active_crtcs & 1) { in rv6xx_program_display_gap()
1188 } else if (rdev->pm.dpm.new_active_crtcs & 2) { in rv6xx_program_display_gap()
1298 msleep((rdev->pm.dpm.voltage_response_time + 999) / 1000); in rv6xx_step_sw_voltage()
1548 struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; in rv6xx_dpm_enable()
1553 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_BACKBIAS) in rv6xx_dpm_enable()
1615 struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; in rv6xx_dpm_disable()
1633 if (rdev->pm.dpm in rv6xx_dpm_disable()
[all...]
H A Dsi_dpm.c1748 struct si_power_info *pi = rdev->pm.dpm.priv; in si_get_pi()
1822 u32 p_limit1 = rdev->pm.dpm.tdp_limit; in si_update_dte_from_pl2()
1823 u32 p_limit2 = rdev->pm.dpm.near_tdp_limit; in si_update_dte_from_pl2()
2113 if (tdp_adjustment > (u32)rdev->pm.dpm.tdp_od_limit) in si_calculate_adjusted_tdp_limits()
2116 max_tdp_limit = ((100 + 100) * rdev->pm.dpm.tdp_limit) / 100; in si_calculate_adjusted_tdp_limits()
2119 *tdp_limit = ((100 + tdp_adjustment) * rdev->pm.dpm.tdp_limit) / 100; in si_calculate_adjusted_tdp_limits()
2120 *near_tdp_limit = rdev->pm.dpm.near_tdp_limit_adjusted + (*tdp_limit - rdev->pm.dpm.tdp_limit); in si_calculate_adjusted_tdp_limits()
2122 *tdp_limit = ((100 - tdp_adjustment) * rdev->pm.dpm.tdp_limit) / 100; in si_calculate_adjusted_tdp_limits()
2123 adjustment_delta = rdev->pm.dpm in si_calculate_adjusted_tdp_limits()
[all...]
H A Dbtc_dpm.c1231 return btc_find_valid_clock(&rdev->pm.dpm.dyn_state.valid_mclk_values, in btc_get_valid_mclk()
1238 return btc_find_valid_clock(&rdev->pm.dpm.dyn_state.valid_sclk_values, in btc_get_valid_sclk()
1281 if (((pl->mclk + (pl->sclk - 1)) / pl->sclk) > rdev->pm.dpm.dyn_state.mclk_sclk_ratio) in btc_adjust_clock_combinations()
1285 (rdev->pm.dpm.dyn_state.mclk_sclk_ratio - 1)) / in btc_adjust_clock_combinations()
1286 rdev->pm.dpm.dyn_state.mclk_sclk_ratio); in btc_adjust_clock_combinations()
1288 if ((pl->sclk - pl->mclk) > rdev->pm.dpm.dyn_state.sclk_mclk_delta) in btc_adjust_clock_combinations()
1292 rdev->pm.dpm.dyn_state.sclk_mclk_delta); in btc_adjust_clock_combinations()
1319 if ((*vddc - *vddci) > rdev->pm.dpm.dyn_state.vddc_vddci_delta) { in btc_apply_voltage_delta_rules()
1321 (*vddc - rdev->pm.dpm.dyn_state.vddc_vddci_delta)); in btc_apply_voltage_delta_rules()
1325 if ((*vddci - *vddc) > rdev->pm.dpm in btc_apply_voltage_delta_rules()
[all...]
H A Drv770_dpm.c56 struct rv7xx_power_info *pi = rdev->pm.dpm.priv; in rv770_get_pi()
63 struct evergreen_power_info *pi = rdev->pm.dpm.priv; in evergreen_get_pi()
1190 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_HARDWAREDC) { in rv770_init_smc_table()
1193 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_DONT_WAIT_FOR_VBLANK_ON_ALERT) in rv770_init_smc_table()
1196 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_GOTO_BOOT_ON_ALERT) in rv770_init_smc_table()
1200 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC) in rv770_init_smc_table()
1346 if (rdev->pm.dpm.new_active_crtcs & 1) { in rv770_program_display_gap()
1349 } else if (rdev->pm.dpm.new_active_crtcs & 2) { in rv770_program_display_gap()
1498 rdev->pm.dpm.forced_level = level; in rv770_dpm_force_performance_level()
1707 voltage_response_time = (u32)rdev->pm.dpm in rv770_program_response_times()
[all...]
H A Drs780_dpm.c44 struct igp_power_info *pi = rdev->pm.dpm.priv; in rs780_get_pi()
381 struct igp_ps *current_state = rs780_get_ps(rdev->pm.dpm.current_ps); in rs780_force_voltage()
408 struct igp_ps *current_state = rs780_get_ps(rdev->pm.dpm.current_ps); in rs780_force_fbdiv()
601 struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; in rs780_dpm_enable()
653 struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps; in rs780_dpm_set_power_state()
654 struct radeon_ps *old_ps = rdev->pm.dpm.current_ps; in rs780_dpm_set_power_state()
743 rdev->pm.dpm.boot_ps = rps; in rs780_parse_pplib_non_clock_info()
745 rdev->pm.dpm.uvd_ps = rps; in rs780_parse_pplib_non_clock_info()
808 rdev->pm.dpm.ps = kcalloc(power_info->pplib.ucNumStates, in rs780_parse_power_table()
811 if (!rdev->pm.dpm in rs780_parse_power_table()
[all...]
H A Dni_dpm.c729 struct ni_power_info *pi = rdev->pm.dpm.priv; in ni_get_pi()
796 if ((rdev->pm.dpm.new_active_crtc_count > 1) || in ni_apply_state_adjust_rules()
802 if (rdev->pm.dpm.ac_power) in ni_apply_state_adjust_rules()
803 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ni_apply_state_adjust_rules()
805 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ni_apply_state_adjust_rules()
807 if (rdev->pm.dpm.ac_power == false) { in ni_apply_state_adjust_rules()
874 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, in ni_apply_state_adjust_rules()
877 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in ni_apply_state_adjust_rules()
880 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in ni_apply_state_adjust_rules()
883 btc_apply_voltage_dependency_rules(&rdev->pm.dpm in ni_apply_state_adjust_rules()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/
H A Dkv_dpm.c76 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_convert_vid2_to_vid7()
98 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_convert_vid7_to_vid2()
379 struct kv_power_info *pi = adev->pm.dpm.priv; in kv_get_pi()
803 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_program_bootup_state()
905 &adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; in kv_populate_uvd_table()
978 &adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; in kv_populate_vce_table()
1039 &adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table; in kv_populate_samu_table()
1105 &adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table; in kv_populate_acp_table()
1164 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_calculate_dfs_bypass_settings()
1231 adev->pm.dpm in kv_update_current_ps()
[all...]
H A Dsi_dpm.c1839 struct si_power_info *pi = adev->pm.dpm.priv; in si_get_pi()
1912 u32 p_limit1 = adev->pm.dpm.tdp_limit; in si_update_dte_from_pl2()
1913 u32 p_limit2 = adev->pm.dpm.near_tdp_limit; in si_update_dte_from_pl2()
1941 struct rv7xx_power_info *pi = adev->pm.dpm.priv; in rv770_get_pi()
1948 struct ni_power_info *pi = adev->pm.dpm.priv; in ni_get_pi()
2202 if (tdp_adjustment > (u32)adev->pm.dpm.tdp_od_limit) in si_calculate_adjusted_tdp_limits()
2205 max_tdp_limit = ((100 + 100) * adev->pm.dpm.tdp_limit) / 100; in si_calculate_adjusted_tdp_limits()
2208 *tdp_limit = ((100 + tdp_adjustment) * adev->pm.dpm.tdp_limit) / 100; in si_calculate_adjusted_tdp_limits()
2209 *near_tdp_limit = adev->pm.dpm.near_tdp_limit_adjusted + (*tdp_limit - adev->pm.dpm in si_calculate_adjusted_tdp_limits()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/
H A Damdgpu_dpm_internal.c36 adev->pm.dpm.new_active_crtcs = 0; in amdgpu_dpm_get_active_displays()
37 adev->pm.dpm.new_active_crtc_count = 0; in amdgpu_dpm_get_active_displays()
43 adev->pm.dpm.new_active_crtcs |= (1 << amdgpu_crtc->crtc_id); in amdgpu_dpm_get_active_displays()
44 adev->pm.dpm.new_active_crtc_count++; in amdgpu_dpm_get_active_displays()

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