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/kernel/linux/linux-5.10/drivers/clk/baikal-t1/
H A Dccu-div.c12 #define pr_fmt(fmt) "bt1-ccu-div: " fmt
27 #include "ccu-div.h"
62 unsigned long div) in ccu_div_lock_delay_ns()
64 u64 ns = 4ULL * (div ?: 1) * NSEC_PER_SEC; in ccu_div_lock_delay_ns()
72 unsigned long div) in ccu_div_calc_freq()
74 return ref_clk / (div ?: 1); in ccu_div_calc_freq()
77 static int ccu_div_var_update_clkdiv(struct ccu_div *div, in ccu_div_var_update_clkdiv() argument
88 if (div->features & CCU_DIV_LOCK_SHIFTED) in ccu_div_var_update_clkdiv()
93 regmap_update_bits(div->sys_regs, div in ccu_div_var_update_clkdiv()
61 ccu_div_lock_delay_ns(unsigned long ref_clk, unsigned long div) ccu_div_lock_delay_ns() argument
71 ccu_div_calc_freq(unsigned long ref_clk, unsigned long div) ccu_div_calc_freq() argument
114 struct ccu_div *div = to_ccu_div(hw); ccu_div_var_enable() local
143 struct ccu_div *div = to_ccu_div(hw); ccu_div_gate_enable() local
156 struct ccu_div *div = to_ccu_div(hw); ccu_div_gate_disable() local
166 struct ccu_div *div = to_ccu_div(hw); ccu_div_gate_is_enabled() local
176 struct ccu_div *div = to_ccu_div(hw); ccu_div_buf_enable() local
189 struct ccu_div *div = to_ccu_div(hw); ccu_div_buf_disable() local
200 struct ccu_div *div = to_ccu_div(hw); ccu_div_buf_is_enabled() local
211 struct ccu_div *div = to_ccu_div(hw); ccu_div_var_recalc_rate() local
235 struct ccu_div *div = to_ccu_div(hw); ccu_div_var_round_rate() local
251 struct ccu_div *div = to_ccu_div(hw); ccu_div_var_set_rate_slow() local
285 struct ccu_div *div = to_ccu_div(hw); ccu_div_var_set_rate_fast() local
307 struct ccu_div *div = to_ccu_div(hw); ccu_div_fixed_recalc_rate() local
315 struct ccu_div *div = to_ccu_div(hw); ccu_div_fixed_round_rate() local
326 ccu_div_reset_domain(struct ccu_div *div) ccu_div_reset_domain() argument
347 struct ccu_div *div; global() member
378 struct ccu_div *div = bit->div; ccu_div_dbgfs_bit_set() local
391 struct ccu_div *div = priv; ccu_div_dbgfs_var_clkdiv_set() local
419 struct ccu_div *div = bit->div; ccu_div_dbgfs_bit_get() local
432 struct ccu_div *div = priv; ccu_div_dbgfs_var_clkdiv_get() local
445 struct ccu_div *div = priv; ccu_div_dbgfs_fixed_clkdiv_get() local
456 struct ccu_div *div = to_ccu_div(hw); ccu_div_var_debug_init() local
503 struct ccu_div *div = to_ccu_div(hw); ccu_div_gate_debug_init() local
521 struct ccu_div *div = to_ccu_div(hw); ccu_div_buf_debug_init() local
536 struct ccu_div *div = to_ccu_div(hw); ccu_div_fixed_debug_init() local
596 struct ccu_div *div; ccu_div_hw_register() local
662 ccu_div_hw_unregister(struct ccu_div *div) ccu_div_hw_unregister() argument
[all...]
/kernel/linux/linux-6.6/drivers/clk/baikal-t1/
H A Dccu-div.c12 #define pr_fmt(fmt) "bt1-ccu-div: " fmt
27 #include "ccu-div.h"
61 unsigned long div) in ccu_div_lock_delay_ns()
63 u64 ns = 4ULL * (div ?: 1) * NSEC_PER_SEC; in ccu_div_lock_delay_ns()
71 unsigned long div) in ccu_div_calc_freq()
73 return ref_clk / (div ?: 1); in ccu_div_calc_freq()
76 static int ccu_div_var_update_clkdiv(struct ccu_div *div, in ccu_div_var_update_clkdiv() argument
87 if (div->features & CCU_DIV_LOCK_SHIFTED) in ccu_div_var_update_clkdiv()
92 regmap_update_bits(div->sys_regs, div in ccu_div_var_update_clkdiv()
60 ccu_div_lock_delay_ns(unsigned long ref_clk, unsigned long div) ccu_div_lock_delay_ns() argument
70 ccu_div_calc_freq(unsigned long ref_clk, unsigned long div) ccu_div_calc_freq() argument
113 struct ccu_div *div = to_ccu_div(hw); ccu_div_var_enable() local
142 struct ccu_div *div = to_ccu_div(hw); ccu_div_gate_enable() local
155 struct ccu_div *div = to_ccu_div(hw); ccu_div_gate_disable() local
165 struct ccu_div *div = to_ccu_div(hw); ccu_div_gate_is_enabled() local
175 struct ccu_div *div = to_ccu_div(hw); ccu_div_buf_enable() local
188 struct ccu_div *div = to_ccu_div(hw); ccu_div_buf_disable() local
199 struct ccu_div *div = to_ccu_div(hw); ccu_div_buf_is_enabled() local
210 struct ccu_div *div = to_ccu_div(hw); ccu_div_var_recalc_rate() local
234 struct ccu_div *div = to_ccu_div(hw); ccu_div_var_round_rate() local
250 struct ccu_div *div = to_ccu_div(hw); ccu_div_var_set_rate_slow() local
284 struct ccu_div *div = to_ccu_div(hw); ccu_div_var_set_rate_fast() local
306 struct ccu_div *div = to_ccu_div(hw); ccu_div_fixed_recalc_rate() local
314 struct ccu_div *div = to_ccu_div(hw); ccu_div_fixed_round_rate() local
328 struct ccu_div *div; global() member
359 struct ccu_div *div = bit->div; ccu_div_dbgfs_bit_set() local
372 struct ccu_div *div = priv; ccu_div_dbgfs_var_clkdiv_set() local
400 struct ccu_div *div = bit->div; ccu_div_dbgfs_bit_get() local
413 struct ccu_div *div = priv; ccu_div_dbgfs_var_clkdiv_get() local
426 struct ccu_div *div = priv; ccu_div_dbgfs_fixed_clkdiv_get() local
437 struct ccu_div *div = to_ccu_div(hw); ccu_div_var_debug_init() local
484 struct ccu_div *div = to_ccu_div(hw); ccu_div_gate_debug_init() local
502 struct ccu_div *div = to_ccu_div(hw); ccu_div_buf_debug_init() local
517 struct ccu_div *div = to_ccu_div(hw); ccu_div_fixed_debug_init() local
577 struct ccu_div *div; ccu_div_hw_register() local
643 ccu_div_hw_unregister(struct ccu_div *div) ccu_div_hw_unregister() argument
[all...]
/kernel/linux/linux-5.10/drivers/clk/berlin/
H A Dberlin2-div.c16 #include "berlin2-div.h"
36 * (D) constant div-by-3 clock divider
38 * (F) constant div-by-3 clock mux controlled by <D3Switch>
46 * Also, clock gate and pll mux is not available on every div cell, so
67 struct berlin2_div *div = to_berlin2_div(hw); in berlin2_div_is_enabled() local
68 struct berlin2_div_map *map = &div->map; in berlin2_div_is_enabled()
71 if (div->lock) in berlin2_div_is_enabled()
72 spin_lock(div->lock); in berlin2_div_is_enabled()
74 reg = readl_relaxed(div->base + map->gate_offs); in berlin2_div_is_enabled()
77 if (div in berlin2_div_is_enabled()
85 struct berlin2_div *div = to_berlin2_div(hw); berlin2_div_enable() local
104 struct berlin2_div *div = to_berlin2_div(hw); berlin2_div_disable() local
121 struct berlin2_div *div = to_berlin2_div(hw); berlin2_div_set_parent() local
152 struct berlin2_div *div = to_berlin2_div(hw); berlin2_div_get_parent() local
179 struct berlin2_div *div = to_berlin2_div(hw); berlin2_div_recalc_rate() local
236 struct berlin2_div *div; berlin2_div_register() local
[all...]
/kernel/linux/linux-6.6/drivers/clk/berlin/
H A Dberlin2-div.c16 #include "berlin2-div.h"
36 * (D) constant div-by-3 clock divider
38 * (F) constant div-by-3 clock mux controlled by <D3Switch>
46 * Also, clock gate and pll mux is not available on every div cell, so
67 struct berlin2_div *div = to_berlin2_div(hw); in berlin2_div_is_enabled() local
68 struct berlin2_div_map *map = &div->map; in berlin2_div_is_enabled()
71 if (div->lock) in berlin2_div_is_enabled()
72 spin_lock(div->lock); in berlin2_div_is_enabled()
74 reg = readl_relaxed(div->base + map->gate_offs); in berlin2_div_is_enabled()
77 if (div in berlin2_div_is_enabled()
85 struct berlin2_div *div = to_berlin2_div(hw); berlin2_div_enable() local
104 struct berlin2_div *div = to_berlin2_div(hw); berlin2_div_disable() local
121 struct berlin2_div *div = to_berlin2_div(hw); berlin2_div_set_parent() local
152 struct berlin2_div *div = to_berlin2_div(hw); berlin2_div_get_parent() local
179 struct berlin2_div *div = to_berlin2_div(hw); berlin2_div_recalc_rate() local
237 struct berlin2_div *div; berlin2_div_register() local
[all...]
/kernel/linux/linux-5.10/drivers/clk/
H A Dclk-divider.c50 for (clkt = table; clkt->div; clkt++) in _get_table_maxdiv()
51 if (clkt->div > maxdiv && clkt->val <= mask) in _get_table_maxdiv()
52 maxdiv = clkt->div; in _get_table_maxdiv()
61 for (clkt = table; clkt->div; clkt++) in _get_table_mindiv()
62 if (clkt->div < mindiv) in _get_table_mindiv()
63 mindiv = clkt->div; in _get_table_mindiv()
84 for (clkt = table; clkt->div; clkt++) in _get_table_div()
86 return clkt->div; in _get_table_div()
105 unsigned int div) in _get_table_val()
109 for (clkt = table; clkt->div; clk in _get_table_val()
104 _get_table_val(const struct clk_div_table *table, unsigned int div) _get_table_val() argument
115 _get_val(const struct clk_div_table *table, unsigned int div, unsigned long flags, u8 width) _get_val() argument
134 unsigned int div; divider_recalc_rate() local
161 _is_valid_table_div(const struct clk_div_table *table, unsigned int div) _is_valid_table_div() argument
172 _is_valid_div(const struct clk_div_table *table, unsigned int div, unsigned long flags) _is_valid_div() argument
182 _round_up_table(const struct clk_div_table *table, int div) _round_up_table() argument
200 _round_down_table(const struct clk_div_table *table, int div) _round_down_table() argument
222 int div = DIV_ROUND_UP_ULL((u64)parent_rate, rate); _div_round_up() local
275 _next_div(const struct clk_div_table *table, int div, unsigned long flags) _next_div() argument
350 int div; divider_round_rate_parent() local
363 int div; divider_ro_round_rate_parent() local
405 unsigned int div, value; divider_get_val() local
473 struct clk_divider *div; __clk_hw_register_divider() local
558 struct clk_divider *div; clk_unregister_divider() local
578 struct clk_divider *div; clk_hw_unregister_divider() local
[all...]
H A Dclk-milbeaut.c83 u8 div; member
101 { .val = 0, .div = 8 },
102 { .val = 1, .div = 9 },
103 { .val = 2, .div = 10 },
104 { .val = 3, .div = 15 },
105 { .div = 0 },
109 { .val = 1, .div = 2 },
110 { .val = 3, .div = 4 },
111 { .div = 0 },
115 { .val = 3, .div
463 struct m10v_clk_divider *div; m10v_clk_hw_register_divider() local
[all...]
/kernel/linux/linux-5.10/drivers/clk/imx/
H A Dclk-divider-gate.c21 struct clk_divider *div = to_clk_divider(hw); in to_clk_divider_gate() local
23 return container_of(div, struct clk_divider_gate, divider); in to_clk_divider_gate()
29 struct clk_divider *div = to_clk_divider(hw); in clk_divider_gate_recalc_rate_ro() local
32 val = readl(div->reg) >> div->shift; in clk_divider_gate_recalc_rate_ro()
33 val &= clk_div_mask(div->width); in clk_divider_gate_recalc_rate_ro()
37 return divider_recalc_rate(hw, parent_rate, val, div->table, in clk_divider_gate_recalc_rate_ro()
38 div->flags, div->width); in clk_divider_gate_recalc_rate_ro()
45 struct clk_divider *div in clk_divider_gate_recalc_rate() local
77 struct clk_divider *div = to_clk_divider(hw); clk_divider_gate_set_rate() local
106 struct clk_divider *div = to_clk_divider(hw); clk_divider_enable() local
129 struct clk_divider *div = to_clk_divider(hw); clk_divider_disable() local
146 struct clk_divider *div = to_clk_divider(hw); clk_divider_is_enabled() local
[all...]
/kernel/linux/linux-6.6/drivers/clk/imx/
H A Dclk-divider-gate.c21 struct clk_divider *div = to_clk_divider(hw); in to_clk_divider_gate() local
23 return container_of(div, struct clk_divider_gate, divider); in to_clk_divider_gate()
29 struct clk_divider *div = to_clk_divider(hw); in clk_divider_gate_recalc_rate_ro() local
32 val = readl(div->reg) >> div->shift; in clk_divider_gate_recalc_rate_ro()
33 val &= clk_div_mask(div->width); in clk_divider_gate_recalc_rate_ro()
37 return divider_recalc_rate(hw, parent_rate, val, div->table, in clk_divider_gate_recalc_rate_ro()
38 div->flags, div->width); in clk_divider_gate_recalc_rate_ro()
45 struct clk_divider *div in clk_divider_gate_recalc_rate() local
77 struct clk_divider *div = to_clk_divider(hw); clk_divider_gate_set_rate() local
106 struct clk_divider *div = to_clk_divider(hw); clk_divider_enable() local
129 struct clk_divider *div = to_clk_divider(hw); clk_divider_disable() local
146 struct clk_divider *div = to_clk_divider(hw); clk_divider_is_enabled() local
[all...]
/kernel/linux/linux-5.10/drivers/clk/ti/
H A Ddivider.c34 for (clkt = table; clkt->div; clkt++) in _get_table_div()
36 return clkt->div; in _get_table_div()
49 for (clkt = divider->table; clkt->div; clkt++) in _setup_mask()
80 unsigned int div) in _get_table_val()
84 for (clkt = table; clkt->div; clkt++) in _get_table_val()
85 if (clkt->div == div) in _get_table_val()
90 static unsigned int _get_val(struct clk_omap_divider *divider, u8 div) in _get_val() argument
93 return div; in _get_val()
95 return __ffs(div); in _get_val()
79 _get_table_val(const struct clk_div_table *table, unsigned int div) _get_table_val() argument
105 unsigned int div, val; ti_clk_divider_recalc_rate() local
127 _is_valid_table_div(const struct clk_div_table *table, unsigned int div) _is_valid_table_div() argument
138 _is_valid_div(struct clk_omap_divider *divider, unsigned int div) _is_valid_div() argument
152 int div = DIV_ROUND_UP_ULL((u64)parent_rate, rate); _div_round_up() local
237 int div; ti_clk_divider_round_rate() local
247 unsigned int div, value; ti_clk_divider_set_rate() local
316 _register_divider(struct device_node *node, u32 flags, struct clk_omap_divider *div) _register_divider() argument
391 ti_clk_get_div_table(struct device_node *node, struct clk_omap_divider *div) ti_clk_get_div_table() argument
477 ti_clk_divider_populate(struct device_node *node, struct clk_omap_divider *div, u32 *flags) ti_clk_divider_populate() argument
527 struct clk_omap_divider *div; of_ti_divider_clk_setup() local
551 struct clk_omap_divider *div; of_ti_composite_divider_clk_setup() local
[all...]
/kernel/linux/linux-6.6/drivers/clk/ti/
H A Ddivider.c26 for (clkt = table; clkt->div; clkt++) in _get_table_div()
28 return clkt->div; in _get_table_div()
41 for (clkt = divider->table; clkt->div; clkt++) in _setup_mask()
72 unsigned int div) in _get_table_val()
76 for (clkt = table; clkt->div; clkt++) in _get_table_val()
77 if (clkt->div == div) in _get_table_val()
82 static unsigned int _get_val(struct clk_omap_divider *divider, u8 div) in _get_val() argument
85 return div; in _get_val()
87 return __ffs(div); in _get_val()
71 _get_table_val(const struct clk_div_table *table, unsigned int div) _get_table_val() argument
97 unsigned int div, val; ti_clk_divider_recalc_rate() local
119 _is_valid_table_div(const struct clk_div_table *table, unsigned int div) _is_valid_table_div() argument
130 _is_valid_div(struct clk_omap_divider *divider, unsigned int div) _is_valid_div() argument
144 int div = DIV_ROUND_UP_ULL((u64)parent_rate, rate); _div_round_up() local
229 int div; ti_clk_divider_round_rate() local
239 unsigned int div, value; ti_clk_divider_set_rate() local
308 _register_divider(struct device_node *node, u32 flags, struct clk_omap_divider *div) _register_divider() argument
383 ti_clk_get_div_table(struct device_node *node, struct clk_omap_divider *div) ti_clk_get_div_table() argument
469 ti_clk_divider_populate(struct device_node *node, struct clk_omap_divider *div, u32 *flags) ti_clk_divider_populate() argument
519 struct clk_omap_divider *div; of_ti_divider_clk_setup() local
543 struct clk_omap_divider *div; of_ti_composite_divider_clk_setup() local
[all...]
/kernel/linux/linux-6.6/drivers/clk/
H A Dclk-fsl-flexspi.c14 { .val = 0, .div = 1, },
15 { .val = 1, .div = 2, },
16 { .val = 2, .div = 3, },
17 { .val = 3, .div = 4, },
18 { .val = 4, .div = 5, },
19 { .val = 5, .div = 6, },
20 { .val = 6, .div = 7, },
21 { .val = 7, .div = 8, },
22 { .val = 11, .div = 12, },
23 { .val = 15, .div
[all...]
H A Dclk-divider.c51 for (clkt = table; clkt->div; clkt++) in _get_table_maxdiv()
52 if (clkt->div > maxdiv && clkt->val <= mask) in _get_table_maxdiv()
53 maxdiv = clkt->div; in _get_table_maxdiv()
62 for (clkt = table; clkt->div; clkt++) in _get_table_mindiv()
63 if (clkt->div < mindiv) in _get_table_mindiv()
64 mindiv = clkt->div; in _get_table_mindiv()
85 for (clkt = table; clkt->div; clkt++) in _get_table_div()
87 return clkt->div; in _get_table_div()
106 unsigned int div) in _get_table_val()
110 for (clkt = table; clkt->div; clk in _get_table_val()
105 _get_table_val(const struct clk_div_table *table, unsigned int div) _get_table_val() argument
116 _get_val(const struct clk_div_table *table, unsigned int div, unsigned long flags, u8 width) _get_val() argument
135 unsigned int div; divider_recalc_rate() local
162 _is_valid_table_div(const struct clk_div_table *table, unsigned int div) _is_valid_table_div() argument
173 _is_valid_div(const struct clk_div_table *table, unsigned int div, unsigned long flags) _is_valid_div() argument
183 _round_up_table(const struct clk_div_table *table, int div) _round_up_table() argument
201 _round_down_table(const struct clk_div_table *table, int div) _round_down_table() argument
223 int div = DIV_ROUND_UP_ULL((u64)parent_rate, rate); _div_round_up() local
276 _next_div(const struct clk_div_table *table, int div, unsigned long flags) _next_div() argument
350 int div; divider_determine_rate() local
365 int div; divider_ro_determine_rate() local
474 unsigned int div, value; divider_get_val() local
544 struct clk_divider *div; __clk_hw_register_divider() local
629 struct clk_divider *div; clk_unregister_divider() local
649 struct clk_divider *div; clk_hw_unregister_divider() local
[all...]
H A Dclk-milbeaut.c83 u8 div; member
101 { .val = 0, .div = 8 },
102 { .val = 1, .div = 9 },
103 { .val = 2, .div = 10 },
104 { .val = 3, .div = 15 },
105 { .div = 0 },
109 { .val = 1, .div = 2 },
110 { .val = 3, .div = 4 },
111 { .div = 0 },
115 { .val = 3, .div
463 struct m10v_clk_divider *div; m10v_clk_hw_register_divider() local
[all...]
/kernel/linux/linux-5.10/drivers/clk/mxs/
H A Dclk-div.c38 struct clk_div *div = to_clk_div(hw); in clk_div_recalc_rate() local
40 return div->ops->recalc_rate(&div->divider.hw, parent_rate); in clk_div_recalc_rate()
46 struct clk_div *div = to_clk_div(hw); in clk_div_round_rate() local
48 return div->ops->round_rate(&div->divider.hw, rate, prate); in clk_div_round_rate()
54 struct clk_div *div = to_clk_div(hw); in clk_div_set_rate() local
57 ret = div->ops->set_rate(&div->divider.hw, rate, parent_rate); in clk_div_set_rate()
59 ret = mxs_clk_wait(div in clk_div_set_rate()
73 struct clk_div *div; mxs_clk_div() local
[all...]
/kernel/linux/linux-6.6/drivers/clk/mxs/
H A Dclk-div.c38 struct clk_div *div = to_clk_div(hw); in clk_div_recalc_rate() local
40 return div->ops->recalc_rate(&div->divider.hw, parent_rate); in clk_div_recalc_rate()
46 struct clk_div *div = to_clk_div(hw); in clk_div_round_rate() local
48 return div->ops->round_rate(&div->divider.hw, rate, prate); in clk_div_round_rate()
54 struct clk_div *div = to_clk_div(hw); in clk_div_set_rate() local
57 ret = div->ops->set_rate(&div->divider.hw, rate, parent_rate); in clk_div_set_rate()
59 ret = mxs_clk_wait(div in clk_div_set_rate()
73 struct clk_div *div; mxs_clk_div() local
[all...]
/kernel/linux/linux-5.10/drivers/clk/sunxi/
H A Dclk-sunxi.c35 u8 div; in sun4i_get_pll1_factors() local
38 div = req->rate / 6000000; in sun4i_get_pll1_factors()
39 req->rate = 6000000 * div; in sun4i_get_pll1_factors()
52 if (div < 10) in sun4i_get_pll1_factors()
56 else if (div < 20 || (div < 32 && (div & 1))) in sun4i_get_pll1_factors()
61 else if (div < 40 || (div < 64 && (div in sun4i_get_pll1_factors()
159 u8 div; sun8i_a23_get_pll1_factors() local
203 u8 div; sun4i_get_pll5_factors() local
230 u8 div; sun6i_a31_get_pll6_factors() local
251 u32 div; sun5i_a13_get_ahb_factors() local
290 u8 div, calcp, calcm = 1; sun6i_get_ahb1_factors() local
348 int div; sun4i_get_apb1_factors() local
386 u8 div, calcm, calcp; sun7i_a20_get_out_factors() local
890 } div[SUNXI_DIVS_MAX_QTY]; global() member
[all...]
/kernel/linux/linux-6.6/drivers/clk/sunxi/
H A Dclk-sunxi.c35 u8 div; in sun4i_get_pll1_factors() local
38 div = req->rate / 6000000; in sun4i_get_pll1_factors()
39 req->rate = 6000000 * div; in sun4i_get_pll1_factors()
52 if (div < 10) in sun4i_get_pll1_factors()
56 else if (div < 20 || (div < 32 && (div & 1))) in sun4i_get_pll1_factors()
61 else if (div < 40 || (div < 64 && (div in sun4i_get_pll1_factors()
159 u8 div; sun8i_a23_get_pll1_factors() local
203 u8 div; sun4i_get_pll5_factors() local
230 u8 div; sun6i_a31_get_pll6_factors() local
251 u32 div; sun5i_a13_get_ahb_factors() local
290 u8 div, calcp, calcm = 1; sun6i_get_ahb1_factors() local
348 int div; sun4i_get_apb1_factors() local
386 u8 div, calcm, calcp; sun7i_a20_get_out_factors() local
890 } div[SUNXI_DIVS_MAX_QTY]; global() member
[all...]
/kernel/linux/linux-5.10/drivers/clk/bcm/
H A Dclk-iproc-asiu.c32 struct iproc_asiu_div div; member
92 val = readl(asiu->div_base + clk->div.offset); in iproc_asiu_clk_recalc_rate()
93 if ((val & (1 << clk->div.en_shift)) == 0) { in iproc_asiu_clk_recalc_rate()
99 div_h = (val >> clk->div.high_shift) & bit_mask(clk->div.high_width); in iproc_asiu_clk_recalc_rate()
101 div_l = (val >> clk->div.low_shift) & bit_mask(clk->div.low_width); in iproc_asiu_clk_recalc_rate()
114 unsigned int div; in iproc_asiu_clk_round_rate() local
122 div = DIV_ROUND_CLOSEST(*parent_rate, rate); in iproc_asiu_clk_round_rate()
123 if (div < in iproc_asiu_clk_round_rate()
134 unsigned int div, div_h, div_l; iproc_asiu_clk_set_rate() local
185 iproc_asiu_setup(struct device_node *node, const struct iproc_asiu_div *div, const struct iproc_asiu_gate *gate, unsigned int num_clks) iproc_asiu_setup() argument
[all...]
H A Dclk-kona.c58 static inline u64 scaled_div_value(struct bcm_clk_div *div, u32 reg_div) in scaled_div_value() argument
60 return (u64)reg_div + ((u64)1 << div->u.s.frac_width); in scaled_div_value()
68 u64 scaled_div_build(struct bcm_clk_div *div, u32 div_value, u32 billionths) in scaled_div_build() argument
76 combined <<= div->u.s.frac_width; in scaled_div_build()
83 scaled_div_min(struct bcm_clk_div *div) in scaled_div_min() argument
85 if (divider_is_fixed(div)) in scaled_div_min()
86 return (u64)div->u.fixed; in scaled_div_min()
88 return scaled_div_value(div, 0); in scaled_div_min()
92 u64 scaled_div_max(struct bcm_clk_div *div) in scaled_div_max() argument
96 if (divider_is_fixed(div)) in scaled_div_max()
109 divider(struct bcm_clk_div *div, u64 scaled_div) divider() argument
119 scale_rate(struct bcm_clk_div *div, u32 rate) scale_rate() argument
564 divider_read_scaled(struct ccu_data *ccu, struct bcm_clk_div *div) divider_read_scaled() argument
591 __div_commit(struct ccu_data *ccu, struct bcm_clk_gate *gate, struct bcm_clk_div *div, struct bcm_clk_trig *trig) __div_commit() argument
647 div_init(struct ccu_data *ccu, struct bcm_clk_gate *gate, struct bcm_clk_div *div, struct bcm_clk_trig *trig) div_init() argument
655 divider_write(struct ccu_data *ccu, struct bcm_clk_gate *gate, struct bcm_clk_div *div, struct bcm_clk_trig *trig, u64 scaled_div) divider_write() argument
693 clk_recalc_rate(struct ccu_data *ccu, struct bcm_clk_div *div, struct bcm_clk_div *pre_div, unsigned long parent_rate) clk_recalc_rate() argument
748 round_rate(struct ccu_data *ccu, struct bcm_clk_div *div, struct bcm_clk_div *pre_div, unsigned long rate, unsigned long parent_rate, u64 *scaled_div) round_rate() argument
1012 struct bcm_clk_div *div = &bcm_clk->u.peri->div; kona_peri_clk_round_rate() local
1135 struct bcm_clk_div *div = &data->div; kona_peri_clk_set_rate() local
[all...]
/kernel/linux/linux-6.6/drivers/clk/bcm/
H A Dclk-iproc-asiu.c22 struct iproc_asiu_div div; member
82 val = readl(asiu->div_base + clk->div.offset); in iproc_asiu_clk_recalc_rate()
83 if ((val & (1 << clk->div.en_shift)) == 0) { in iproc_asiu_clk_recalc_rate()
89 div_h = (val >> clk->div.high_shift) & bit_mask(clk->div.high_width); in iproc_asiu_clk_recalc_rate()
91 div_l = (val >> clk->div.low_shift) & bit_mask(clk->div.low_width); in iproc_asiu_clk_recalc_rate()
104 unsigned int div; in iproc_asiu_clk_round_rate() local
112 div = DIV_ROUND_CLOSEST(*parent_rate, rate); in iproc_asiu_clk_round_rate()
113 if (div < in iproc_asiu_clk_round_rate()
124 unsigned int div, div_h, div_l; iproc_asiu_clk_set_rate() local
175 iproc_asiu_setup(struct device_node *node, const struct iproc_asiu_div *div, const struct iproc_asiu_gate *gate, unsigned int num_clks) iproc_asiu_setup() argument
[all...]
H A Dclk-kona.c50 static inline u64 scaled_div_value(struct bcm_clk_div *div, u32 reg_div) in scaled_div_value() argument
52 return (u64)reg_div + ((u64)1 << div->u.s.frac_width); in scaled_div_value()
60 u64 scaled_div_build(struct bcm_clk_div *div, u32 div_value, u32 billionths) in scaled_div_build() argument
68 combined <<= div->u.s.frac_width; in scaled_div_build()
75 scaled_div_min(struct bcm_clk_div *div) in scaled_div_min() argument
77 if (divider_is_fixed(div)) in scaled_div_min()
78 return (u64)div->u.fixed; in scaled_div_min()
80 return scaled_div_value(div, 0); in scaled_div_min()
84 u64 scaled_div_max(struct bcm_clk_div *div) in scaled_div_max() argument
88 if (divider_is_fixed(div)) in scaled_div_max()
101 divider(struct bcm_clk_div *div, u64 scaled_div) divider() argument
111 scale_rate(struct bcm_clk_div *div, u32 rate) scale_rate() argument
556 divider_read_scaled(struct ccu_data *ccu, struct bcm_clk_div *div) divider_read_scaled() argument
583 __div_commit(struct ccu_data *ccu, struct bcm_clk_gate *gate, struct bcm_clk_div *div, struct bcm_clk_trig *trig) __div_commit() argument
639 div_init(struct ccu_data *ccu, struct bcm_clk_gate *gate, struct bcm_clk_div *div, struct bcm_clk_trig *trig) div_init() argument
647 divider_write(struct ccu_data *ccu, struct bcm_clk_gate *gate, struct bcm_clk_div *div, struct bcm_clk_trig *trig, u64 scaled_div) divider_write() argument
685 clk_recalc_rate(struct ccu_data *ccu, struct bcm_clk_div *div, struct bcm_clk_div *pre_div, unsigned long parent_rate) clk_recalc_rate() argument
740 round_rate(struct ccu_data *ccu, struct bcm_clk_div *div, struct bcm_clk_div *pre_div, unsigned long rate, unsigned long parent_rate, u64 *scaled_div) round_rate() argument
1004 struct bcm_clk_div *div = &bcm_clk->u.peri->div; kona_peri_clk_round_rate() local
1127 struct bcm_clk_div *div = &data->div; kona_peri_clk_set_rate() local
[all...]
/kernel/linux/linux-5.10/drivers/clk/tegra/
H A Dclk-divider.c24 int div; in get_div() local
26 div = div_frac_get(rate, parent_rate, divider->width, in get_div()
29 if (div < 0) in get_div()
32 return div; in get_div()
40 int div, mul; in clk_frac_div_recalc_rate() local
49 div = (reg >> divider->shift) & div_mask(divider); in clk_frac_div_recalc_rate()
52 div += mul; in clk_frac_div_recalc_rate()
55 rate += div - 1; in clk_frac_div_recalc_rate()
56 do_div(rate, div); in clk_frac_div_recalc_rate()
65 int div, mu in clk_frac_div_round_rate() local
84 int div; clk_frac_div_set_rate() local
[all...]
/kernel/linux/linux-5.10/drivers/mmc/host/
H A Dmeson-mx-sdhc-clkc.c19 struct clk_divider div; member
34 { .div = 6, .val = 5, },
35 { .div = 8, .val = 7, },
36 { .div = 9, .val = 8, },
37 { .div = 10, .val = 9, },
38 { .div = 12, .val = 11, },
39 { .div = 16, .val = 15, },
40 { .div = 18, .val = 17, },
41 { .div = 34, .val = 33, },
42 { .div
[all...]
/kernel/linux/linux-6.6/drivers/mmc/host/
H A Dmeson-mx-sdhc-clkc.c17 struct clk_divider div; member
32 { .div = 6, .val = 5, },
33 { .div = 8, .val = 7, },
34 { .div = 9, .val = 8, },
35 { .div = 10, .val = 9, },
36 { .div = 12, .val = 11, },
37 { .div = 16, .val = 15, },
38 { .div = 18, .val = 17, },
39 { .div = 34, .val = 33, },
40 { .div
[all...]
/kernel/linux/linux-6.6/drivers/clk/tegra/
H A Dclk-divider.c24 int div; in get_div() local
26 div = div_frac_get(rate, parent_rate, divider->width, in get_div()
29 if (div < 0) in get_div()
32 return div; in get_div()
40 int div, mul; in clk_frac_div_recalc_rate() local
49 div = (reg >> divider->shift) & div_mask(divider); in clk_frac_div_recalc_rate()
52 div += mul; in clk_frac_div_recalc_rate()
55 rate += div - 1; in clk_frac_div_recalc_rate()
56 do_div(rate, div); in clk_frac_div_recalc_rate()
65 int div, mu in clk_frac_div_round_rate() local
84 int div; clk_frac_div_set_rate() local
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