Lines Matching refs:div
12 #define pr_fmt(fmt) "bt1-ccu-div: " fmt
27 #include "ccu-div.h"
62 unsigned long div)
64 u64 ns = 4ULL * (div ?: 1) * NSEC_PER_SEC;
72 unsigned long div)
74 return ref_clk / (div ?: 1);
77 static int ccu_div_var_update_clkdiv(struct ccu_div *div,
88 if (div->features & CCU_DIV_LOCK_SHIFTED)
93 regmap_update_bits(div->sys_regs, div->reg_ctl,
103 regmap_read(div->sys_regs, div->reg_ctl, &val);
114 struct ccu_div *div = to_ccu_div(hw);
124 regmap_read(div->sys_regs, div->reg_ctl, &val);
128 spin_lock_irqsave(&div->lock, flags);
129 ret = ccu_div_var_update_clkdiv(div, clk_hw_get_rate(parent_hw),
130 ccu_div_get(div->mask, val));
132 regmap_update_bits(div->sys_regs, div->reg_ctl,
134 spin_unlock_irqrestore(&div->lock, flags);
143 struct ccu_div *div = to_ccu_div(hw);
146 spin_lock_irqsave(&div->lock, flags);
147 regmap_update_bits(div->sys_regs, div->reg_ctl,
149 spin_unlock_irqrestore(&div->lock, flags);
156 struct ccu_div *div = to_ccu_div(hw);
159 spin_lock_irqsave(&div->lock, flags);
160 regmap_update_bits(div->sys_regs, div->reg_ctl, CCU_DIV_CTL_EN, 0);
161 spin_unlock_irqrestore(&div->lock, flags);
166 struct ccu_div *div = to_ccu_div(hw);
169 regmap_read(div->sys_regs, div->reg_ctl, &val);
176 struct ccu_div *div = to_ccu_div(hw);
179 spin_lock_irqsave(&div->lock, flags);
180 regmap_update_bits(div->sys_regs, div->reg_ctl,
182 spin_unlock_irqrestore(&div->lock, flags);
189 struct ccu_div *div = to_ccu_div(hw);
192 spin_lock_irqsave(&div->lock, flags);
193 regmap_update_bits(div->sys_regs, div->reg_ctl,
195 spin_unlock_irqrestore(&div->lock, flags);
200 struct ccu_div *div = to_ccu_div(hw);
203 regmap_read(div->sys_regs, div->reg_ctl, &val);
211 struct ccu_div *div = to_ccu_div(hw);
215 regmap_read(div->sys_regs, div->reg_ctl, &val);
216 divider = ccu_div_get(div->mask, val);
235 struct ccu_div *div = to_ccu_div(hw);
238 divider = ccu_div_var_calc_divider(rate, *parent_rate, div->mask);
251 struct ccu_div *div = to_ccu_div(hw);
256 divider = ccu_div_var_calc_divider(rate, parent_rate, div->mask);
257 if (divider == 1 && div->features & CCU_DIV_SKIP_ONE) {
259 } else if (div->features & CCU_DIV_SKIP_ONE_TO_THREE) {
266 val = ccu_div_prep(div->mask, divider);
268 spin_lock_irqsave(&div->lock, flags);
269 regmap_update_bits(div->sys_regs, div->reg_ctl, div->mask, val);
270 ret = ccu_div_var_update_clkdiv(div, parent_rate, divider);
271 spin_unlock_irqrestore(&div->lock, flags);
285 struct ccu_div *div = to_ccu_div(hw);
289 divider = ccu_div_var_calc_divider(rate, parent_rate, div->mask);
290 val = ccu_div_prep(div->mask, divider);
296 spin_lock_irqsave(&div->lock, flags);
297 regmap_update_bits(div->sys_regs, div->reg_ctl,
298 div->mask | CCU_DIV_CTL_EN, val);
299 spin_unlock_irqrestore(&div->lock, flags);
307 struct ccu_div *div = to_ccu_div(hw);
309 return ccu_div_calc_freq(parent_rate, div->divider);
315 struct ccu_div *div = to_ccu_div(hw);
317 return ccu_div_calc_freq(*parent_rate, div->divider);
326 int ccu_div_reset_domain(struct ccu_div *div)
330 if (!div || !(div->features & CCU_DIV_RESET_DOMAIN))
333 spin_lock_irqsave(&div->lock, flags);
334 regmap_update_bits(div->sys_regs, div->reg_ctl,
336 spin_unlock_irqrestore(&div->lock, flags);
347 struct ccu_div *div;
378 struct ccu_div *div = bit->div;
381 spin_lock_irqsave(&div->lock, flags);
382 regmap_update_bits(div->sys_regs, div->reg_ctl,
384 spin_unlock_irqrestore(&div->lock, flags);
391 struct ccu_div *div = priv;
396 CCU_DIV_CLKDIV_MAX(div->mask));
397 data = ccu_div_prep(div->mask, val);
399 spin_lock_irqsave(&div->lock, flags);
400 regmap_update_bits(div->sys_regs, div->reg_ctl, div->mask, data);
401 spin_unlock_irqrestore(&div->lock, flags);
419 struct ccu_div *div = bit->div;
422 regmap_read(div->sys_regs, div->reg_ctl, &data);
432 struct ccu_div *div = priv;
435 regmap_read(div->sys_regs, div->reg_ctl, &data);
436 *val = ccu_div_get(div->mask, data);
445 struct ccu_div *div = priv;
447 *val = div->divider;
456 struct ccu_div *div = to_ccu_div(hw);
461 num += !!(div->flags & CLK_SET_RATE_GATE) +
462 !!(div->features & CCU_DIV_RESET_DOMAIN);
470 if (!(div->flags & CLK_SET_RATE_GATE) &&
475 if (!(div->features & CCU_DIV_RESET_DOMAIN) &&
484 bits[didx].div = div;
486 if (div->features & CCU_DIV_LOCK_SHIFTED &&
498 div, &ccu_div_dbgfs_var_clkdiv_fops);
503 struct ccu_div *div = to_ccu_div(hw);
511 bit->div = div;
515 debugfs_create_file_unsafe("div_clkdiv", 0400, dentry, div,
521 struct ccu_div *div = to_ccu_div(hw);
529 bit->div = div;
536 struct ccu_div *div = to_ccu_div(hw);
538 debugfs_create_file_unsafe("div_clkdiv", 0400, dentry, div,
596 struct ccu_div *div;
602 div = kzalloc(sizeof(*div), GFP_KERNEL);
603 if (!div)
611 div->hw.init = &hw_init;
612 div->id = div_init->id;
613 div->reg_ctl = div_init->base + CCU_DIV_CTL;
614 div->sys_regs = div_init->sys_regs;
615 div->flags = div_init->flags;
616 div->features = div_init->features;
617 spin_lock_init(&div->lock);
627 div->mask = CCU_DIV_CTL_CLKDIV_MASK(div_init->width);
630 div->divider = div_init->divider;
635 div->divider = div_init->divider;
650 ret = of_clk_hw_register(div_init->np, &div->hw);
654 return div;
657 kfree(div);
662 void ccu_div_hw_unregister(struct ccu_div *div)
664 clk_hw_unregister(&div->hw);
666 kfree(div);