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Searched refs:clk_table (Results 1 - 25 of 60) sorted by relevance

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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_clk_mgr.c352 .clk_table = {
459 bw_params->clk_table.entries[i - 1].dcfclk_mhz + 1; in dcn314_build_watermark_ranges()
462 bw_params->clk_table.entries[i].dcfclk_mhz; in dcn314_build_watermark_ranges()
572 struct clk_limit_table_entry def_max = bw_params->clk_table.entries[bw_params->clk_table.num_entries - 1]; in dcn314_clk_mgr_helper_populate_bw_params()
613 for (j = bw_params->clk_table.num_entries - 1; j > 0; j--) in dcn314_clk_mgr_helper_populate_bw_params()
614 if (bw_params->clk_table.entries[j].dcfclk_mhz <= clock_table->DcfClocks[i]) in dcn314_clk_mgr_helper_populate_bw_params()
617 bw_params->clk_table.entries[i].phyclk_mhz = bw_params->clk_table.entries[j].phyclk_mhz; in dcn314_clk_mgr_helper_populate_bw_params()
618 bw_params->clk_table in dcn314_clk_mgr_helper_populate_bw_params()
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
H A Ddcn315_clk_mgr.c247 .clk_table = {
396 bw_params->clk_table.entries[i - 1].dcfclk_mhz + 1; in dcn315_build_watermark_ranges()
399 bw_params->clk_table.entries[i].dcfclk_mhz; in dcn315_build_watermark_ranges()
479 struct clk_limit_table_entry def_max = bw_params->clk_table.entries[bw_params->clk_table.num_entries - 1]; in dcn315_clk_mgr_helper_populate_bw_params()
495 for (j = bw_params->clk_table.num_entries - 1; j > 0; j--) in dcn315_clk_mgr_helper_populate_bw_params()
496 if (bw_params->clk_table.entries[j].dcfclk_mhz <= clock_table->DcfClocks[i]) in dcn315_clk_mgr_helper_populate_bw_params()
498 bw_params->clk_table.entries[i].phyclk_mhz = bw_params->clk_table.entries[j].phyclk_mhz; in dcn315_clk_mgr_helper_populate_bw_params()
499 bw_params->clk_table in dcn315_clk_mgr_helper_populate_bw_params()
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.c583 struct clk_limit_table *clk_table = &bw_params->clk_table; in dcn31_update_bw_bounding_box() local
597 ASSERT(clk_table->num_entries); in dcn31_update_bw_bounding_box()
600 for (i = 0; i < clk_table->num_entries; ++i) { in dcn31_update_bw_bounding_box()
601 if (clk_table->entries[i].dispclk_mhz > max_dispclk_mhz) in dcn31_update_bw_bounding_box()
602 max_dispclk_mhz = clk_table->entries[i].dispclk_mhz; in dcn31_update_bw_bounding_box()
603 if (clk_table->entries[i].dppclk_mhz > max_dppclk_mhz) in dcn31_update_bw_bounding_box()
604 max_dppclk_mhz = clk_table->entries[i].dppclk_mhz; in dcn31_update_bw_bounding_box()
607 for (i = 0; i < clk_table->num_entries; i++) { in dcn31_update_bw_bounding_box()
610 if ((unsigned int) dcn3_1_soc.clock_limits[j].dcfclk_mhz <= clk_table in dcn31_update_bw_bounding_box()
660 struct clk_limit_table *clk_table = &bw_params->clk_table; dcn315_update_bw_bounding_box() local
722 struct clk_limit_table *clk_table = &bw_params->clk_table; dcn316_update_bw_bounding_box() local
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn321/
H A Ddcn321_fpu.c365 if (bw_params->clk_table.entries[i].dcfclk_mhz > max_clk_data.dcfclk_mhz) in build_synthetic_soc_states()
366 max_clk_data.dcfclk_mhz = bw_params->clk_table.entries[i].dcfclk_mhz; in build_synthetic_soc_states()
367 if (bw_params->clk_table.entries[i].fclk_mhz > max_clk_data.fclk_mhz) in build_synthetic_soc_states()
368 max_clk_data.fclk_mhz = bw_params->clk_table.entries[i].fclk_mhz; in build_synthetic_soc_states()
369 if (bw_params->clk_table.entries[i].memclk_mhz > max_clk_data.memclk_mhz) in build_synthetic_soc_states()
370 max_clk_data.memclk_mhz = bw_params->clk_table.entries[i].memclk_mhz; in build_synthetic_soc_states()
371 if (bw_params->clk_table.entries[i].dispclk_mhz > max_clk_data.dispclk_mhz) in build_synthetic_soc_states()
372 max_clk_data.dispclk_mhz = bw_params->clk_table.entries[i].dispclk_mhz; in build_synthetic_soc_states()
373 if (bw_params->clk_table.entries[i].dppclk_mhz > max_clk_data.dppclk_mhz) in build_synthetic_soc_states()
374 max_clk_data.dppclk_mhz = bw_params->clk_table in build_synthetic_soc_states()
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/kernel/linux/linux-5.10/drivers/clk/samsung/
H A Dclk-s5pv210-audss.c70 struct clk_hw **clk_table; in s5pv210_audss_clk_probe() local
88 clk_table = clk_data->hws; in s5pv210_audss_clk_probe()
117 clk_table[CLK_MOUT_AUDSS] = clk_hw_register_mux(NULL, "mout_audss", in s5pv210_audss_clk_probe()
128 clk_table[CLK_MOUT_I2S_A] = clk_hw_register_mux(NULL, "mout_i2s_audss", in s5pv210_audss_clk_probe()
133 clk_table[CLK_DOUT_AUD_BUS] = clk_hw_register_divider(NULL, in s5pv210_audss_clk_probe()
136 clk_table[CLK_DOUT_I2S_A] = clk_hw_register_divider(NULL, in s5pv210_audss_clk_probe()
140 clk_table[CLK_I2S] = clk_hw_register_gate(NULL, "i2s_audss", in s5pv210_audss_clk_probe()
146 clk_table[CLK_HCLK_I2S] = clk_hw_register_gate(NULL, "hclk_i2s_audss", in s5pv210_audss_clk_probe()
149 clk_table[CLK_HCLK_UART] = clk_hw_register_gate(NULL, "hclk_uart_audss", in s5pv210_audss_clk_probe()
152 clk_table[CLK_HCLK_HW in s5pv210_audss_clk_probe()
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H A Dclk-s3c2410-dclk.c245 struct clk_hw **clk_table; in s3c24xx_dclk_probe() local
255 clk_table = s3c24xx_dclk->clk_data.hws; in s3c24xx_dclk_probe()
270 clk_table[MUX_DCLK0] = clk_hw_register_mux(&pdev->dev, "mux_dclk0", in s3c24xx_dclk_probe()
275 clk_table[MUX_DCLK1] = clk_hw_register_mux(&pdev->dev, "mux_dclk1", in s3c24xx_dclk_probe()
281 clk_table[DIV_DCLK0] = clk_hw_register_divider(&pdev->dev, "div_dclk0", in s3c24xx_dclk_probe()
284 clk_table[DIV_DCLK1] = clk_hw_register_divider(&pdev->dev, "div_dclk1", in s3c24xx_dclk_probe()
288 clk_table[GATE_DCLK0] = clk_hw_register_gate(&pdev->dev, "gate_dclk0", in s3c24xx_dclk_probe()
292 clk_table[GATE_DCLK1] = clk_hw_register_gate(&pdev->dev, "gate_dclk1", in s3c24xx_dclk_probe()
297 clk_table[MUX_CLKOUT0] = s3c24xx_register_clkout(&pdev->dev, in s3c24xx_dclk_probe()
300 clk_table[MUX_CLKOUT in s3c24xx_dclk_probe()
358 struct clk_hw **clk_table = s3c24xx_dclk->clk_data.hws; s3c24xx_dclk_remove() local
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H A Dclk-exynos-audss.c131 struct clk_hw **clk_table; in exynos_audss_clk_probe() local
155 clk_table = clk_data->hws; in exynos_audss_clk_probe()
186 clk_table[EXYNOS_MOUT_AUDSS] = clk_hw_register_mux(dev, "mout_audss", in exynos_audss_clk_probe()
197 clk_table[EXYNOS_MOUT_I2S] = clk_hw_register_mux(dev, "mout_i2s", in exynos_audss_clk_probe()
202 clk_table[EXYNOS_DOUT_SRP] = clk_hw_register_divider(dev, "dout_srp", in exynos_audss_clk_probe()
206 clk_table[EXYNOS_DOUT_AUD_BUS] = clk_hw_register_divider(dev, in exynos_audss_clk_probe()
210 clk_table[EXYNOS_DOUT_I2S] = clk_hw_register_divider(dev, "dout_i2s", in exynos_audss_clk_probe()
214 clk_table[EXYNOS_SRP_CLK] = clk_hw_register_gate(dev, "srp_clk", in exynos_audss_clk_probe()
218 clk_table[EXYNOS_I2S_BUS] = clk_hw_register_gate(dev, "i2s_bus", in exynos_audss_clk_probe()
222 clk_table[EXYNOS_SCLK_I2 in exynos_audss_clk_probe()
[all...]
/kernel/linux/linux-6.6/drivers/clk/samsung/
H A Dclk-s5pv210-audss.c69 struct clk_hw **clk_table; in s5pv210_audss_clk_probe() local
84 clk_table = clk_data->hws; in s5pv210_audss_clk_probe()
113 clk_table[CLK_MOUT_AUDSS] = clk_hw_register_mux(NULL, "mout_audss", in s5pv210_audss_clk_probe()
124 clk_table[CLK_MOUT_I2S_A] = clk_hw_register_mux(NULL, "mout_i2s_audss", in s5pv210_audss_clk_probe()
129 clk_table[CLK_DOUT_AUD_BUS] = clk_hw_register_divider(NULL, in s5pv210_audss_clk_probe()
132 clk_table[CLK_DOUT_I2S_A] = clk_hw_register_divider(NULL, in s5pv210_audss_clk_probe()
136 clk_table[CLK_I2S] = clk_hw_register_gate(NULL, "i2s_audss", in s5pv210_audss_clk_probe()
142 clk_table[CLK_HCLK_I2S] = clk_hw_register_gate(NULL, "hclk_i2s_audss", in s5pv210_audss_clk_probe()
145 clk_table[CLK_HCLK_UART] = clk_hw_register_gate(NULL, "hclk_uart_audss", in s5pv210_audss_clk_probe()
148 clk_table[CLK_HCLK_HW in s5pv210_audss_clk_probe()
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H A Dclk-exynos-audss.c130 struct clk_hw **clk_table; in exynos_audss_clk_probe() local
152 clk_table = clk_data->hws; in exynos_audss_clk_probe()
183 clk_table[EXYNOS_MOUT_AUDSS] = clk_hw_register_mux(dev, "mout_audss", in exynos_audss_clk_probe()
194 clk_table[EXYNOS_MOUT_I2S] = clk_hw_register_mux(dev, "mout_i2s", in exynos_audss_clk_probe()
199 clk_table[EXYNOS_DOUT_SRP] = clk_hw_register_divider(dev, "dout_srp", in exynos_audss_clk_probe()
203 clk_table[EXYNOS_DOUT_AUD_BUS] = clk_hw_register_divider(dev, in exynos_audss_clk_probe()
207 clk_table[EXYNOS_DOUT_I2S] = clk_hw_register_divider(dev, "dout_i2s", in exynos_audss_clk_probe()
211 clk_table[EXYNOS_SRP_CLK] = clk_hw_register_gate(dev, "srp_clk", in exynos_audss_clk_probe()
215 clk_table[EXYNOS_I2S_BUS] = clk_hw_register_gate(dev, "i2s_bus", in exynos_audss_clk_probe()
219 clk_table[EXYNOS_SCLK_I2 in exynos_audss_clk_probe()
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn302/
H A Ddcn302_fpu.c220 if (bw_params->clk_table.entries[0].memclk_mhz) { in dcn302_fpu_update_bw_bounding_box()
224 if (bw_params->clk_table.entries[i].dcfclk_mhz > max_dcfclk_mhz) in dcn302_fpu_update_bw_bounding_box()
225 max_dcfclk_mhz = bw_params->clk_table.entries[i].dcfclk_mhz; in dcn302_fpu_update_bw_bounding_box()
226 if (bw_params->clk_table.entries[i].dispclk_mhz > max_dispclk_mhz) in dcn302_fpu_update_bw_bounding_box()
227 max_dispclk_mhz = bw_params->clk_table.entries[i].dispclk_mhz; in dcn302_fpu_update_bw_bounding_box()
228 if (bw_params->clk_table.entries[i].dppclk_mhz > max_dppclk_mhz) in dcn302_fpu_update_bw_bounding_box()
229 max_dppclk_mhz = bw_params->clk_table.entries[i].dppclk_mhz; in dcn302_fpu_update_bw_bounding_box()
230 if (bw_params->clk_table.entries[i].phyclk_mhz > max_phyclk_mhz) in dcn302_fpu_update_bw_bounding_box()
231 max_phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; in dcn302_fpu_update_bw_bounding_box()
258 num_uclk_states = bw_params->clk_table in dcn302_fpu_update_bw_bounding_box()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn303/
H A Ddcn303_fpu.c216 if (bw_params->clk_table.entries[0].memclk_mhz) { in dcn303_fpu_update_bw_bounding_box()
220 if (bw_params->clk_table.entries[i].dcfclk_mhz > max_dcfclk_mhz) in dcn303_fpu_update_bw_bounding_box()
221 max_dcfclk_mhz = bw_params->clk_table.entries[i].dcfclk_mhz; in dcn303_fpu_update_bw_bounding_box()
222 if (bw_params->clk_table.entries[i].dispclk_mhz > max_dispclk_mhz) in dcn303_fpu_update_bw_bounding_box()
223 max_dispclk_mhz = bw_params->clk_table.entries[i].dispclk_mhz; in dcn303_fpu_update_bw_bounding_box()
224 if (bw_params->clk_table.entries[i].dppclk_mhz > max_dppclk_mhz) in dcn303_fpu_update_bw_bounding_box()
225 max_dppclk_mhz = bw_params->clk_table.entries[i].dppclk_mhz; in dcn303_fpu_update_bw_bounding_box()
226 if (bw_params->clk_table.entries[i].phyclk_mhz > max_phyclk_mhz) in dcn303_fpu_update_bw_bounding_box()
227 max_phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; in dcn303_fpu_update_bw_bounding_box()
252 num_uclk_states = bw_params->clk_table in dcn303_fpu_update_bw_bounding_box()
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/kernel/linux/linux-5.10/drivers/clk/mmp/
H A Dclk.c13 struct clk **clk_table; in mmp_clk_init() local
15 clk_table = kcalloc(nr_clks, sizeof(struct clk *), GFP_KERNEL); in mmp_clk_init()
16 if (!clk_table) in mmp_clk_init()
19 unit->clk_table = clk_table; in mmp_clk_init()
21 unit->clk_data.clks = clk_table; in mmp_clk_init()
44 unit->clk_table[clks[i].id] = clk; in mmp_register_fixed_rate_clks()
66 unit->clk_table[clks[i].id] = clk; in mmp_register_fixed_factor_clks()
92 unit->clk_table[clks[i].id] = clk; in mmp_register_general_gate_clks()
120 unit->clk_table[clk in mmp_register_gate_clks()
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/kernel/linux/linux-6.6/drivers/clk/mmp/
H A Dclk.c13 struct clk **clk_table; in mmp_clk_init() local
15 clk_table = kcalloc(nr_clks, sizeof(struct clk *), GFP_KERNEL); in mmp_clk_init()
16 if (!clk_table) in mmp_clk_init()
19 unit->clk_table = clk_table; in mmp_clk_init()
21 unit->clk_data.clks = clk_table; in mmp_clk_init()
44 unit->clk_table[clks[i].id] = clk; in mmp_register_fixed_rate_clks()
66 unit->clk_table[clks[i].id] = clk; in mmp_register_fixed_factor_clks()
92 unit->clk_table[clks[i].id] = clk; in mmp_register_general_gate_clks()
120 unit->clk_table[clk in mmp_register_gate_clks()
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn314/
H A Ddcn314_fpu.c184 struct clk_limit_table *clk_table = &bw_params->clk_table; in dcn314_update_bw_bounding_box_fpu() local
205 ASSERT(clk_table->num_entries); in dcn314_update_bw_bounding_box_fpu()
208 for (i = 0; i < clk_table->num_entries; ++i) { in dcn314_update_bw_bounding_box_fpu()
209 if (clk_table->entries[i].dispclk_mhz > max_dispclk_mhz) in dcn314_update_bw_bounding_box_fpu()
210 max_dispclk_mhz = clk_table->entries[i].dispclk_mhz; in dcn314_update_bw_bounding_box_fpu()
211 if (clk_table->entries[i].dppclk_mhz > max_dppclk_mhz) in dcn314_update_bw_bounding_box_fpu()
212 max_dppclk_mhz = clk_table->entries[i].dppclk_mhz; in dcn314_update_bw_bounding_box_fpu()
215 for (i = 0; i < clk_table->num_entries; i++) { in dcn314_update_bw_bounding_box_fpu()
218 if ((unsigned int) dcn3_14_soc.clock_limits[j].dcfclk_mhz <= clk_table in dcn314_update_bw_bounding_box_fpu()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_5_ppt.c621 DpmClocks_t *clk_table = smu->smu_table.clocks_table; in smu_v13_0_5_get_dpm_level_count() local
625 *count = clk_table->NumSocClkLevelsEnabled; in smu_v13_0_5_get_dpm_level_count()
628 *count = clk_table->VcnClkLevelsEnabled; in smu_v13_0_5_get_dpm_level_count()
631 *count = clk_table->VcnClkLevelsEnabled; in smu_v13_0_5_get_dpm_level_count()
634 *count = clk_table->NumDfPstatesEnabled; in smu_v13_0_5_get_dpm_level_count()
637 *count = clk_table->NumDfPstatesEnabled; in smu_v13_0_5_get_dpm_level_count()
651 DpmClocks_t *clk_table = smu->smu_table.clocks_table; in smu_v13_0_5_get_dpm_freq_by_index() local
653 if (!clk_table || clk_type >= SMU_CLK_COUNT) in smu_v13_0_5_get_dpm_freq_by_index()
658 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) in smu_v13_0_5_get_dpm_freq_by_index()
660 *freq = clk_table in smu_v13_0_5_get_dpm_freq_by_index()
724 DpmClocks_t *clk_table = smu->smu_table.clocks_table; smu_v13_0_5_get_dpm_ultimate_freq() local
1097 DpmClocks_t *clk_table = smu->smu_table.clocks_table; smu_v13_0_5_set_fine_grain_gfx_freq_parameters() local
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H A Dyellow_carp_ppt.c755 DpmClocks_t *clk_table = smu->smu_table.clocks_table; in yellow_carp_get_dpm_level_count() local
759 *count = clk_table->NumSocClkLevelsEnabled; in yellow_carp_get_dpm_level_count()
762 *count = clk_table->VcnClkLevelsEnabled; in yellow_carp_get_dpm_level_count()
765 *count = clk_table->VcnClkLevelsEnabled; in yellow_carp_get_dpm_level_count()
768 *count = clk_table->NumDfPstatesEnabled; in yellow_carp_get_dpm_level_count()
771 *count = clk_table->NumDfPstatesEnabled; in yellow_carp_get_dpm_level_count()
785 DpmClocks_t *clk_table = smu->smu_table.clocks_table; in yellow_carp_get_dpm_freq_by_index() local
787 if (!clk_table || clk_type >= SMU_CLK_COUNT) in yellow_carp_get_dpm_freq_by_index()
792 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) in yellow_carp_get_dpm_freq_by_index()
794 *freq = clk_table in yellow_carp_get_dpm_freq_by_index()
858 DpmClocks_t *clk_table = smu->smu_table.clocks_table; yellow_carp_get_dpm_ultimate_freq() local
1324 DpmClocks_t *clk_table = smu->smu_table.clocks_table; yellow_carp_set_fine_grain_gfx_freq_parameters() local
[all...]
H A Dsmu_v13_0_4_ppt.c417 DpmClocks_t *clk_table = smu->smu_table.clocks_table; in smu_v13_0_4_get_dpm_freq_by_index() local
419 if (!clk_table || clk_type >= SMU_CLK_COUNT) in smu_v13_0_4_get_dpm_freq_by_index()
424 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) in smu_v13_0_4_get_dpm_freq_by_index()
426 *freq = clk_table->SocClocks[dpm_level]; in smu_v13_0_4_get_dpm_freq_by_index()
429 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in smu_v13_0_4_get_dpm_freq_by_index()
431 *freq = clk_table->VClocks[dpm_level]; in smu_v13_0_4_get_dpm_freq_by_index()
434 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in smu_v13_0_4_get_dpm_freq_by_index()
436 *freq = clk_table->DClocks[dpm_level]; in smu_v13_0_4_get_dpm_freq_by_index()
440 if (dpm_level >= clk_table->NumDfPstatesEnabled) in smu_v13_0_4_get_dpm_freq_by_index()
442 *freq = clk_table in smu_v13_0_4_get_dpm_freq_by_index()
460 DpmClocks_t *clk_table = smu->smu_table.clocks_table; smu_v13_0_4_get_dpm_level_count() local
737 DpmClocks_t *clk_table = smu->smu_table.clocks_table; smu_v13_0_4_get_dpm_ultimate_freq() local
1087 DpmClocks_t *clk_table = smu->smu_table.clocks_table; smu_v13_0_4_set_fine_grain_gfx_freq_parameters() local
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega10_processpptables.c571 phm_ppt_v1_clock_voltage_dependency_table *clk_table; in get_socclk_voltage_dependency_table() local
576 clk_table = kzalloc(struct_size(clk_table, entries, clk_dep_table->ucNumEntries), in get_socclk_voltage_dependency_table()
578 if (!clk_table) in get_socclk_voltage_dependency_table()
581 clk_table->count = (uint32_t)clk_dep_table->ucNumEntries; in get_socclk_voltage_dependency_table()
584 clk_table->entries[i].vddInd = in get_socclk_voltage_dependency_table()
586 clk_table->entries[i].clk = in get_socclk_voltage_dependency_table()
590 *pp_vega10_clk_dep_table = clk_table; in get_socclk_voltage_dependency_table()
637 *clk_table; in get_gfxclk_voltage_dependency_table() local
643 clk_table in get_gfxclk_voltage_dependency_table()
700 *clk_table; get_pix_clk_voltage_dependency_table() local
733 *clk_table; get_dcefclk_voltage_dependency_table() local
845 get_valid_clk( struct pp_hwmgr *hwmgr, struct phm_clock_array **clk_table, const phm_ppt_v1_clock_voltage_dependency_table *clk_volt_pp_table) get_valid_clk() argument
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
H A Ddcn30_clk_mgr.c97 entry_i += sizeof(clk_mgr->base.bw_params->clk_table.entries[0]); in dcn3_init_single_clock()
133 &clk_mgr_base->bw_params->clk_table.entries[0].dcfclk_mhz, in dcn3_init_clocks()
139 &clk_mgr_base->bw_params->clk_table.entries[0].dtbclk_mhz, in dcn3_init_clocks()
144 &clk_mgr_base->bw_params->clk_table.entries[0].socclk_mhz, in dcn3_init_clocks()
150 &clk_mgr_base->bw_params->clk_table.entries[0].dispclk_mhz, in dcn3_init_clocks()
155 &clk_mgr_base->bw_params->clk_table.entries[0].dppclk_mhz, in dcn3_init_clocks()
160 &clk_mgr_base->bw_params->clk_table.entries[0].phyclk_mhz, in dcn3_init_clocks()
270 clk_mgr_base->bw_params->clk_table.entries[clk_mgr_base->bw_params->clk_table.num_entries - 1].memclk_mhz); in dcn3_update_clocks()
368 clk_mgr_base->bw_params->clk_table in dcn3_set_hard_min_memclk()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega10_processpptables.c575 phm_ppt_v1_clock_voltage_dependency_table *clk_table; in get_socclk_voltage_dependency_table() local
584 clk_table = kzalloc(table_size, GFP_KERNEL); in get_socclk_voltage_dependency_table()
586 if (!clk_table) in get_socclk_voltage_dependency_table()
589 clk_table->count = (uint32_t)clk_dep_table->ucNumEntries; in get_socclk_voltage_dependency_table()
592 clk_table->entries[i].vddInd = in get_socclk_voltage_dependency_table()
594 clk_table->entries[i].clk = in get_socclk_voltage_dependency_table()
598 *pp_vega10_clk_dep_table = clk_table; in get_socclk_voltage_dependency_table()
649 *clk_table; in get_gfxclk_voltage_dependency_table() local
659 clk_table = kzalloc(table_size, GFP_KERNEL); in get_gfxclk_voltage_dependency_table()
661 if (!clk_table) in get_gfxclk_voltage_dependency_table()
716 *clk_table; get_pix_clk_voltage_dependency_table() local
753 *clk_table; get_dcefclk_voltage_dependency_table() local
873 get_valid_clk( struct pp_hwmgr *hwmgr, struct phm_clock_array **clk_table, const phm_ppt_v1_clock_voltage_dependency_table *clk_volt_pp_table) get_valid_clk() argument
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
H A Ddcn316_clk_mgr.c254 .clk_table = {
361 bw_params->clk_table.entries[i - 1].dcfclk_mhz + 1; in dcn316_build_watermark_ranges()
364 bw_params->clk_table.entries[i].dcfclk_mhz; in dcn316_build_watermark_ranges()
500 bw_params->clk_table.num_entries = j + 1; in dcn316_clk_mgr_helper_populate_bw_params()
511 for (i = 0; i < bw_params->clk_table.num_entries; i++, j--) { in dcn316_clk_mgr_helper_populate_bw_params()
514 bw_params->clk_table.entries[i].fclk_mhz = clock_table->DfPstateTable[j].FClk; in dcn316_clk_mgr_helper_populate_bw_params()
515 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[j].MemClk; in dcn316_clk_mgr_helper_populate_bw_params()
516 bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[j].Voltage; in dcn316_clk_mgr_helper_populate_bw_params()
519 bw_params->clk_table.entries[i].wck_ratio = 2; in dcn316_clk_mgr_helper_populate_bw_params()
522 bw_params->clk_table in dcn316_clk_mgr_helper_populate_bw_params()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
H A Ddcn30_clk_mgr.c103 entry_i += sizeof(clk_mgr->base.bw_params->clk_table.entries[0]); in dcn3_init_single_clock()
113 uint16_t min_uclk_mhz = clk_mgr->base.bw_params->clk_table.entries[0].memclk_mhz; in dcn3_build_wm_range_table()
175 &clk_mgr_base->bw_params->clk_table.entries[0].dcfclk_mhz, in dcn3_init_clocks()
180 &clk_mgr_base->bw_params->clk_table.entries[0].dtbclk_mhz, in dcn3_init_clocks()
187 &clk_mgr_base->bw_params->clk_table.entries[0].dispclk_mhz, in dcn3_init_clocks()
192 &clk_mgr_base->bw_params->clk_table.entries[0].dppclk_mhz, in dcn3_init_clocks()
197 &clk_mgr_base->bw_params->clk_table.entries[0].phyclk_mhz, in dcn3_init_clocks()
294 clk_mgr_base->bw_params->clk_table.entries[clk_mgr_base->bw_params->clk_table.num_entries - 1].memclk_mhz); in dcn3_update_clocks()
390 clk_mgr_base->bw_params->clk_table in dcn3_set_hard_min_memclk()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn301/
H A Ddcn301_fpu.c327 struct clk_limit_table *clk_table = &bw_params->clk_table; in dcn301_update_bw_bounding_box() local
340 ASSERT(clk_table->num_entries); in dcn301_update_bw_bounding_box()
341 for (i = 0; i < clk_table->num_entries; i++) { in dcn301_update_bw_bounding_box()
344 if ((unsigned int) dcn3_01_soc.clock_limits[j].dcfclk_mhz <= clk_table->entries[i].dcfclk_mhz) { in dcn301_update_bw_bounding_box()
351 s[i].dcfclk_mhz = clk_table->entries[i].dcfclk_mhz; in dcn301_update_bw_bounding_box()
352 s[i].fabricclk_mhz = clk_table->entries[i].fclk_mhz; in dcn301_update_bw_bounding_box()
353 s[i].socclk_mhz = clk_table->entries[i].socclk_mhz; in dcn301_update_bw_bounding_box()
354 s[i].dram_speed_mts = clk_table->entries[i].memclk_mhz * 2; in dcn301_update_bw_bounding_box()
367 if (clk_table in dcn301_update_bw_bounding_box()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddcn32_fpu.c181 uint16_t min_uclk_mhz = clk_mgr->base.bw_params->clk_table.entries[0].memclk_mhz; in dcn32_build_wm_range_table_fpu()
182 uint16_t min_dcfclk_mhz = clk_mgr->base.bw_params->clk_table.entries[0].dcfclk_mhz; in dcn32_build_wm_range_table_fpu()
192 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.min_dcfclk = clk_mgr->base.bw_params->clk_table.entries[0].dcfclk_mhz; in dcn32_build_wm_range_table_fpu()
194 if (clk_mgr->base.bw_params->clk_table.entries[2].memclk_mhz) in dcn32_build_wm_range_table_fpu()
195 setb_min_uclk_mhz = clk_mgr->base.bw_params->clk_table.entries[2].memclk_mhz; in dcn32_build_wm_range_table_fpu()
233 clk_mgr->base.bw_params->dummy_pstate_table[0].dram_speed_mts = clk_mgr->base.bw_params->clk_table.entries[0].memclk_mhz * 16; in dcn32_build_wm_range_table_fpu()
235 clk_mgr->base.bw_params->dummy_pstate_table[1].dram_speed_mts = clk_mgr->base.bw_params->clk_table.entries[1].memclk_mhz * 16; in dcn32_build_wm_range_table_fpu()
237 clk_mgr->base.bw_params->dummy_pstate_table[2].dram_speed_mts = clk_mgr->base.bw_params->clk_table.entries[2].memclk_mhz * 16; in dcn32_build_wm_range_table_fpu()
239 clk_mgr->base.bw_params->dummy_pstate_table[3].dram_speed_mts = clk_mgr->base.bw_params->clk_table.entries[3].memclk_mhz * 16; in dcn32_build_wm_range_table_fpu()
2112 dcfclk = dc->clk_mgr->bw_params->clk_table in dcn32_calculate_wm_and_dlg_fpu()
[all...]
/kernel/linux/linux-5.10/drivers/clk/hisilicon/
H A Dclk.c31 struct clk **clk_table; in hisi_clk_alloc() local
45 clk_table = devm_kmalloc_array(&pdev->dev, nr_clks, in hisi_clk_alloc()
46 sizeof(*clk_table), in hisi_clk_alloc()
48 if (!clk_table) in hisi_clk_alloc()
51 clk_data->clk_data.clks = clk_table; in hisi_clk_alloc()
62 struct clk **clk_table; in hisi_clk_init() local
76 clk_table = kcalloc(nr_clks, sizeof(*clk_table), GFP_KERNEL); in hisi_clk_init()
77 if (!clk_table) in hisi_clk_init()
80 clk_data->clk_data.clks = clk_table; in hisi_clk_init()
[all...]

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