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Searched refs:cfg1 (Results 1 - 25 of 86) sorted by relevance

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/kernel/linux/linux-5.10/arch/loongarch/mm/
H A Dcache.c93 unsigned int cfg1; \
95 cfg1 = read_cpucfg(LOONGARCH_CPUCFG17 + leaf); \
106 cdesc->ways = ((cfg1 & CPUCFG_CACHE_WAYS_M) >> CPUCFG_CACHE_WAYS) + 1; \
107 cdesc->sets = 1 << ((cfg1 & CPUCFG_CACHE_SETS_M) >> CPUCFG_CACHE_SETS); \
108 cdesc->linesz = 1 << ((cfg1 & CPUCFG_CACHE_LSIZE_M) >> CPUCFG_CACHE_LSIZE); \
/kernel/linux/linux-6.6/arch/loongarch/mm/
H A Dcache.c96 unsigned int cfg1; \
98 cfg1 = read_cpucfg(LOONGARCH_CPUCFG17 + leaf); \
109 cdesc->ways = ((cfg1 & CPUCFG_CACHE_WAYS_M) >> CPUCFG_CACHE_WAYS) + 1; \
110 cdesc->sets = 1 << ((cfg1 & CPUCFG_CACHE_SETS_M) >> CPUCFG_CACHE_SETS); \
111 cdesc->linesz = 1 << ((cfg1 & CPUCFG_CACHE_LSIZE_M) >> CPUCFG_CACHE_LSIZE); \
/kernel/linux/linux-5.10/drivers/gpu/drm/exynos/
H A Dexynos_drm_fimc.c421 u32 cfg1, cfg2; in fimc_src_set_transf() local
425 cfg1 = fimc_read(ctx, EXYNOS_MSCTRL); in fimc_src_set_transf()
426 cfg1 &= ~(EXYNOS_MSCTRL_FLIP_X_MIRROR | in fimc_src_set_transf()
435 cfg1 |= EXYNOS_MSCTRL_FLIP_X_MIRROR; in fimc_src_set_transf()
437 cfg1 |= EXYNOS_MSCTRL_FLIP_Y_MIRROR; in fimc_src_set_transf()
442 cfg1 |= EXYNOS_MSCTRL_FLIP_X_MIRROR; in fimc_src_set_transf()
444 cfg1 |= EXYNOS_MSCTRL_FLIP_Y_MIRROR; in fimc_src_set_transf()
447 cfg1 |= (EXYNOS_MSCTRL_FLIP_X_MIRROR | in fimc_src_set_transf()
450 cfg1 &= ~EXYNOS_MSCTRL_FLIP_X_MIRROR; in fimc_src_set_transf()
452 cfg1 in fimc_src_set_transf()
1013 u32 cfg0, cfg1; fimc_start() local
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/kernel/linux/linux-6.6/drivers/gpu/drm/exynos/
H A Dexynos_drm_fimc.c419 u32 cfg1, cfg2; in fimc_src_set_transf() local
423 cfg1 = fimc_read(ctx, EXYNOS_MSCTRL); in fimc_src_set_transf()
424 cfg1 &= ~(EXYNOS_MSCTRL_FLIP_X_MIRROR | in fimc_src_set_transf()
433 cfg1 |= EXYNOS_MSCTRL_FLIP_X_MIRROR; in fimc_src_set_transf()
435 cfg1 |= EXYNOS_MSCTRL_FLIP_Y_MIRROR; in fimc_src_set_transf()
440 cfg1 |= EXYNOS_MSCTRL_FLIP_X_MIRROR; in fimc_src_set_transf()
442 cfg1 |= EXYNOS_MSCTRL_FLIP_Y_MIRROR; in fimc_src_set_transf()
445 cfg1 |= (EXYNOS_MSCTRL_FLIP_X_MIRROR | in fimc_src_set_transf()
448 cfg1 &= ~EXYNOS_MSCTRL_FLIP_X_MIRROR; in fimc_src_set_transf()
450 cfg1 in fimc_src_set_transf()
1011 u32 cfg0, cfg1; fimc_start() local
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/kernel/linux/linux-5.10/drivers/staging/comedi/drivers/
H A Dni_at_ao.c108 unsigned short cfg1; member
120 devpriv->cfg1 |= ATAO_CFG1_GRP2WR; in atao_select_reg_group()
122 devpriv->cfg1 &= ~ATAO_CFG1_GRP2WR; in atao_select_reg_group()
123 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG); in atao_select_reg_group()
271 devpriv->cfg1 = 0; in atao_reset()
272 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG); in atao_reset()
/kernel/linux/linux-6.6/drivers/comedi/drivers/
H A Dni_at_ao.c106 unsigned short cfg1; member
118 devpriv->cfg1 |= ATAO_CFG1_GRP2WR; in atao_select_reg_group()
120 devpriv->cfg1 &= ~ATAO_CFG1_GRP2WR; in atao_select_reg_group()
121 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG); in atao_select_reg_group()
269 devpriv->cfg1 = 0; in atao_reset()
270 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG); in atao_reset()
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/dispnv04/
H A Darb.c202 uint32_t cfg1 = nvif_rd32(device, NV04_PFB_CFG1); in nv04_update_arb() local
224 sim_data.mem_latency = cfg1 & 0xf; in nv04_update_arb()
225 sim_data.mem_page_miss = ((cfg1 >> 4) & 0xf) + ((cfg1 >> 31) & 0x1); in nv04_update_arb()
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/dispnv04/
H A Darb.c202 uint32_t cfg1 = nvif_rd32(device, NV04_PFB_CFG1); in nv04_update_arb() local
225 sim_data.mem_latency = cfg1 & 0xf; in nv04_update_arb()
226 sim_data.mem_page_miss = ((cfg1 >> 4) & 0xf) + ((cfg1 >> 31) & 0x1); in nv04_update_arb()
/kernel/linux/linux-5.10/drivers/media/platform/atmel/
H A Datmel-isi.c361 u32 ctrl, cfg1; in start_dma() local
363 cfg1 = isi_readl(isi, ISI_CFG1); in start_dma()
388 cfg1 &= ~ISI_CFG1_FRATE_DIV_MASK; in start_dma()
390 cfg1 |= isi->pdata.frate | ISI_CFG1_DISCR; in start_dma()
399 isi_writel(isi, ISI_CFG1, cfg1); in start_dma()
788 u32 cfg1 = 0; in isi_camera_set_bus_param() local
792 cfg1 |= ISI_CFG1_HSYNC_POL_ACTIVE_LOW; in isi_camera_set_bus_param()
794 cfg1 |= ISI_CFG1_VSYNC_POL_ACTIVE_LOW; in isi_camera_set_bus_param()
796 cfg1 |= ISI_CFG1_PIXCLK_POL_ACTIVE_FALLING; in isi_camera_set_bus_param()
798 cfg1 | in isi_camera_set_bus_param()
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/kernel/linux/linux-6.6/drivers/media/platform/atmel/
H A Datmel-isi.c360 u32 ctrl, cfg1; in start_dma() local
362 cfg1 = isi_readl(isi, ISI_CFG1); in start_dma()
387 cfg1 &= ~ISI_CFG1_FRATE_DIV_MASK; in start_dma()
389 cfg1 |= isi->pdata.frate | ISI_CFG1_DISCR; in start_dma()
398 isi_writel(isi, ISI_CFG1, cfg1); in start_dma()
792 u32 cfg1 = 0; in isi_camera_set_bus_param() local
797 cfg1 |= ISI_CFG1_HSYNC_POL_ACTIVE_LOW; in isi_camera_set_bus_param()
799 cfg1 |= ISI_CFG1_VSYNC_POL_ACTIVE_LOW; in isi_camera_set_bus_param()
801 cfg1 |= ISI_CFG1_PIXCLK_POL_ACTIVE_FALLING; in isi_camera_set_bus_param()
803 cfg1 | in isi_camera_set_bus_param()
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/kernel/linux/linux-5.10/drivers/clk/zte/
H A Dclk-zx296702.c53 { .rate = 700000000, .cfg0 = 0x800405d1, .cfg1 = 0x04555555 },
54 { .rate = 800000000, .cfg0 = 0x80040691, .cfg1 = 0x04aaaaaa },
55 { .rate = 900000000, .cfg0 = 0x80040791, .cfg1 = 0x04000000 },
56 { .rate = 1000000000, .cfg0 = 0x80040851, .cfg1 = 0x04555555 },
57 { .rate = 1100000000, .cfg0 = 0x80040911, .cfg1 = 0x04aaaaaa },
58 { .rate = 1200000000, .cfg0 = 0x80040a11, .cfg1 = 0x04000000 },
H A Dclk.h17 u32 cfg1; member
34 .cfg1 = _cfg1, \
/kernel/linux/linux-5.10/drivers/iio/adc/
H A Dimx7d_adc.c233 u32 cfg1 = 0; in imx7d_adc_channel_set() local
240 cfg1 |= (IMX7D_REG_ADC_CH_CFG1_CHANNEL_EN | in imx7d_adc_channel_set()
250 cfg1 |= IMX7D_REG_ADC_CH_CFG1_CHANNEL_SEL(channel); in imx7d_adc_channel_set()
267 writel(cfg1, info->regs + IMX7D_EACH_CHANNEL_REG_OFFSET * channel); in imx7d_adc_channel_set()
/kernel/linux/linux-5.10/drivers/net/wireless/mediatek/mt76/mt76x2/
H A Dphy.c187 u32 cfg0, cfg1; in mt76x2_configure_tx_delay() local
191 cfg1 = 0x00011414; in mt76x2_configure_tx_delay()
194 cfg1 = 0x00021414; in mt76x2_configure_tx_delay()
197 mt76_wr(dev, MT_TX_SW_CFG1, cfg1); in mt76x2_configure_tx_delay()
/kernel/linux/linux-6.6/drivers/net/wireless/mediatek/mt76/mt76x2/
H A Dphy.c187 u32 cfg0, cfg1; in mt76x2_configure_tx_delay() local
191 cfg1 = 0x00011414; in mt76x2_configure_tx_delay()
194 cfg1 = 0x00021414; in mt76x2_configure_tx_delay()
197 mt76_wr(dev, MT_TX_SW_CFG1, cfg1); in mt76x2_configure_tx_delay()
/kernel/linux/linux-6.6/drivers/iio/adc/
H A Dimx7d_adc.c236 u32 cfg1 = 0; in imx7d_adc_channel_set() local
243 cfg1 |= (IMX7D_REG_ADC_CH_CFG1_CHANNEL_EN | in imx7d_adc_channel_set()
253 cfg1 |= IMX7D_REG_ADC_CH_CFG1_CHANNEL_SEL(channel); in imx7d_adc_channel_set()
270 writel(cfg1, info->regs + IMX7D_EACH_CHANNEL_REG_OFFSET * channel); in imx7d_adc_channel_set()
/kernel/linux/linux-5.10/drivers/soc/qcom/
H A Dqcom-geni-se.c398 u32 cfg0, cfg1, cfg[NUM_PACKING_VECTORS] = {0}; in geni_se_config_packing() local
427 cfg1 = cfg[2] | (cfg[3] << PACKING_VECTOR_SHIFT); in geni_se_config_packing()
431 writel_relaxed(cfg1, se->base + SE_GENI_TX_PACKING_CFG1); in geni_se_config_packing()
435 writel_relaxed(cfg1, se->base + SE_GENI_RX_PACKING_CFG1); in geni_se_config_packing()
/kernel/linux/linux-6.6/drivers/soc/qcom/
H A Dqcom-geni-se.c434 u32 cfg0, cfg1, cfg[NUM_PACKING_VECTORS] = {0}; in geni_se_config_packing() local
463 cfg1 = cfg[2] | (cfg[3] << PACKING_VECTOR_SHIFT); in geni_se_config_packing()
467 writel_relaxed(cfg1, se->base + SE_GENI_TX_PACKING_CFG1); in geni_se_config_packing()
471 writel_relaxed(cfg1, se->base + SE_GENI_RX_PACKING_CFG1); in geni_se_config_packing()
/kernel/linux/linux-6.6/drivers/perf/
H A Dfsl_imx9_ddr_perf.c364 static void ddr_perf_monitor_config(struct ddr_pmu *pmu, int cfg, int cfg1, int cfg2) in ddr_perf_monitor_config() argument
395 pmcfg2 |= FIELD_PREP(PMCFG2_ID, cfg1); in ddr_perf_monitor_config()
468 int cfg1 = event->attr.config1; in ddr_perf_event_add() local
483 ddr_perf_monitor_config(pmu, cfg, cfg1, cfg2); in ddr_perf_event_add()
/kernel/linux/linux-6.6/drivers/phy/qualcomm/
H A Dphy-qcom-edp.c457 u8 cfg1; in qcom_edp_phy_power_on() local
546 cfg1 = 0x1; in qcom_edp_phy_power_on()
552 cfg1 = 0x3; in qcom_edp_phy_power_on()
558 cfg1 = 0xf; in qcom_edp_phy_power_on()
565 writel(cfg1, edp->edp + DP_PHY_CFG_1); in qcom_edp_phy_power_on()
/kernel/linux/linux-5.10/arch/sparc/include/asm/
H A Dsbi.h21 /* 0x0014 */ u32 cfg1; /* Slot1 config reg */ member
/kernel/linux/linux-6.6/arch/sparc/include/asm/
H A Dsbi.h21 /* 0x0014 */ u32 cfg1; /* Slot1 config reg */ member
/kernel/linux/linux-6.6/drivers/infiniband/hw/erdma/
H A Derdma_hw.h229 /* create_cq cfg1 */
243 u32 cfg1; member
255 /* regmr cfg1 */
269 u32 cfg1; member
309 /* create qp cfg1 */
332 u32 cfg1; member
/kernel/linux/linux-5.10/drivers/net/ethernet/agere/
H A Det131x.c819 &macregs->cfg1); in et1310_config_mac_regs1()
861 writel(0, &macregs->cfg1); in et1310_config_mac_regs1()
869 u32 cfg1; in et1310_config_mac_regs2() local
875 cfg1 = readl(&mac->cfg1); in et1310_config_mac_regs2()
889 cfg1 |= ET_MAC_CFG1_RX_ENABLE | ET_MAC_CFG1_TX_ENABLE | in et1310_config_mac_regs2()
892 cfg1 &= ~(ET_MAC_CFG1_LOOPBACK | ET_MAC_CFG1_RX_FLOW); in et1310_config_mac_regs2()
894 cfg1 |= ET_MAC_CFG1_RX_FLOW; in et1310_config_mac_regs2()
895 writel(cfg1, &mac->cfg1); in et1310_config_mac_regs2()
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/kernel/linux/linux-6.6/drivers/net/ethernet/agere/
H A Det131x.c819 &macregs->cfg1); in et1310_config_mac_regs1()
861 writel(0, &macregs->cfg1); in et1310_config_mac_regs1()
869 u32 cfg1; in et1310_config_mac_regs2() local
875 cfg1 = readl(&mac->cfg1); in et1310_config_mac_regs2()
889 cfg1 |= ET_MAC_CFG1_RX_ENABLE | ET_MAC_CFG1_TX_ENABLE | in et1310_config_mac_regs2()
892 cfg1 &= ~(ET_MAC_CFG1_LOOPBACK | ET_MAC_CFG1_RX_FLOW); in et1310_config_mac_regs2()
894 cfg1 |= ET_MAC_CFG1_RX_FLOW; in et1310_config_mac_regs2()
895 writel(cfg1, &mac->cfg1); in et1310_config_mac_regs2()
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