arm_pll_bypass_sels (reference) in projects: kernel - OpenGrok search results

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Searched refs:arm_pll_bypass_sels (Results 1 - 8 of 8) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/imx/
H A D	clk-imx8mp.c	`29 static const char * const arm_pll_bypass_sels[] = {"arm_pll", "arm_pll_ref_sel", }; variable 480 hws[IMX8MP_ARM_PLL_BYPASS] = imx_clk_hw_mux_flags("arm_pll_bypass", anatop_base + 0x84, 28, 1, arm_pll_bypass_sels, ARRAY_SIZE(arm_pll_bypass_sels), CLK_SET_RATE_PARENT); in imx8mp_clocks_probe()`
H A D	clk-imx8mq.c	`29 static const char * const arm_pll_bypass_sels[] = {"arm_pll", "arm_pll_ref_sel", }; variable 332 hws[IMX8MQ_ARM_PLL_BYPASS] = imx_clk_hw_mux_flags("arm_pll_bypass", base + 0x28, 14, 1, arm_pll_bypass_sels, ARRAY_SIZE(arm_pll_bypass_sels), CLK_SET_RATE_PARENT); in imx8mq_clocks_probe()`
H A D	clk-imx8mm.c	`35 static const char *arm_pll_bypass_sels[] = {"arm_pll", "arm_pll_ref_sel", }; variable 350 hws[IMX8MM_ARM_PLL_BYPASS] = imx_clk_hw_mux_flags("arm_pll_bypass", base + 0x84, 28, 1, arm_pll_bypass_sels, ARRAY_SIZE(arm_pll_bypass_sels), CLK_SET_RATE_PARENT); in imx8mm_clocks_probe()`
H A D	clk-imx8mn.c	`34 static const char * const arm_pll_bypass_sels[] = {"arm_pll", "arm_pll_ref_sel", }; variable 345 hws[IMX8MN_ARM_PLL_BYPASS] = imx_clk_hw_mux_flags("arm_pll_bypass", base + 0x84, 28, 1, arm_pll_bypass_sels, ARRAY_SIZE(arm_pll_bypass_sels), CLK_SET_RATE_PARENT); in imx8mn_clocks_probe()`
/kernel/linux/linux-6.6/drivers/clk/imx/
H A D	clk-imx8mm.c	`35 static const char *arm_pll_bypass_sels[] = {"arm_pll", "arm_pll_ref_sel", }; variable 355 hws[IMX8MM_ARM_PLL_BYPASS] = imx_clk_hw_mux_flags("arm_pll_bypass", base + 0x84, 28, 1, arm_pll_bypass_sels, ARRAY_SIZE(arm_pll_bypass_sels), CLK_SET_RATE_PARENT); in imx8mm_clocks_probe()`
H A D	clk-imx8mq.c	`29 static const char * const arm_pll_bypass_sels[] = {"arm_pll", "arm_pll_ref_sel", }; variable 340 hws[IMX8MQ_ARM_PLL_BYPASS] = imx_clk_hw_mux_flags("arm_pll_bypass", base + 0x28, 14, 1, arm_pll_bypass_sels, ARRAY_SIZE(arm_pll_bypass_sels), CLK_SET_RATE_PARENT); in imx8mq_clocks_probe()`
H A D	clk-imx8mp.c	`30 static const char * const arm_pll_bypass_sels[] = {"arm_pll", "arm_pll_ref_sel", }; variable 469 hws[IMX8MP_ARM_PLL_BYPASS] = imx_clk_hw_mux_flags("arm_pll_bypass", anatop_base + 0x84, 28, 1, arm_pll_bypass_sels, ARRAY_SIZE(arm_pll_bypass_sels), CLK_SET_RATE_PARENT); in imx8mp_clocks_probe()`
H A D	clk-imx8mn.c	`34 static const char * const arm_pll_bypass_sels[] = {"arm_pll", "arm_pll_ref_sel", }; variable 377 hws[IMX8MN_ARM_PLL_BYPASS] = imx_clk_hw_mux_flags("arm_pll_bypass", base + 0x84, 28, 1, arm_pll_bypass_sels, ARRAY_SIZE(arm_pll_bypass_sels), CLK_SET_RATE_PARENT); in imx8mn_clocks_probe()`

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