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Searched refs:PWM_DUTY_WIDTH (Results 1 - 2 of 2) sorted by relevance

/kernel/linux/linux-5.10/drivers/pwm/
H A Dpwm-tegra.c52 #define PWM_DUTY_WIDTH 8 macro
106 * per (1 << PWM_DUTY_WIDTH) cycles and make sure to round to the in tegra_pwm_config()
109 c *= (1 << PWM_DUTY_WIDTH); in tegra_pwm_config()
115 * min period = max clock limit >> PWM_DUTY_WIDTH in tegra_pwm_config()
121 * Compute the prescaler value for which (1 << PWM_DUTY_WIDTH) in tegra_pwm_config()
135 * Rate is multiplied with 2^PWM_DUTY_WIDTH so that it matches in tegra_pwm_config()
145 required_clk_rate = DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC << PWM_DUTY_WIDTH, in tegra_pwm_config()
156 rate = pc->clk_rate >> PWM_DUTY_WIDTH; in tegra_pwm_config()
277 (NSEC_PER_SEC / (pwm->soc->max_frequency >> PWM_DUTY_WIDTH)) + 1; in tegra_pwm_probe()
/kernel/linux/linux-6.6/drivers/pwm/
H A Dpwm-tegra.c55 #define PWM_DUTY_WIDTH 8 macro
108 * per (1 << PWM_DUTY_WIDTH) cycles and make sure to round to the in tegra_pwm_config()
111 c *= (1 << PWM_DUTY_WIDTH); in tegra_pwm_config()
117 * min period = max clock limit >> PWM_DUTY_WIDTH in tegra_pwm_config()
123 * Compute the prescaler value for which (1 << PWM_DUTY_WIDTH) in tegra_pwm_config()
137 * Rate is multiplied with 2^PWM_DUTY_WIDTH so that it matches in tegra_pwm_config()
147 required_clk_rate = DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC << PWM_DUTY_WIDTH, in tegra_pwm_config()
171 (u64)NSEC_PER_SEC << PWM_DUTY_WIDTH); in tegra_pwm_config()
321 (NSEC_PER_SEC / (pc->soc->max_frequency >> PWM_DUTY_WIDTH)) + 1; in tegra_pwm_probe()

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