| /kernel/linux/linux-5.10/drivers/gpu/drm/gma500/ |
| H A D | psb_intel_display.c | 219 /* The LVDS pin pair needs to be on before the DPLLs are enabled. in psb_intel_crtc_mode_set()
224 u32 lvds = REG_READ(LVDS); in psb_intel_crtc_mode_set()
244 REG_WRITE(LVDS, lvds); in psb_intel_crtc_mode_set()
245 REG_READ(LVDS); in psb_intel_crtc_mode_set()
316 is_lvds = (pipe == 1) && (REG_READ(LVDS) & LVDS_PORT_EN); in psb_intel_crtc_clock_get()
|
| H A D | cdv_intel_display.c | 369 * Now only single-channel LVDS is supported on CDV. If it is in cdv_intel_limit()
370 * incorrect, please add the dual-channel LVDS. in cdv_intel_limit()
632 * Based on the spec the low-end SKU has only CRT/LVDS. So it is in cdv_intel_crtc_mode_set()
706 /* the BPC will be 6 if it is 18-bit LVDS panel */ in cdv_intel_crtc_mode_set()
707 if ((REG_READ(LVDS) & LVDS_A3_POWER_MASK) == LVDS_A3_POWER_UP) in cdv_intel_crtc_mode_set()
733 /* The LVDS pin pair needs to be on before the DPLLs are enabled. in cdv_intel_crtc_mode_set()
738 u32 lvds = REG_READ(LVDS); in cdv_intel_crtc_mode_set()
757 REG_WRITE(LVDS, lvds); in cdv_intel_crtc_mode_set()
758 REG_READ(LVDS); in cdv_intel_crtc_mode_set()
857 is_lvds = (pipe == 1) && (REG_READ(LVDS) in cdv_intel_crtc_clock_get()
[all...] |
| H A D | psb_intel_lvds.c | 23 * LVDS I2C backlight control macros
83 * Set LVDS backlight level by I2C command
160 * Set LVDS backlight level either by I2C or PWM
169 dev_err(dev->dev, "NO LVDS backlight info\n"); in psb_intel_lvds_set_brightness()
251 /* XXX: We never power down the LVDS pairs. */ in psb_intel_lvds_encoder_dpms()
265 lvds_priv->saveLVDS = REG_READ(LVDS); in psb_intel_lvds_save()
318 REG_WRITE(LVDS, lvds_priv->saveLVDS); in psb_intel_lvds_restore()
378 /* PSB requires the LVDS is on pipe B, MRST has only one pipe anyway */ in psb_intel_lvds_mode_fixup()
380 pr_err("Can't support LVDS on pipe A\n"); in psb_intel_lvds_mode_fixup()
392 pr_err("Can't enable LVDS an in psb_intel_lvds_mode_fixup()
[all...] |
| H A D | oaktrail_device.c | 232 /* LVDS state */ in oaktrail_save_display_registers()
238 regs->psb.saveLVDS = PSB_RVDC32(LVDS); in oaktrail_save_display_registers()
362 PSB_WVDC32(regs->psb.saveLVDS, LVDS); /*port 61180h*/ in oaktrail_restore_display_registers()
|
| H A D | oaktrail_lvds.c | 78 /* XXX: We never power down the LVDS pairs. */ in oaktrail_lvds_dpms()
98 * The LVDS pin pair will already have been turned on in the in oaktrail_lvds_mode_set()
102 lvds_port = (REG_READ(LVDS) & in oaktrail_lvds_mode_set()
112 REG_WRITE(LVDS, lvds_port); in oaktrail_lvds_mode_set()
267 /* Then try the LVDS VBT mode */ in oaktrail_lvds_get_configuration_mode()
283 * oaktrail_lvds_init - setup LVDS connectors on this device
286 * Create the connector, register the LVDS DDC bus, and try to figure out what
287 * modes we can display on the LVDS panel (if present).
343 * LVDS discovery: in oaktrail_lvds_init()
346 * 3) check to see if LVDS i in oaktrail_lvds_init()
[all...] |
| H A D | cdv_device.c | 83 DRM_DEBUG_KMS("LVDS Panel PWM value is 0!\n"); in cdv_get_max_backlight()
282 regs->cdv.saveLVDS = REG_READ(LVDS); in cdv_save_display_registers()
350 REG_WRITE(LVDS, regs->cdv.saveLVDS); in cdv_restore_display_registers()
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/gma500/ |
| H A D | psb_intel_display.c | 225 /* The LVDS pin pair needs to be on before the DPLLs are enabled. in psb_intel_crtc_mode_set()
230 u32 lvds = REG_READ(LVDS); in psb_intel_crtc_mode_set()
250 REG_WRITE(LVDS, lvds); in psb_intel_crtc_mode_set()
251 REG_READ(LVDS); in psb_intel_crtc_mode_set()
322 is_lvds = (pipe == 1) && (REG_READ(LVDS) & LVDS_PORT_EN); in psb_intel_crtc_clock_get()
|
| H A D | cdv_intel_display.c | 370 * Now only single-channel LVDS is supported on CDV. If it is in cdv_intel_limit()
371 * incorrect, please add the dual-channel LVDS. in cdv_intel_limit()
635 * Based on the spec the low-end SKU has only CRT/LVDS. So it is in cdv_intel_crtc_mode_set()
703 /* the BPC will be 6 if it is 18-bit LVDS panel */ in cdv_intel_crtc_mode_set()
704 if ((REG_READ(LVDS) & LVDS_A3_POWER_MASK) == LVDS_A3_POWER_UP) in cdv_intel_crtc_mode_set()
730 /* The LVDS pin pair needs to be on before the DPLLs are enabled. in cdv_intel_crtc_mode_set()
735 u32 lvds = REG_READ(LVDS); in cdv_intel_crtc_mode_set()
754 REG_WRITE(LVDS, lvds); in cdv_intel_crtc_mode_set()
755 REG_READ(LVDS); in cdv_intel_crtc_mode_set()
854 is_lvds = (pipe == 1) && (REG_READ(LVDS) in cdv_intel_crtc_clock_get()
[all...] |
| H A D | psb_intel_lvds.c | 25 * LVDS I2C backlight control macros
84 * Set LVDS backlight level by I2C command
159 * Set LVDS backlight level either by I2C or PWM
168 dev_err(dev->dev, "NO LVDS backlight info\n"); in psb_intel_lvds_set_brightness()
250 /* XXX: We never power down the LVDS pairs. */ in psb_intel_lvds_encoder_dpms()
263 lvds_priv->saveLVDS = REG_READ(LVDS); in psb_intel_lvds_save()
316 REG_WRITE(LVDS, lvds_priv->saveLVDS); in psb_intel_lvds_restore()
376 /* PSB requires the LVDS is on pipe B, MRST has only one pipe anyway */ in psb_intel_lvds_mode_fixup()
378 pr_err("Can't support LVDS on pipe A\n"); in psb_intel_lvds_mode_fixup()
390 pr_err("Can't enable LVDS an in psb_intel_lvds_mode_fixup()
[all...] |
| H A D | oaktrail_device.c | 174 /* LVDS state */ in oaktrail_save_display_registers()
180 regs->psb.saveLVDS = PSB_RVDC32(LVDS); in oaktrail_save_display_registers()
304 PSB_WVDC32(regs->psb.saveLVDS, LVDS); /*port 61180h*/ in oaktrail_restore_display_registers()
|
| H A D | oaktrail_lvds.c | 79 /* XXX: We never power down the LVDS pairs. */ in oaktrail_lvds_dpms()
99 * The LVDS pin pair will already have been turned on in the in oaktrail_lvds_mode_set()
103 lvds_port = (REG_READ(LVDS) & in oaktrail_lvds_mode_set()
113 REG_WRITE(LVDS, lvds_port); in oaktrail_lvds_mode_set()
269 /* Then try the LVDS VBT mode */ in oaktrail_lvds_get_configuration_mode()
285 * oaktrail_lvds_init - setup LVDS connectors on this device
289 * Create the connector, register the LVDS DDC bus, and try to figure out what
290 * modes we can display on the LVDS panel (if present).
352 * LVDS discovery: in oaktrail_lvds_init()
355 * 3) check to see if LVDS i in oaktrail_lvds_init()
[all...] |
| H A D | cdv_device.c | 79 DRM_DEBUG_KMS("LVDS Panel PWM value is 0!\n"); in cdv_get_max_backlight()
257 regs->cdv.saveLVDS = REG_READ(LVDS); in cdv_save_display_registers()
329 REG_WRITE(LVDS, regs->cdv.saveLVDS); in cdv_restore_display_registers()
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/ |
| H A D | intel_lvds_regs.h | 11 /* LVDS port control */
12 #define LVDS _MMIO(0x61180) macro
14 * Enables the LVDS port. This bit must be set before DPLLs are enabled, as
15 * the DPLL semantics change when the LVDS is assigned to that pipe.
18 /* Selects pipe B for LVDS data. Must be set on pre-965. */
23 /* LVDS dithering flag on 965/g4x platform */
25 /* LVDS sync polarity flags. Set to invert (i.e. negative) */
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/inc/ |
| H A D | smu7.h | 180 LVDS, enumerator
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
| H A D | sornv50.c | 75 case 0: state->proto = LVDS; state->link = 1; break; in nv50_sor_state()
|
| H A D | sorgv100.c | 66 case 0: state->proto = LVDS; state->link = 1; break; in gv100_sor_state()
|
| H A D | ior.h | 29 LVDS, enumerator
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
| H A D | smu7.h | 161 LVDS, enumerator
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/powerplay/inc/ |
| H A D | smu7.h | 178 LVDS, enumerator
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/radeon/ |
| H A D | smu7.h | 161 LVDS, enumerator
|
| /kernel/linux/linux-5.10/drivers/video/fbdev/nvidia/ |
| H A D | nv_setup.c | 637 par->LVDS = 0; in NVCommonSetup()
641 par->LVDS = 1; in NVCommonSetup()
642 printk("nvidiafb: Panel is %s\n", par->LVDS ? "LVDS" : "TMDS"); in NVCommonSetup()
|
| H A D | nv_type.h | 135 int LVDS; member
|
| /kernel/linux/linux-6.6/drivers/video/fbdev/nvidia/ |
| H A D | nv_setup.c | 634 par->LVDS = 0; in NVCommonSetup()
638 par->LVDS = 1; in NVCommonSetup()
639 printk("nvidiafb: Panel is %s\n", par->LVDS ? "LVDS" : "TMDS"); in NVCommonSetup()
|
| H A D | nv_type.h | 135 int LVDS; member
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
| H A D | ior.h | 30 LVDS, enumerator
|