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Searched refs:regBase (Results 1 - 16 of 16) sorted by relevance

/device/soc/hisilicon/common/platform/watchdog/
H A Dwatchdog_hi35xx.c40 volatile unsigned char *regBase; member
57 ctlValue = (unsigned int)OSAL_READL(hwdt->regBase + HIWDT_CTRL); in Hi35xxWatchdogGetStatus()
72 OSAL_WRITEL(HIWDT_UNLOCK_VAL, hwdt->regBase + HIWDT_LOCK); in Hi35xxWatchdogStart()
74 OSAL_WRITEL(0x00, hwdt->regBase + HIWDT_CTRL); in Hi35xxWatchdogStart()
76 OSAL_WRITEL(0x00, hwdt->regBase + HIWDT_INTCLR); in Hi35xxWatchdogStart()
78 OSAL_WRITEL(HIWDT_EN_RST_INTR, hwdt->regBase + HIWDT_CTRL); in Hi35xxWatchdogStart()
80 OSAL_WRITEL(0x00, hwdt->regBase + HIWDT_LOCK); in Hi35xxWatchdogStart()
95 OSAL_WRITEL(HIWDT_UNLOCK_VAL, hwdt->regBase + HIWDT_LOCK); in Hi35xxWatchdogStop()
97 OSAL_WRITEL(0x00, hwdt->regBase + HIWDT_CTRL); in Hi35xxWatchdogStop()
99 OSAL_WRITEL(0x00, hwdt->regBase in Hi35xxWatchdogStop()
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/device/soc/hisilicon/common/platform/i2s/
H A Di2s_aiao_hi35xx.c29 value = Hi35xxI2sRegRead(i2sCfg->regBase + I2S_AIAO_SWITCH_RX_BCLK); in GetI2sAiaoRxInfo()
31 value = Hi35xxI2sRegRead(i2sCfg->regBase + I2S_CRG_CFG0_00); in GetI2sAiaoRxInfo()
33 value = Hi35xxI2sRegRead(i2sCfg->regBase + I2S_CRG_CFG1_00); in GetI2sAiaoRxInfo()
35 value = Hi35xxI2sRegRead(i2sCfg->regBase + RX_IF_ATTR1); in GetI2sAiaoRxInfo()
37 value = Hi35xxI2sRegRead(i2sCfg->regBase + RX_INT_ENA); in GetI2sAiaoRxInfo()
39 value = Hi35xxI2sRegRead(i2sCfg->regBase + RX_DSP_CTRL); in GetI2sAiaoRxInfo()
41 value = Hi35xxI2sRegRead(i2sCfg->regBase + RX_BUFF_ASDDR); in GetI2sAiaoRxInfo()
43 value = Hi35xxI2sRegRead(i2sCfg->regBase + RX_BUFF_SIZE); in GetI2sAiaoRxInfo()
45 value = Hi35xxI2sRegRead(i2sCfg->regBase + RX_BUFF_WPTR); in GetI2sAiaoRxInfo()
47 value = Hi35xxI2sRegRead(i2sCfg->regBase in GetI2sAiaoRxInfo()
[all...]
H A Di2s_hi35xx.c37 {"I2S_AIAO_INT_ENA", PLATFORM_DUMPER_REGISTERL, (void *)(configInfo->regBase + I2S_AIAO_INT_ENA)}, in I2sDumperDump()
38 {"RX_IF_ATTR1", PLATFORM_DUMPER_REGISTERL, (void *)(configInfo->regBase + RX_IF_ATTR1)}, in I2sDumperDump()
39 {"RX_DSP_CTRL", PLATFORM_DUMPER_REGISTERL, (void *)(configInfo->regBase + RX_DSP_CTRL)}, in I2sDumperDump()
40 {"RX_BUFF_SIZE", PLATFORM_DUMPER_REGISTERL, (void *)(configInfo->regBase + RX_BUFF_SIZE)}, in I2sDumperDump()
41 {"RX_BUFF_WPTR", PLATFORM_DUMPER_REGISTERL, (void *)(configInfo->regBase + RX_BUFF_WPTR)}, in I2sDumperDump()
42 {"RX_BUFF_RPTR", PLATFORM_DUMPER_REGISTERL, (void *)(configInfo->regBase + RX_BUFF_RPTR)}, in I2sDumperDump()
43 {"RX_TRANS_SIZE", PLATFORM_DUMPER_REGISTERL, (void *)(configInfo->regBase + RX_TRANS_SIZE)}, in I2sDumperDump()
44 {"RX_INT_ENA", PLATFORM_DUMPER_REGISTERL, (void *)(configInfo->regBase + RX_INT_ENA)}, in I2sDumperDump()
45 {"RX_INT_STATUS", PLATFORM_DUMPER_REGISTERL, (void *)(configInfo->regBase + RX_INT_STATUS)}, in I2sDumperDump()
46 {"RX_INT_CLR", PLATFORM_DUMPER_REGISTERL, (void *)(configInfo->regBase in I2sDumperDump()
[all...]
H A Di2s_codec_hi35xx.c255 uint32_t value = Hi35xxI2sRegRead(i2sCfg->regBase + AUDIO_ANA_CTRL_0); in CodecAnaCtrl0Init()
266 value = Hi35xxI2sRegRead(i2sCfg->regBase + AUDIO_ANA_CTRL_0); in CodecAnaCtrl0Init()
282 uint32_t value = Hi35xxI2sRegRead(i2sCfg->regBase + AUDIO_ANA_CTRL_2); in CodecInnerInit()
287 value = Hi35xxI2sRegRead(i2sCfg->regBase + AUDIO_ANA_CTRL_3); in CodecInnerInit()
294 value = Hi35xxI2sRegRead(i2sCfg->regBase + AUDIO_ANA_CTRL_2); in CodecInnerInit()
299 value = Hi35xxI2sRegRead(i2sCfg->regBase + AUDIO_ANA_CTRL_0); in CodecInnerInit()
306 value = Hi35xxI2sRegRead(i2sCfg->regBase + AUDIO_ANA_CTRL_1); in CodecInnerInit()
311 value = Hi35xxI2sRegRead(i2sCfg->regBase + AUDIO_ANA_CTRL_2); in CodecInnerInit()
316 value = Hi35xxI2sRegRead(i2sCfg->regBase + AUDIO_ANA_CTRL_0); in CodecInnerInit()
321 value = Hi35xxI2sRegRead(i2sCfg->regBase in CodecInnerInit()
[all...]
H A Di2s_hi35xx.h118 volatile unsigned char *regBase; member
/device/soc/hisilicon/common/platform/i2c/
H A Di2c_hi35xx.c51 volatile unsigned char *regBase; member
85 {"HI35XX_I2Cx_GLB", PLATFORM_DUMPER_REGISTERL, (void *)(hi35xx->regBase + HI35XX_I2C_GLB)}, in I2cDumperAddDatas()
86 {"HI35XX_I2Cx_SCL_H", PLATFORM_DUMPER_REGISTERL, (void *)(hi35xx->regBase + HI35XX_I2C_SCL_H)}, in I2cDumperAddDatas()
87 {"HI35XX_I2Cx_SCL_L", PLATFORM_DUMPER_REGISTERL, (void *)(hi35xx->regBase + HI35XX_I2C_SCL_L)}, in I2cDumperAddDatas()
88 {"HI35XX_I2Cx_DATA1", PLATFORM_DUMPER_REGISTERL, (void *)(hi35xx->regBase + HI35XX_I2C_DATA1)}, in I2cDumperAddDatas()
89 {"HI35XX_I2C_TXF", PLATFORM_DUMPER_REGISTERL, (void *)(hi35xx->regBase + HI35XX_I2C_TXF)}, in I2cDumperAddDatas()
90 {"HI35XX_I2C_RXF", PLATFORM_DUMPER_REGISTERL, (void *)(hi35xx->regBase + HI35XX_I2C_RXF)}, in I2cDumperAddDatas()
91 {"HI35XX_I2C_CTRL2", PLATFORM_DUMPER_REGISTERL, (void *)(hi35xx->regBase + HI35XX_I2C_CTRL2)}, in I2cDumperAddDatas()
92 {"HI35XX_I2C_STAT", PLATFORM_DUMPER_REGISTERL, (void *)(hi35xx->regBase + HI35XX_I2C_STAT)}, in I2cDumperAddDatas()
93 {"HI35XX_I2C_INTR_RAW", PLATFORM_DUMPER_REGISTERL, (void *)(hi35xx->regBase in I2cDumperAddDatas()
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/device/soc/hisilicon/common/platform/timer/
H A Dtimer_hi35xx.c44 uint32_t value = TimerHi35xxRegRead(info->regBase + HI35XX_TIMERx_CONTROL); in TimerHi35xxEnable()
52 TimerHi35xxRegWrite(value, info->regBase + HI35XX_TIMERx_CONTROL); in TimerHi35xxEnable()
53 TimerHi35xxRegRead(info->regBase + HI35XX_TIMERx_CONTROL); in TimerHi35xxEnable()
61 uint32_t value = TimerHi35xxRegRead(info->regBase + HI35XX_TIMERx_CONTROL); in TimerHi35xxSetMode()
70 TimerHi35xxRegWrite(value, info->regBase + HI35XX_TIMERx_CONTROL); in TimerHi35xxSetMode()
78 uint32_t value = TimerHi35xxRegRead(info->regBase + HI35XX_TIMERx_CONTROL); in TimerHi35xxSetPre()
97 TimerHi35xxRegWrite(value, info->regBase + HI35XX_TIMERx_CONTROL); in TimerHi35xxSetPre()
98 TimerHi35xxRegRead(info->regBase + HI35XX_TIMERx_CONTROL); in TimerHi35xxSetPre()
106 uint32_t value = TimerHi35xxRegRead(info->regBase + HI35XX_TIMERx_CONTROL); in TimerHi35xxIntEnable()
114 TimerHi35xxRegWrite(value, info->regBase in TimerHi35xxIntEnable()
182 volatile uint8_t *regBase = TimerHi35xxScCtrlSet() local
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H A Dtimer_hi35xx.h43 volatile uint8_t *regBase; member
/device/soc/hisilicon/common/platform/gpio/
H A Dgpio_hi35xx.c51 volatile unsigned char *regBase; member
63 volatile unsigned char *regBase; member
114 {"PL061_GPIO_DIR", PLATFORM_DUMPER_REGISTERB, (void *)(PL061_GPIO_DIR(group->regBase))}, in GpioDumperDump()
115 {"PL061_GPIO_IS", PLATFORM_DUMPER_REGISTERB, (void *)(PL061_GPIO_IS(group->regBase))}, in GpioDumperDump()
116 {"PL061_GPIO_IBE", PLATFORM_DUMPER_REGISTERB, (void *)(PL061_GPIO_IBE(group->regBase))}, in GpioDumperDump()
117 {"PL061_GPIO_IEV", PLATFORM_DUMPER_REGISTERB, (void *)(PL061_GPIO_IEV(group->regBase))}, in GpioDumperDump()
118 {"PL061_GPIO_IE", PLATFORM_DUMPER_REGISTERB, (void *)(PL061_GPIO_IE(group->regBase))}, in GpioDumperDump()
119 {"PL061_GPIO_RIS", PLATFORM_DUMPER_REGISTERB, (void *)(PL061_GPIO_RIS(group->regBase))}, in GpioDumperDump()
120 {"PL061_GPIO_MIS", PLATFORM_DUMPER_REGISTERB, (void *)(PL061_GPIO_MIS(group->regBase))}, in GpioDumperDump()
121 {"PL061_GPIO_IC", PLATFORM_DUMPER_REGISTERB, (void *)(PL061_GPIO_IC(group->regBase))}, in GpioDumperDump()
[all...]
/device/soc/hisilicon/common/platform/adc/
H A Dadc_hi35xx.c32 volatile unsigned char *regBase; member
48 OSAL_WRITEL(0, hi35xx->regBase + HI35XX_ADC_INTR_EN); in Hi35xxAdcSetIrq()
63 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_ADC_ACCURACY); in Hi35xxAdcSetAccuracy()
72 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_ADC_START); in Hi35xxAdcSetGlitchSample()
73 val = OSAL_READL(hi35xx->regBase + HI35XX_ADC_START); in Hi35xxAdcSetGlitchSample()
89 OSAL_WRITEL(timeScan, hi35xx->regBase + HI35XX_ADC_START); in Hi35xxAdcSetTimeScan()
90 timeScan = OSAL_READL(hi35xx->regBase + HI35XX_ADC_START); in Hi35xxAdcSetTimeScan()
114 OSAL_WRITEL(val, hi35xx->regBase + HI35XX_ADC_CONFIG); in Hi35xxAdcConfig()
119 OSAL_WRITEL(1, hi35xx->regBase + HI35XX_ADC_START); in Hi35xxAdcStartScan()
124 OSAL_WRITEL(CONFIG_REG_RESET_VALUE, hi35xx->regBase in Hi35xxAdcReset()
[all...]
/device/soc/hisilicon/common/platform/spi/
H A Dspi_hi35xx.c39 volatile unsigned char *regBase; member
66 {"REG_SPI_CR0", PLATFORM_DUMPER_REGISTERL, (void *)(pl022->regBase + REG_SPI_CR0)}, in SpiDumperDump()
67 {"REG_SPI_CR1", PLATFORM_DUMPER_REGISTERL, (void *)(pl022->regBase + REG_SPI_CR1)}, in SpiDumperDump()
68 {"REG_SPI_DR", PLATFORM_DUMPER_REGISTERL, (void *)(pl022->regBase + REG_SPI_DR)}, in SpiDumperDump()
69 {"REG_SPI_SR", PLATFORM_DUMPER_REGISTERL, (void *)(pl022->regBase + REG_SPI_SR)}, in SpiDumperDump()
70 {"REG_SPI_CPSR", PLATFORM_DUMPER_REGISTERL, (void *)(pl022->regBase + REG_SPI_CPSR)}, in SpiDumperDump()
71 {"REG_SPI_IMSC", PLATFORM_DUMPER_REGISTERL, (void *)(pl022->regBase + REG_SPI_IMSC)}, in SpiDumperDump()
72 {"REG_SPI_RIS", PLATFORM_DUMPER_REGISTERL, (void *)(pl022->regBase + REG_SPI_RIS)}, in SpiDumperDump()
73 {"REG_SPI_MIS", PLATFORM_DUMPER_REGISTERL, (void *)(pl022->regBase + REG_SPI_MIS)}, in SpiDumperDump()
74 {"REG_SPI_ICR", PLATFORM_DUMPER_REGISTERL, (void *)(pl022->regBase in SpiDumperDump()
[all...]
/device/soc/hisilicon/common/platform/pin/
H A Dpin_hi35xx.c41 volatile unsigned char *regBase; member
83 {"PIN_REGISTER", PLATFORM_DUMPER_REGISTERL, (void *)(hi35xx->regBase + index * HI35XX_PIN_REG_SIZE)}, in PinDumperDump()
110 value = OSAL_READL(hi35xx->regBase + index * HI35XX_PIN_REG_SIZE); in Hi35xxPinSetPull()
112 OSAL_WRITEL(value, hi35xx->regBase + index * HI35XX_PIN_REG_SIZE); in Hi35xxPinSetPull()
123 value = OSAL_READL(hi35xx->regBase + index * HI35XX_PIN_REG_SIZE); in Hi35xxPinGetPull()
135 value = OSAL_READL(hi35xx->regBase + index * HI35XX_PIN_REG_SIZE); in Hi35xxPinSetStrength()
137 OSAL_WRITEL(value, hi35xx->regBase + index * HI35XX_PIN_REG_SIZE); in Hi35xxPinSetStrength()
148 value = OSAL_READL(hi35xx->regBase + index * HI35XX_PIN_REG_SIZE); in Hi35xxPinGetStrength()
166 value = OSAL_READL(hi35xx->regBase + index * HI35XX_PIN_REG_SIZE); in Hi35xxPinSetFunc()
168 OSAL_WRITEL(value, hi35xx->regBase in Hi35xxPinSetFunc()
[all...]
/device/soc/hisilicon/common/platform/mtd/hifmc100/common/
H A Dhifmc100.h26 volatile void *regBase; member
54 OSAL_READL((uintptr_t)((uint8_t *)(_cntlr)->regBase + (_reg)))
57 OSAL_WRITEL((unsigned long)(_value), (uintptr_t)((uint8_t *)(_cntlr)->regBase + (_reg)))
H A Dhifmc100.c130 ret = drsOps->GetUint32(node, "regBase", &cntlr->regBasePhy, 0); in HifmcCntlrReadDrs()
151 cntlr->regBase = OsalIoRemap(cntlr->regBasePhy, cntlr->regSize); in HifmcCntlrReadDrs()
152 if (cntlr->regBase == NULL) { in HifmcCntlrReadDrs()
160 OsalIoUnmap((void *)cntlr->regBase); in HifmcCntlrReadDrs()
289 HDF_LOGD("%s: cntlr regBase=%p(phyBase:0x%x)", __func__, cntlr->regBase, cntlr->regBasePhy); in HifmcCntlrInitAfterScan()
/device/soc/hisilicon/common/platform/mmc/sdhci/
H A Dsdhci.c1566 uint32_t regBase, regSize; in SdhciHostParse() local
1584 ret = drsOps->GetUint32(node, "regBasePhy", &regBase, 0); in SdhciHostParse()
1594 host->base = OsalIoRemap(regBase, regSize); in SdhciHostParse()
1596 HDF_LOGE("%s: ioremap regBase fail!", __func__); in SdhciHostParse()
/device/soc/hisilicon/common/platform/mmc/himci_v200/
H A Dhimci.c1804 uint32_t regBase, regSize; in HimciHostParse() local
1822 ret = drsOps->GetUint32(node, "regBasePhy", &regBase, 0); in HimciHostParse()
1834 host->base = OsalIoRemap(regBase, regSize); in HimciHostParse()
1836 HDF_LOGE("%s: ioremap regBase fail!", __func__); in HimciHostParse()

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